2026-01-23 01:32:04.940 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.28.20:5700'
2026-01-23 01:32:04.940 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.28.20:5802)
2026-01-23 01:32:04.940 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.28.20:5801)
2026-01-23 01:32:04.940 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.28.22:6700'
2026-01-23 01:32:04.940 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.28.22:6802)
2026-01-23 01:32:04.940 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.28.22:6801)
2026-01-23 01:32:04.940 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.28.20:5700/1'
2026-01-23 01:32:04.940 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.28.20:5804)
2026-01-23 01:32:04.940 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.28.20:5803)
2026-01-23 01:32:04.940 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.28.20:5700/2'
2026-01-23 01:32:04.940 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.28.20:5806)
2026-01-23 01:32:04.940 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.28.20:5805)
2026-01-23 01:32:04.940 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.28.20:5700/3'
2026-01-23 01:32:04.940 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.28.20:5808)
2026-01-23 01:32:04.940 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.28.20:5807)
2026-01-23 01:32:04.940 [INFO] fake_trx.py:424 Init complete
2026-01-23 01:32:04.940 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-23 01:32:06.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:06.329 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:06.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:06.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:06.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:06.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:09.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:09.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:09.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:09.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:09.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 0 -> 1
2026-01-23 01:32:09.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:09.362 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:09.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:09.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:09.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:09.363 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:09.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 0 -> 1
2026-01-23 01:32:09.366 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:09.366 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:09.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:09.367 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:09.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:09.367 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:09.367 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:09.367 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 0 -> 1
2026-01-23 01:32:09.370 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:09.370 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:09.371 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:09.371 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:09.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:09.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:09.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:09.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 0 -> 1
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:09.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:09.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:09.374 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:09.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:09.374 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:09.374 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:09.374 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:09.374 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:09.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:09.379 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:09.861 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:09.914 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:09.917 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:09.918 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:09.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:09.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:09.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:09.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:09.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:09.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:09.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:09.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:09.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:10.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:10.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:10.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.337 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:32:10.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:10.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:10.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:10.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:10.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:10.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:10.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:10.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:10.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:10.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:10.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:10.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:10.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:10.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:10.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:10.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:10.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:10.812 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:32:11.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:11.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:11.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:11.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:11.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:11.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:11.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:11.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:11.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:11.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:11.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:11.290 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:32:11.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:11.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:11.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:11.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:11.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:11.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:11.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:11.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:11.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:11.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:11.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:11.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:11.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:11.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:11.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:11.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:11.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:32:11.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:11.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:11.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:11.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:11.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:12.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:12.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:12.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:12.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:12.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:32:12.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:12.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:12.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:12.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:12.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:12.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:12.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:12.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:12.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:12.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:12.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:12.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:12.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:12.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:12.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:12.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:12.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:32:13.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:32:13.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:13.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:13.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:13.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:13.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:13.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:13.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:13.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:13.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:13.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:13.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:13.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:13.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:13.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:13.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:13.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:13.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:13.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:13.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:13.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:13.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:13.678 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:32:14.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:32:14.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:14.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:14.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:14.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:14.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:14.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:14.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:14.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:14.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:14.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:14.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:14.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:14.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.634 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:32:14.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:14.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:14.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:14.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:14.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:14.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:14.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:14.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:14.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:14.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:14.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:14.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:14.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:15.112 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:32:15.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:15.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:15.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:15.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:32:15.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:15.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:15.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:15.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:15.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:15.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:15.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:15.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:15.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:15.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:15.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:15.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:15.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:32:16.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:16.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:16.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:16.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:32:16.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:16.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:16.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:16.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:16.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:16.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:16.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:16.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:16.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:16.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:16.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:16.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:16.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:16.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:17.024 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:32:17.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:17.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:17.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:17.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:17.502 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:32:17.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:17.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:17.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:17.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:17.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:17.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:17.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:17.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:17.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:17.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:17.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:17.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:17.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:17.980 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:32:18.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:18.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:18.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:18.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:18.458 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:32:18.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:18.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:18.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:18.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:18.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:18.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:18.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:18.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:18.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:18.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:18.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:18.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:18.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:18.935 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:32:18.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:18.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:18.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:18.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:19.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:19.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:19.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:19.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:19.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:19.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:19.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:19.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:19.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:19.413 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:32:19.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:19.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:19.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:19.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:19.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:19.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:19.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:19.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:19.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:19.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:19.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:19.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:19.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:19.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:19.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:19.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:19.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:19.891 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:32:20.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:20.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:20.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:20.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:20.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:20.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:20.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:20.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:20.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:20.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:20.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:20.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:20.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:20.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.368 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:32:20.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:20.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:20.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:20.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:20.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:20.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:20.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:20.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:20.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:20.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:20.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:20.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:20.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:20.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:20.845 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:32:21.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:21.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:21.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:21.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:21.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:21.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:21.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:21.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:21.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:21.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:21.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:32:21.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:21.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:21.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:21.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:21.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:21.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:21.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:21.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:21.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:21.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:21.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:21.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:21.801 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:32:21.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:21.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:21.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:21.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:21.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:22.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:22.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:22.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:22.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:22.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:22.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:22.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:22.237 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:22.237 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:22.278 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:32:22.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:22.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:22.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:22.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:22.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:22.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:22.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:22.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:22.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:22.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:22.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:22.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:22.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:22.756 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:32:22.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:22.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:22.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:22.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:22.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:23.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:23.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:23.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:23.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:23.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:23.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:23.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:23.223 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:32:23.223 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:23.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:23.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:23.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:23.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:28.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:28.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:28.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:28.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:28.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:28.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:28.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:28.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:28.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:28.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:28.238 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:32:28.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:28.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:28.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:28.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:28.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:28.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:28.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:28.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:32:28.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:28.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:28.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:28.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:28.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:28.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:28.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:28.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:28.248 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:28.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:28.248 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:28.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:28.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:28.252 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:28.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:28.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:28.740 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:28.777 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:28.779 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:28.781 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:28.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:28.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:28.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:28.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:28.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
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2026-01-23 01:32:29.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:32:29.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:29.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:29.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:29.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:29.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
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2026-01-23 01:32:29.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:29.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:29.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:29.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:29.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:29.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:29.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:29.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:29.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:29.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:29.506 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:32:29.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=270 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:29.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:34.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:34.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:34.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:34.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:34.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:34.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:34.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:34.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:34.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:34.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:34.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:34.513 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:34.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:34.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:32:34.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:34.514 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:34.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:34.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:34.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:34.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:34.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:34.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:34.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:34.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:34.516 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:32:34.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:34.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:34.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:34.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:34.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:34.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:34.518 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:34.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:34.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:34.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:35.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:35.045 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:35.048 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:35.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:35.050 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:35.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:35.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:35.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:35.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:35.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:35.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:35.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:35.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:35.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:35.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:35.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:35.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:35.120 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:32:35.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.121 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:35.122 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:40.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:40.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:40.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:40.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:40.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:40.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:40.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:40.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:40.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:40.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:32:40.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:40.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:40.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:40.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:40.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:40.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:40.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:40.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:32:40.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:40.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:40.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:40.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:40.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:40.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:40.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:40.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:32:40.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:40.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:40.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:40.146 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:40.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:40.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:40.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:40.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:40.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:40.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:40.151 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:40.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:40.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:40.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:40.687 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:40.689 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:40.691 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:40.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:40.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:40.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:40.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:40.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:40.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:40.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:40.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:40.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:40.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:40.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:40.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:40.736 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:32:40.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:32:45.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:45.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:45.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:45.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:45.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:45.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:45.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:45.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:45.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:45.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:45.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:32:45.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:45.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:45.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:45.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:45.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:45.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:45.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:45.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:32:45.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:45.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:45.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:45.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:45.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:45.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:45.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:45.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:45.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:45.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:45.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:32:45.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:45.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:45.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:45.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:45.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:45.758 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:45.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:45.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:46.247 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:46.277 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:46.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:46.279 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:46.280 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:46.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:46.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:46.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:46.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:46.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:46.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:46.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:46.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:46.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:46.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:46.406 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:32:51.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:32:51.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:32:51.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:51.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:51.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:51.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:51.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:32:51.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:51.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:51.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:32:51.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:32:51.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:32:51.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:32:51.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:51.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:51.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:32:51.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:32:51.425 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:32:51.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:32:51.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:32:51.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:32:51.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:51.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:51.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:32:51.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:32:51.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:32:51.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:32:51.429 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:32:51.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:32:51.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:51.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:32:51.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:32:51.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:32:51.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:32:51.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:32:51.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:32:51.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:32:51.433 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:32:51.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:32:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:32:51.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:32:51.953 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:32:51.954 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:32:51.955 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:32:51.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:51.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:51.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:51.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:51.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:51.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:51.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:51.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:51.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:52.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:52.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:52.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:52.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:52.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:52.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:52.399 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:32:52.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:52.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:52.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:52.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:52.876 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:32:53.354 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:32:53.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:53.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:53.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:53.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:32:54.310 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:32:54.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:54.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:54.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:54.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:54.787 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:32:55.266 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:32:55.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:55.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:55.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:55.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:55.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:32:56.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:56.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:56.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:56.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:56.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:32:56.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:32:56.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:32:56.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:56.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:56.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:56.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:32:56.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:32:56.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:56.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:32:56.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:32:56.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:56.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:32:56.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:32:56.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:32:56.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:32:56.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:32:56.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:32:56.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:32:56.698 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:32:57.175 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:32:57.653 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:32:58.131 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:32:58.609 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:32:59.087 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:32:59.565 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:33:00.043 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:33:00.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:00.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:00.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:00.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:00.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:00.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:00.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:00.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:00.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:00.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:00.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:00.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:00.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:00.521 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:33:00.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:00.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:00.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:00.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:00.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:00.999 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:33:01.478 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:33:01.955 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:33:02.433 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:33:02.911 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:33:03.389 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:33:03.867 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:33:04.345 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:33:04.822 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:33:04.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:04.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:04.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:04.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:04.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:04.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:04.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:04.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:04.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:04.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:04.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:04.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:05.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:05.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:05.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:05.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:05.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:05.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:05.300 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:33:05.778 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:33:06.255 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:33:06.734 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:33:07.211 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:33:07.688 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:33:08.166 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:33:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:33:09.121 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:33:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:09.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:09.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:09.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:09.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:09.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:09.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:09.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:09.303 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:09.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:09.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:09.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:09.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:09.364 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:09.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:33:09.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:10.077 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:33:10.555 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:33:11.033 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:33:11.511 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:33:11.989 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:33:12.467 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:33:12.945 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:33:13.423 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:33:13.901 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:33:13.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:13.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:13.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:13.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:13.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:13.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:13.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:13.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:13.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:13.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:13.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:13.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:13.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:14.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:14.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:14.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:33:14.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:14.857 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:33:15.335 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:33:15.813 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:33:16.291 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:33:16.769 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:33:17.247 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:33:17.724 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:33:18.203 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:33:18.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:18.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:18.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:18.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:18.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:18.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:18.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:18.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:18.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:18.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:18.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:18.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:18.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:18.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:18.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:18.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:18.680 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:33:18.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:19.158 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:33:19.636 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:33:20.114 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:33:20.593 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:33:21.068 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:33:21.543 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:33:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:33:22.499 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:33:22.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:22.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:22.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:22.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:22.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:22.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:22.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:22.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:22.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:22.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:22.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:22.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:22.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:33:22.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:22.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:22.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:22.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:22.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:22.976 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:33:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:23.454 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:33:23.931 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:33:24.408 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:33:24.887 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:33:25.365 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:33:25.843 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:33:26.322 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:33:26.800 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:33:27.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:27.279 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:33:27.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:27.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:27.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:27.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:27.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:27.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:27.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:27.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:27.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:27.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:27.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:27.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:27.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:27.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:27.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:27.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:27.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:27.756 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:33:28.235 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:33:28.712 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:33:29.190 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:33:29.669 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:33:30.146 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:33:30.625 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:33:31.103 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:33:31.581 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:33:31.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:31.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:31.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:31.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:31.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:31.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:31.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:31.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:31.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:31.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:31.750 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:31.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:31.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:33:31.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:31.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:31.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:31.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:31.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:32.059 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:33:32.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:32.537 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:33:33.014 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:33:33.492 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:33:33.970 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:33:34.448 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:33:34.926 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:33:35.404 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:33:35.882 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:33:36.360 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:33:36.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:36.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:36.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:36.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:36.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:36.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:36.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:36.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:36.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:36.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:36.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:36.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:36.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:36.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:36.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:36.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:36.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:36.838 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:33:37.316 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:33:37.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:37.794 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:33:38.271 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:33:38.749 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:33:39.228 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:33:39.706 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 01:33:40.184 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 01:33:40.662 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 01:33:41.140 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 01:33:41.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:41.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:41.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:41.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:41.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:41.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:41.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:41.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:41.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:41.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:41.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:41.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:41.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:41.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:41.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:41.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:41.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:41.618 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 01:33:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:42.096 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 01:33:42.574 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 01:33:43.052 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 01:33:43.529 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 01:33:44.008 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 01:33:44.486 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 01:33:44.964 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 01:33:45.442 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 01:33:45.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:45.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:45.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:45.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:45.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:45.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:45.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:45.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:45.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:45.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:45.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:45.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:45.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:45.920 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 01:33:45.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:45.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:45.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:45.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:46.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:46.398 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 01:33:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 01:33:47.353 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 01:33:47.831 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 01:33:48.309 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 01:33:48.787 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 01:33:49.265 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 01:33:49.744 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 01:33:50.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:50.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:50.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:50.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:50.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:50.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:50.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:50.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:50.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:50.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:50.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:50.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:50.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:50.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:50.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:50.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:50.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:50.221 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 01:33:50.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:50.699 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 01:33:51.177 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 01:33:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 01:33:52.133 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 01:33:52.611 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 01:33:53.089 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 01:33:53.566 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 01:33:54.044 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 01:33:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:54.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:54.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:54.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:54.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:54.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:54.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:54.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:54.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:54.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:54.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:54.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:54.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:54.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:54.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:54.521 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 01:33:54.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:54.996 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 01:33:55.490 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 01:33:55.967 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 01:33:56.445 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 01:33:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 01:33:57.401 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 01:33:57.878 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 01:33:58.356 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 01:33:58.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:58.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:58.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:58.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:58.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:33:58.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:33:58.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:33:58.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:58.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:58.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:58.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:33:58.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:33:58.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:58.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:33:58.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:33:58.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:58.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:33:58.833 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 01:33:59.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:33:59.311 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 01:33:59.789 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 01:34:00.267 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 01:34:00.745 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 01:34:01.223 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 01:34:01.701 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 01:34:02.179 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 01:34:02.657 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 01:34:03.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:03.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:03.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:03.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:03.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:03.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:03.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:03.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:03.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:03.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:03.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:03.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:03.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:03.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:03.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:03.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 01:34:03.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:03.611 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 01:34:04.088 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 01:34:04.566 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 01:34:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 01:34:05.522 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 01:34:06.000 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 01:34:06.478 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 01:34:06.955 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 01:34:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 01:34:07.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:07.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:07.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:07.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:07.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:07.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:07.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:07.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:07.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:07.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:07.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:07.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:07.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:07.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:07.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:07.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:07.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 01:34:08.388 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 01:34:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 01:34:09.343 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 01:34:09.821 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 01:34:10.299 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 01:34:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 01:34:11.256 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 01:34:11.734 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 01:34:11.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:11.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:11.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:11.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:11.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:11.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:11.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:11.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:11.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:11.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:11.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:11.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:11.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:11.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:11.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:11.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:11.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:12.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:12.211 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 01:34:12.689 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 01:34:13.167 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 01:34:13.645 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 01:34:14.123 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 01:34:14.601 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 01:34:15.079 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 01:34:15.557 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 01:34:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 01:34:16.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:16.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:16.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:16.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:16.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:16.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:16.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:16.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:16.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:16.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:16.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:16.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:16.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:16.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:16.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:16.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:16.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:16.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:16.510 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 01:34:16.988 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 01:34:17.466 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 01:34:17.944 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 01:34:18.421 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 01:34:18.899 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 01:34:19.376 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 01:34:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 01:34:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 01:34:20.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:20.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:20.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:20.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:20.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:20.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:20.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:20.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:20.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:20.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:20.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:20.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:20.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:20.495 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:34:20.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:25.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:25.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:25.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:25.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:25.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:25.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:25.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:25.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:25.511 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:25.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:25.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:34:25.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:34:25.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:34:25.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:25.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:25.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:25.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:34:25.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:25.516 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:25.517 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:34:25.517 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:25.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:25.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:34:25.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:25.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:34:25.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:34:25.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:34:25.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:34:25.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:34:25.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:34:25.522 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:34:25.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:34:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:25.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:25.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:25.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:25.525 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:34:30.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:30.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:30.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:30.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:30.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:30.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:30.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:30.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:30.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:30.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:34:30.538 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:34:30.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:34:30.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:30.539 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:30.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:30.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:34:30.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:30.541 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:34:30.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:34:30.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:34:30.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:30.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:30.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:30.543 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:34:30.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:30.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:30.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:34:30.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:30.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:34:30.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:34:30.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:34:30.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:34:30.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:34:30.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:34:30.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:34:30.549 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:34:30.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:30.554 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:34:31.038 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:34:31.077 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:34:31.079 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:34:31.081 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:34:31.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:31.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:31.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:31.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:31.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:31.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:31.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:34:31.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:31.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:31.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:31.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:31.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:31.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:31.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:31.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:31.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:31.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:31.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:31.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:31.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:31.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:31.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:31.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:31.989 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:34:32.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:32.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:32.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:32.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:32.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:32.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:32.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:32.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:32.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:32.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:32.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:32.459 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:32.459 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:32.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:34:32.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:32.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:32.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:32.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:32.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:32.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:32.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:32.940 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:34:32.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:32.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:32.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:32.980 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=520 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:34:32.980 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=520 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:34:32.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:32.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:32.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:32.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:32.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:32.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:32.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:32.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:33.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:33.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:33.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:34:33.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:33.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:33.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:33.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:33.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:33.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:33.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:33.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:33.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:33.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:33.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:33.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:33.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:33.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:33.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:33.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:33.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:33.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:33.893 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:34:34.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:34.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:34.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:34.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:34.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:34.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:34.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:34.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:34.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:34.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:34.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:34.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:34.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:34.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:34.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:34:34.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:34.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:34.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:34.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:34.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:34.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:34.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:34.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:34.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:34.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:34.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:34.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:34.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:34.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:34.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:34.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:34.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:34.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:34:35.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:35.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:35.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:35.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:35.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:35.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:35.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:35.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:35.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:35.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:35.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:35.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:35.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:35.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:35.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:35.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:35.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:35.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:35.326 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:34:35.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:35.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:35.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:35.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:35.804 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:34:36.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:36.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:36.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:36.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:36.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:36.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:36.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:36.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:36.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:36.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:36.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:36.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:36.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:36.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.278 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:34:36.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:36.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:36.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:36.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:36.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:36.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:36.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:36.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:36.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:36.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:36.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:36.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:36.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:36.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:36.756 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:34:37.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:37.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:37.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:37.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.234 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:34:37.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:37.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:37.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:37.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.710 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:34:37.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:37.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:37.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:37.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:37.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:37.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:37.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:37.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:37.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.187 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:34:38.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:38.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:38.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:38.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:38.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:38.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:38.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:38.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:38.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:38.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:38.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:38.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:38.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:38.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.664 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:34:38.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:38.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:38.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:38.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:38.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:38.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:38.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:38.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:38.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:38.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:38.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:38.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:38.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:38.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:39.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:39.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:39.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:39.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:39.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:39.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:39.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:39.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:39.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:39.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:39.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:39.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:39.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.141 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:34:39.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:39.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:39.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:39.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:39.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:39.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:39.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:39.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:39.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:39.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:39.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:34:39.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:39.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:39.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:39.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:40.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:40.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:40.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:40.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:40.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:40.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:40.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:40.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:40.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:40.096 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:34:40.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:40.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:40.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:40.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:40.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:40.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:40.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:40.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:40.555 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:34:45.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:34:45.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:34:45.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:45.562 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:45.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:45.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:45.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:34:45.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:45.574 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:45.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:34:45.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:34:45.579 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:34:45.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:34:45.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:45.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:45.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:34:45.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:34:45.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:34:45.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:34:45.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:34:45.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:34:45.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:45.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:45.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:34:45.585 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:34:45.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:34:45.585 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:34:45.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:34:45.587 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:34:45.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:45.587 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:34:45.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:34:45.588 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:34:45.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:34:45.588 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:34:45.590 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:34:45.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:34:45.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:34:45.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:34:45.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.591 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:34:45.591 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:34:45.591 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:34:45.591 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:45.596 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:34:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:34:46.122 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:34:46.123 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:34:46.124 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:34:46.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:46.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:46.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:46.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:46.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:46.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:46.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:46.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:46.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:46.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:46.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:46.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:46.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:46.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:46.558 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:34:46.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:46.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:46.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:46.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:46.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:47.036 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:34:47.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:47.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:47.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:47.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:47.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:47.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:47.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:47.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:47.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:47.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:47.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:47.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:47.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:47.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:47.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:47.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:47.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:47.514 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:34:47.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:47.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:47.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:47.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:34:48.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:48.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:48.469 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:34:48.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:48.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:48.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:48.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:48.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:48.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:48.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:48.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:48.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:48.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:48.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:48.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:48.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:48.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:48.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:48.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:48.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:48.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:48.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:48.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:48.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:34:49.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:49.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:49.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:34:49.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:49.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:49.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:49.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:49.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:49.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:49.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:49.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:49.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:49.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:49.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:49.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:49.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:49.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:49.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:49.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:34:49.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:49.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:49.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:49.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:49.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:50.380 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:34:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:34:50.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:34:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:34:50.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:34:50.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:50.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:50.858 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:34:51.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:51.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:51.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:51.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:51.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:51.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:51.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:51.336 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:34:51.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:51.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:51.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:51.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:51.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:51.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:51.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:51.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:51.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:51.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:51.814 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:34:52.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:34:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:52.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:52.769 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:34:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:52.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:52.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:52.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:52.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:52.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:52.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:52.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:52.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:52.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:52.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:52.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:52.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:52.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:52.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:52.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:52.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:53.246 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:34:53.724 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:34:53.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:53.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:54.202 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:34:54.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:54.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:54.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:54.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:54.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:54.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:54.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:54.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:54.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:54.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:54.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:54.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:54.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:54.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:54.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:54.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:54.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:54.679 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:34:55.157 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:34:55.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:55.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:55.635 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:34:55.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:55.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:55.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:55.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:55.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:55.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:55.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:55.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:55.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:55.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:55.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:55.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:56.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:56.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:56.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:56.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:56.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:56.113 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:34:56.588 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:34:56.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:56.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:57.061 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:34:57.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:57.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:57.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:57.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:57.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:57.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:57.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:57.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:57.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:57.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:57.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:57.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:57.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:57.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:57.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:57.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:57.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:57.530 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:34:58.006 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:34:58.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:58.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:34:58.962 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:34:58.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:58.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:58.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:58.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:58.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:34:58.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:34:58.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:34:58.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:58.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:58.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:58.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:34:58.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:34:59.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:34:59.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:34:59.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:34:59.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:34:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:59.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:34:59.439 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:34:59.917 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:35:00.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:00.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:00.395 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:35:00.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:00.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:00.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:00.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:00.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:00.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:00.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:00.872 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:35:00.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:00.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:00.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:00.874 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:00.874 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:00.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:00.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:00.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:00.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:00.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:35:01.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:01.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:01.824 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:35:02.302 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:35:02.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:02.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:02.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:02.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:02.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:02.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:02.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:02.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:02.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:02.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:02.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:02.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:02.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:02.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:02.779 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:35:03.258 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:35:03.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:03.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:03.736 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:35:03.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:03.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:03.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:03.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:03.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:03.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:03.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:03.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:03.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:03.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:03.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:03.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:03.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:03.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:03.908 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:03.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:03.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:04.214 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:35:04.692 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:35:04.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:04.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:05.169 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:35:05.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:05.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:05.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:05.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:05.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:05.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:05.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:05.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:05.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:05.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:05.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:05.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:05.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:05.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:05.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:05.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:05.646 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:35:06.125 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:35:06.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:06.603 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:35:06.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:06.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:06.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:06.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:06.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:06.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:06.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:06.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:06.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:06.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:06.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:06.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:06.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:06.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:06.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:06.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:06.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:07.080 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:35:07.558 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:35:07.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:07.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:08.036 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:35:08.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:08.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:08.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:08.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:08.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:08.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:08.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:08.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:08.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:08.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:08.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:08.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:08.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:08.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:08.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:08.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:08.513 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:35:08.990 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:35:09.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:09.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:09.467 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:35:09.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:09.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:09.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:09.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:09.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:09.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:09.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:09.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:09.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:09.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:09.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:09.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:09.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:09.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:09.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:09.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:09.945 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:35:10.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:10.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:10.423 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:35:10.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:10.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:10.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:10.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:10.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:10.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:10.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:10.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:10.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:10.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:10.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:10.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:10.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:10.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:10.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:10.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:10.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:10.899 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:35:11.377 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:35:11.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:11.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:11.855 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:35:12.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:12.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:12.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:12.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:12.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:12.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:12.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:12.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:12.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:12.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:12.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:12.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:12.332 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:35:12.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:12.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:12.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:12.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:12.810 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:35:13.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:13.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:13.288 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:35:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:13.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:13.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:13.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:13.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:13.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:13.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:13.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:13.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:13.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:13.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:13.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:13.765 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:35:13.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:13.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:13.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:13.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:13.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:14.243 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:35:14.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:14.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:14.721 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:35:15.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:15.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:15.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:15.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:15.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:15.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:35:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:35:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:35:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:35:15.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:35:15.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:35:15.184 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:15.184 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:35:20.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:35:20.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:35:20.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:35:20.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:35:20.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:35:20.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:35:20.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:35:20.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:35:20.196 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:35:20.196 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:35:20.196 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:35:20.200 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:35:20.200 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:35:20.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:35:20.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:35:20.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:35:20.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:35:20.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:35:20.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:35:20.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:35:20.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:35:20.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:35:20.205 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:35:20.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:35:20.205 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:35:20.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:35:20.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:35:20.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:35:20.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:35:20.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:35:20.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:35:20.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:35:20.208 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:35:20.208 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:35:20.208 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:35:20.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:35:20.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:35:20.211 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:35:20.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:20.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:35:20.699 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:35:20.744 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:35:20.745 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:35:20.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:20.747 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:35:20.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:20.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:20.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:20.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:20.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:20.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:20.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:20.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:20.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:20.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:20.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:20.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:20.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:21.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:35:21.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:21.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:21.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:21.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:21.653 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:35:22.131 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:35:22.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:22.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:22.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:22.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:22.609 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:35:23.086 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:35:23.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:23.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:23.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:23.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:23.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:35:24.041 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:35:24.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:24.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:24.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:24.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:24.519 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:35:24.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:24.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:24.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:24.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:24.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:24.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:24.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:24.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:24.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:24.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:24.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:24.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:24.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:24.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:24.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:24.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:24.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:24.996 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:35:25.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:35:25.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:35:25.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:35:25.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:35:25.474 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:35:25.951 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:35:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:35:26.907 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:35:27.385 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:35:27.863 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:35:28.341 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:35:28.819 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:35:29.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:29.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:29.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:29.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:29.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:29.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:29.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:29.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:29.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:29.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:29.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:29.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:29.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:29.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:29.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:29.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:29.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:29.297 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:35:29.775 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:35:30.253 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:35:30.730 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:35:31.208 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:35:31.686 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:35:32.164 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:35:32.642 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:35:33.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:33.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:33.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:33.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:33.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:33.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:33.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:33.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:33.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:33.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:33.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:33.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:33.118 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:35:33.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:33.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:33.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:33.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:33.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:33.596 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:35:34.074 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:35:34.551 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:35:35.029 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:35:35.507 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:35:35.986 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:35:36.463 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:35:36.941 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:35:37.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:37.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:37.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:37.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:37.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:37.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:37.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:37.419 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:35:37.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:37.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:37.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:37.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:37.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:37.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:37.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:37.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:37.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:37.897 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:35:38.375 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:35:38.853 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:35:39.330 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:35:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:35:40.287 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:35:40.764 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:35:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:35:41.717 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:35:42.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:42.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:42.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:42.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:42.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:42.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:42.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:42.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:42.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:42.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:42.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:42.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:42.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:42.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:42.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:42.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:42.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:42.192 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:35:42.671 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:35:43.149 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:35:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:35:44.104 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:35:44.583 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:35:45.061 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:35:45.539 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:35:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:35:46.495 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:35:46.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:46.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:46.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:46.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:46.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:46.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:46.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:46.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:46.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:46.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:46.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:46.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:46.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:46.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:46.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:46.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:46.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:46.972 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:35:47.450 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:35:47.928 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:35:48.406 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:35:48.885 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:35:49.363 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:35:49.841 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:35:50.318 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:35:50.796 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:35:51.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:51.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:51.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:51.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:51.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:51.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:51.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:51.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:51.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:51.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:51.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:51.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:51.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:51.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:51.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:51.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:51.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:51.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:51.274 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:35:51.752 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:35:52.231 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:35:52.709 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:35:53.187 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:35:53.665 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:35:54.143 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:35:54.622 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:35:55.100 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:35:55.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:55.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:55.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:55.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:55.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:55.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:55.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:55.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:55.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:55.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:55.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:55.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:55.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:55.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:55.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:55.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:55.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:55.577 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:35:56.055 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:35:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:35:57.012 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:35:57.490 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:35:57.968 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:35:58.447 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:35:58.925 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:35:59.403 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:35:59.881 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:35:59.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:59.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:59.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:59.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:59.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:35:59.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:35:59.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:35:59.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:59.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:59.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:59.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:35:59.942 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:35:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:35:59.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:35:59.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:35:59.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:35:59.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:35:59.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:00.358 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:36:00.836 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:36:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:36:01.792 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:36:02.270 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:36:02.748 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:36:03.226 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:36:03.704 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:36:04.182 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:36:04.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:04.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:04.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:04.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:04.245 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=9399 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:04.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:04.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:04.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:04.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:04.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:04.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:04.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:04.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:04.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:04.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:04.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:04.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:04.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:04.660 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:36:05.138 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:36:05.617 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:36:06.095 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:36:06.573 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:36:07.052 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:36:07.530 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:36:08.008 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:36:08.486 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 01:36:08.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:08.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:08.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:08.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:08.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:08.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:08.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:08.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:08.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:08.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:08.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:08.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:08.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:08.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:08.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:08.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:08.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:08.963 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 01:36:09.452 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 01:36:09.930 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 01:36:10.408 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 01:36:10.886 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 01:36:11.365 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 01:36:11.843 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 01:36:12.321 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 01:36:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 01:36:13.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:13.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:13.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:13.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:13.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:13.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:13.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:13.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:13.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:13.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:13.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:13.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:13.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:13.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:13.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:13.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:13.277 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 01:36:13.754 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 01:36:14.232 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 01:36:14.710 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 01:36:15.187 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 01:36:15.665 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 01:36:16.143 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 01:36:16.622 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 01:36:17.100 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 01:36:17.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:17.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:17.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:17.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:17.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:17.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:17.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:17.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:17.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:17.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:17.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:17.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:17.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:17.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:17.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:17.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:17.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:17.578 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 01:36:18.055 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 01:36:18.534 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 01:36:19.012 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 01:36:19.510 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 01:36:19.988 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 01:36:20.466 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 01:36:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 01:36:21.422 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 01:36:21.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:21.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:21.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:21.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:21.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:21.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:21.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:21.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:21.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:21.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:21.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:21.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:21.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:21.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:21.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:21.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:21.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 01:36:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 01:36:22.856 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 01:36:23.333 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 01:36:23.811 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 01:36:24.288 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 01:36:24.755 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 01:36:25.225 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 01:36:25.694 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 01:36:25.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:25.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:25.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:25.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:25.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:25.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:25.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:25.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:25.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:25.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:25.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:25.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:25.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:25.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:25.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:25.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:25.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:26.163 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 01:36:26.634 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 01:36:27.105 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 01:36:27.577 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 01:36:28.047 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 01:36:28.520 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 01:36:28.993 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 01:36:29.461 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 01:36:29.930 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 01:36:30.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:30.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:30.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:30.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:30.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:30.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:30.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:30.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:30.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:30.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:30.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:30.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:30.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:30.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:30.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:30.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:30.401 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 01:36:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 01:36:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 01:36:31.814 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 01:36:32.285 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 01:36:32.755 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 01:36:33.228 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 01:36:33.698 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 01:36:34.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:34.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:34.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:34.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:34.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:34.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:34.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:34.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:34.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:34.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:34.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:34.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:34.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:34.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:34.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:34.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:34.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:34.167 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 01:36:34.640 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 01:36:35.116 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 01:36:35.595 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 01:36:36.073 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 01:36:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 01:36:37.029 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 01:36:37.507 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 01:36:37.985 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 01:36:38.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:38.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:38.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:38.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:38.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:38.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:38.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:38.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:38.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:38.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:38.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:38.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:38.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:38.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:38.463 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 01:36:38.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:38.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:38.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:38.941 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 01:36:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 01:36:39.897 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 01:36:40.375 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 01:36:40.853 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 01:36:41.331 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 01:36:41.809 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 01:36:42.287 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 01:36:42.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:42.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:42.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:42.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:42.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:42.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:42.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:42.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:42.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:42.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:42.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:42.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:42.765 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 01:36:42.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:42.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:42.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:42.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:42.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:43.242 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 01:36:43.720 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 01:36:44.198 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 01:36:44.676 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 01:36:45.153 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 01:36:45.631 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 01:36:46.109 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 01:36:46.586 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 01:36:47.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:47.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:47.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:47.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:47.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:36:47.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:36:47.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:36:47.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:36:47.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:47.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:36:47.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:36:47.052 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:36:47.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:47.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:47.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:36:52.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:36:52.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:36:52.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:52.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:52.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:52.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:52.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:52.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:36:52.066 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:52.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:36:52.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:36:52.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:36:52.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:36:52.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:36:52.069 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:52.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:52.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:36:52.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:36:52.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:36:52.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:36:52.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:36:52.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:36:52.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:52.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:52.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:36:52.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:36:52.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:36:52.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:36:52.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:36:52.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:36:52.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:52.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:52.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:36:52.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:36:52.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:36:52.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:36:52.078 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:36:52.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:36:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:36:52.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:52.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:52.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:36:52.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:36:52.080 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:36:57.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:36:57.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:36:57.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:57.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:57.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:57.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:57.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:36:57.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:36:57.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:57.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:36:57.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:36:57.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:36:57.102 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:36:57.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:36:57.102 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:57.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:36:57.103 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:36:57.103 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:36:57.103 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:36:57.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:36:57.105 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:36:57.105 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:36:57.105 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:57.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:36:57.106 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:36:57.106 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:36:57.106 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:36:57.108 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:36:57.108 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:36:57.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:36:57.108 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:36:57.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:36:57.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:36:57.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:36:57.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:36:57.112 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:36:57.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:36:57.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:36:57.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.113 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:36:57.114 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:36:57.114 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:36:57.114 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:36:57.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:36:57.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:36:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:36:57.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:36:57.649 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:36:57.651 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:36:57.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:57.653 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:36:57.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:36:57.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:36:57.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:36:57.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:57.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:57.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:57.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:36:57.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:36:57.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:36:57.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:36:57.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:36:57.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:57.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:36:58.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:36:58.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:36:58.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:36:58.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:36:58.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:36:58.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:36:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:36:59.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:36:59.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:36:59.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:36:59.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:36:59.512 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:36:59.990 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:37:00.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:37:00.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:37:00.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:37:00.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:37:00.468 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:37:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:37:01.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:37:01.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:37:01.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:37:01.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:37:01.424 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:37:01.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:01.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:01.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:01.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:01.763 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=993 tn=2 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:37:01.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:01.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:01.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:01.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:01.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:01.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:01.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:01.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:01.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:01.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:01.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:01.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:01.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:01.902 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:37:02.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:37:02.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:37:02.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:37:02.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:37:02.380 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:37:02.858 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:37:03.335 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:37:03.813 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:37:04.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:37:04.769 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:37:05.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:37:05.724 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:37:06.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:06.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:06.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:06.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:06.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:06.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:06.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:06.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:06.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:06.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:06.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:06.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:06.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:06.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:06.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:06.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:06.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:06.201 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:37:06.678 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:37:07.156 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:37:07.633 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:37:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:37:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:37:09.066 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:37:09.544 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:37:10.022 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:37:10.499 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:37:10.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:10.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:10.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:10.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:10.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:10.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:10.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:10.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:10.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:10.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:10.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:10.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:10.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:10.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:10.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:10.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:10.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:10.977 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:37:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:37:11.932 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:37:12.409 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:37:12.887 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:37:13.365 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:37:13.843 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:37:14.321 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:37:14.799 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:37:14.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:14.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:14.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:14.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:14.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:14.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:14.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:14.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:14.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:14.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:14.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:14.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:14.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:14.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:14.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:14.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:15.277 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:37:15.755 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:37:16.233 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:37:16.711 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:37:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:37:17.666 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:37:18.144 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:37:18.622 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:37:19.100 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:37:19.578 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:37:19.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:19.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:19.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:19.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:19.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:19.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:19.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:19.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:19.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:19.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:19.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:19.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:19.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:19.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:19.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:19.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:19.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:20.055 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:37:20.532 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:37:21.010 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:37:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:37:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:37:22.443 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:37:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:37:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:37:23.875 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:37:24.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:24.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:24.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:24.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:24.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:24.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:24.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:24.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:24.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:24.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:24.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:24.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:24.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:24.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:24.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:24.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:24.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:24.353 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:37:24.831 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:37:25.309 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:37:25.787 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:37:26.264 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:37:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:37:27.219 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:37:27.697 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:37:28.175 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:37:28.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:28.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:28.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:28.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:28.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:28.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:28.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:28.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:28.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:28.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:28.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:28.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:28.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:37:28.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:28.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:28.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:28.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:28.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:28.652 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:37:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:37:29.608 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:37:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:37:30.564 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:37:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:37:31.521 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:37:31.999 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:37:32.477 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:37:32.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:32.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:32.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:32.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:32.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:32.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:32.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:32.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:32.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:32.955 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:37:32.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:32.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:32.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:33.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:33.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:33.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:33.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:33.432 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:37:33.910 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:37:34.388 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:37:34.866 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:37:35.344 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:37:35.822 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:37:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:37:36.778 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:37:37.257 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:37:37.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:37.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:37.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:37.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:37.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:37.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:37.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:37.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:37.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:37.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:37.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:37.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:37.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:37:37.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:37.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:37.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:37.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:37.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:37.734 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:37:38.212 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:37:38.689 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:37:39.167 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:37:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:37:40.123 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:37:40.601 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:37:41.079 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:37:41.557 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:37:42.035 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:37:42.512 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:37:42.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:42.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:42.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:42.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:42.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:42.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:42.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:42.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:42.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:42.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:42.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:42.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:42.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:42.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:42.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:42.990 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:37:43.468 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:37:43.945 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:37:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:37:44.902 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:37:45.380 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 01:37:45.858 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 01:37:46.337 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 01:37:46.815 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 01:37:47.293 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 01:37:47.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:47.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:47.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:47.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:47.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:47.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:47.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:47.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:47.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:47.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:47.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:47.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:47.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:47.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:47.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:47.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:47.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:47.771 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 01:37:48.249 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 01:37:48.727 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 01:37:49.205 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 01:37:49.683 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 01:37:50.161 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 01:37:50.639 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 01:37:51.117 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 01:37:51.595 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 01:37:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:51.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:51.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:51.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:52.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:52.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:52.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:52.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:52.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:52.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:52.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:52.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:52.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:52.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:52.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:52.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:52.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:52.073 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 01:37:52.551 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 01:37:53.030 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 01:37:53.507 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 01:37:53.985 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 01:37:54.462 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 01:37:54.940 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 01:37:55.418 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 01:37:55.896 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 01:37:56.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:56.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:56.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:56.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:56.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:37:56.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:37:56.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:37:56.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:56.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:56.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:56.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:37:56.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:37:56.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:37:56.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:37:56.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:37:56.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:56.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:37:56.373 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 01:37:56.852 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 01:37:57.329 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 01:37:57.807 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 01:37:58.285 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 01:37:58.763 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 01:37:59.241 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 01:37:59.719 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 01:38:00.197 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 01:38:00.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:00.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:00.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:00.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:00.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:00.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:00.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:00.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:00.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:00.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:00.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:00.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:00.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:00.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:00.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:00.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:00.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:00.674 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 01:38:01.152 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 01:38:01.630 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 01:38:02.108 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 01:38:02.585 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 01:38:03.063 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 01:38:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 01:38:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 01:38:04.496 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 01:38:04.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:04.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:04.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:04.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:04.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:04.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:04.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:04.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:04.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:04.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:04.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:04.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:04.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:04.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:04.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:04.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:04.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:04.973 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 01:38:05.451 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 01:38:05.929 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 01:38:06.406 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 01:38:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 01:38:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 01:38:07.838 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 01:38:08.316 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 01:38:08.793 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 01:38:09.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:09.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:09.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:09.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:09.145 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=15378 tn=1 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:09.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:09.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:09.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:09.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:09.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:09.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:09.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:09.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:09.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:09.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:09.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:09.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:09.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:09.270 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 01:38:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 01:38:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 01:38:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 01:38:11.182 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 01:38:11.660 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 01:38:12.138 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 01:38:12.616 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 01:38:13.093 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 01:38:13.571 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 01:38:13.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:13.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:13.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:13.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:13.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:13.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:13.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:13.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:13.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:13.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:13.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:13.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:13.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:13.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:13.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:13.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:14.048 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 01:38:14.526 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 01:38:15.005 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 01:38:15.483 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 01:38:15.961 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 01:38:16.439 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 01:38:16.918 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 01:38:17.396 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 01:38:17.874 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 01:38:17.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:17.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:17.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:17.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:17.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:17.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:17.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:17.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:17.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:17.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:17.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:17.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:17.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:17.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:17.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:18.352 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 01:38:18.830 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 01:38:19.308 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 01:38:19.786 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 01:38:20.264 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 01:38:20.742 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 01:38:21.220 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 01:38:21.698 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 01:38:22.176 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 01:38:22.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:22.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:22.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:22.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:22.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:22.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:22.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:22.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:22.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:22.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:22.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:22.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:22.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:22.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:22.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:22.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:22.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:22.652 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 01:38:23.130 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 01:38:23.607 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 01:38:24.085 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 01:38:24.563 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 01:38:25.041 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 01:38:25.518 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 01:38:25.996 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 01:38:26.474 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-23 01:38:26.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:26.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:26.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:26.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:26.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:26.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:26.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:26.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:26.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:26.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:38:26.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:38:26.596 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:38:26.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:26.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19102 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:38:31.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:38:31.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:38:31.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:31.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:31.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:31.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:31.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:31.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:38:31.604 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:31.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:38:31.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:38:31.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:38:31.607 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:38:31.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:38:31.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:31.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:31.609 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:38:31.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:38:31.609 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:38:31.611 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:38:31.611 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:38:31.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:38:31.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:31.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:31.612 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:38:31.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:38:31.612 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:38:31.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:38:31.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:38:31.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:38:31.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:31.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:31.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:38:31.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:38:31.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:38:31.618 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:38:31.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:38:31.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:38:31.620 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:38:31.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:31.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:38:31.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:38:31.622 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:38:36.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:38:36.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:38:36.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:36.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:36.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:36.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:36.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:38:36.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:38:36.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:36.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:38:36.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:38:36.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:38:36.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:38:36.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:38:36.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:36.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:38:36.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:38:36.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:38:36.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:38:36.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:38:36.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:38:36.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:38:36.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:36.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:38:36.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:38:36.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:38:36.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:38:36.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:38:36.650 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:38:36.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:38:36.650 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:38:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:38:36.650 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:38:36.650 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:38:36.650 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:38:36.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:38:36.653 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:38:36.654 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:36.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:38:37.143 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:38:37.180 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:38:37.182 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:38:37.185 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:38:37.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:37.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:37.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:37.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:37.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:37.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:37.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:37.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:37.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:37.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:37.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:37.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:37.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:37.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:37.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:38:37.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:37.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:37.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:37.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:38.098 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:38:38.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:38.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:38.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:38.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:38.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:38.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:38.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:38.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:38.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:38.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:38.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:38.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:38.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:38.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:38.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:38.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:38.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:38.576 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:38:38.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:38.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:38.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:38.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:39.054 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:38:39.532 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:38:39.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:39.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:39.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:39.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:39.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:39.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:39.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:39.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:39.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:39.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:39.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:39.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:39.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:39.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:39.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:39.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:39.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:39.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:39.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:39.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:39.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:40.009 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:38:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:38:40.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:40.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:40.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:40.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:40.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:40.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:40.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:40.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:40.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:40.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:40.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:40.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:40.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:40.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:40.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:40.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:40.965 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:38:40.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:40.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:40.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:40.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:40.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:41.443 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:38:41.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:38:41.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:38:41.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:38:41.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:38:41.921 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:38:42.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:42.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:42.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:42.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:42.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:42.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:42.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:42.398 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:38:42.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:42.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:42.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:42.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:42.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:42.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:42.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:42.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:42.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:42.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:42.876 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:38:43.354 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:38:43.832 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:38:43.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:43.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:43.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:43.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:43.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:43.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:43.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:43.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:43.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:43.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:43.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:43.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:44.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:44.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:44.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:44.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:44.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:44.309 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:38:44.787 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:38:45.266 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:38:45.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:45.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:45.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:45.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:45.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:45.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:45.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:45.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:45.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:45.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:45.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:45.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:45.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:45.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:45.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:45.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:45.743 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:38:46.221 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:38:46.699 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:38:47.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:47.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:47.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:47.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:47.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:47.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:47.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:47.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:47.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:47.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:47.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:47.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:47.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:47.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:47.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:47.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:47.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:47.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:47.176 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:38:47.655 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:38:48.133 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:38:48.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:48.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:48.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:48.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:48.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:48.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:48.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:48.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:48.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:48.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:48.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:48.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:48.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:48.610 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:38:48.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:48.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:48.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:48.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:49.088 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:38:49.566 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:38:50.044 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:38:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:50.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:50.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:50.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:50.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:50.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:50.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:50.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:50.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:50.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:50.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:50.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:50.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:38:50.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:50.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:50.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:50.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:50.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:50.522 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:38:51.000 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:38:51.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:51.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:51.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:51.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:51.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:51.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:51.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:51.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:51.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:51.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:51.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:51.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:51.478 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:38:51.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:51.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:51.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:51.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:51.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:51.956 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:38:52.434 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:38:52.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:52.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:52.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:52.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:52.913 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:38:52.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:52.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:52.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:52.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:52.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:52.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:52.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:52.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:52.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:52.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:52.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:52.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:52.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:38:53.869 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:38:54.347 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:38:54.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:54.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:54.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:54.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:54.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:54.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:54.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:54.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:54.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:54.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:54.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:54.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:54.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:54.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:54.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:54.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:54.825 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:38:55.303 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:38:55.781 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:38:55.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:55.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:55.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:55.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:55.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:55.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:55.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:55.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:55.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:55.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:55.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:55.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:56.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:56.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:56.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:56.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:56.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:56.258 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:38:56.736 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:38:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:38:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:57.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:57.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:57.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:57.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:57.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:57.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:57.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:57.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:57.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:57.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:57.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:57.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:57.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:57.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:57.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:57.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:57.692 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:38:58.170 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:38:58.647 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:38:58.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:58.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:58.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:58.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:58.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:38:58.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:38:58.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:38:58.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:58.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:58.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:58.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:38:58.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:38:58.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:38:58.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:38:58.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:38:58.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:58.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:38:59.125 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:38:59.604 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:39:00.082 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:39:00.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:00.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:00.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:00.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:00.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:00.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:00.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:00.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:00.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:00.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:00.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:00.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:00.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:00.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:00.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:00.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:00.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:39:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:39:01.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:01.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:01.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:01.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:01.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:01.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:01.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:01.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:01.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:01.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:01.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:01.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:01.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:01.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:01.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:01.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:01.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:01.515 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:39:01.993 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:39:02.471 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:39:02.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:02.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:02.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:02.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:02.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:02.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:02.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:02.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:02.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:02.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:02.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:02.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:02.949 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:39:02.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:02.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:02.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:02.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:03.427 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:39:03.905 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:39:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:04.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:04.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:04.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:04.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:04.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:04.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:04.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:04.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:04.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:04.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:04.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:04.382 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:39:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:04.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:04.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:04.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:04.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:04.860 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:39:05.338 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:39:05.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:05.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:05.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:05.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:05.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:05.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:05.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:05.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:05.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:05.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:05.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:05.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:05.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:39:05.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:39:05.801 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6221 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:05.802 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:10.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:39:10.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:39:10.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:10.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:10.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:10.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:10.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:10.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:39:10.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:10.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:39:10.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:39:10.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:39:10.823 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:39:10.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:39:10.824 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:10.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:10.825 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:39:10.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:39:10.826 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:39:10.827 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:39:10.827 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:39:10.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:39:10.828 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:10.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:10.828 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:39:10.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:39:10.828 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:39:10.830 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:39:10.830 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:39:10.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:39:10.831 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:10.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:10.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:39:10.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:39:10.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.834 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:39:10.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:39:10.835 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:39:10.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:10.840 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:39:11.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:39:11.365 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:39:11.367 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:39:11.368 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:39:11.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:11.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:11.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:11.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:11.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:11.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:11.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:11.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:11.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:11.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:11.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:11.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:11.800 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:39:11.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:11.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:11.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:11.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:12.278 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:39:12.755 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:39:12.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:12.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:12.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:12.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:13.233 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:39:13.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:39:13.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:13.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:13.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:13.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:14.189 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:39:14.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:14.666 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:39:14.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:14.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:14.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:14.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:15.145 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:39:15.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:15.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:15.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:15.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:15.220 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:15.221 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:15.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:15.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:15.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:15.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:15.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:15.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:15.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:15.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:15.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:15.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:15.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:15.622 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:39:15.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:15.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:15.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:15.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:16.100 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:39:16.578 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:39:17.057 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:39:17.535 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:39:18.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:39:18.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:18.491 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:39:18.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:18.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:18.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:18.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:18.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:18.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:18.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:18.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:18.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:18.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:18.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:18.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:18.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:18.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:18.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:18.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:18.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:18.970 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:39:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:39:19.925 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:39:20.401 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:39:20.879 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:39:21.357 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:39:21.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:21.835 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:39:22.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:22.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:22.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:22.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:22.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:22.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:22.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:22.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:22.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:22.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:22.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:22.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:22.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:22.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:22.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:22.338 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:39:22.816 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:39:23.294 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:39:23.772 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:39:24.250 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:39:24.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:39:25.207 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:39:25.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:25.685 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:39:26.163 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:39:26.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:26.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:26.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:26.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:26.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:26.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:26.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:26.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:26.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:26.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:26.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:26.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:26.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:26.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:26.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:26.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:26.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:39:27.119 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:39:27.596 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:39:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:39:28.553 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:39:29.031 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:39:29.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:29.509 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:39:29.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:29.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:29.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:29.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:29.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:29.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:29.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:29.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:29.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:29.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:29.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:29.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:29.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:29.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:29.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:29.986 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:39:30.465 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:39:30.943 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:39:31.421 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:39:31.899 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:39:32.377 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:39:32.856 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:39:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:33.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:33.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:33.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:33.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:33.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:33.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:33.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:33.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:33.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:33.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:33.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:33.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:33.333 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:39:33.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:33.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:33.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:33.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:33.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:39:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:39:34.767 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:39:35.246 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:39:35.724 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:39:36.202 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:39:36.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:36.680 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:39:37.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:37.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:37.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:37.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:37.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:37.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:37.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:37.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:37.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:37.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:37.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:37.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:37.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:37.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:37.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:37.158 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:39:37.636 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:39:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:39:38.591 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:39:39.069 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:39:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:39:40.026 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:39:40.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:40.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:40.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:40.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:40.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:40.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:40.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:40.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:40.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:40.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:40.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:40.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:40.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:39:40.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:39:40.435 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:39:40.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:40.435 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.435 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.435 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:40.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:45.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:39:45.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:39:45.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:45.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:45.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:45.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:45.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:39:45.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:39:45.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:45.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:39:45.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:39:45.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:39:45.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:39:45.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:39:45.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:45.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:39:45.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:39:45.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:39:45.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:39:45.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:39:45.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:39:45.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:39:45.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:45.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:39:45.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:39:45.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:39:45.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:39:45.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:39:45.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:39:45.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:39:45.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:39:45.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:39:45.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:39:45.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:39:45.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.452 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:39:45.452 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:39:45.453 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:39:45.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:39:45.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:39:45.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:39:45.457 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:39:45.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:39:45.982 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:39:45.984 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:39:45.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:45.986 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:39:46.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:46.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:46.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:46.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:46.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:46.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:46.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:46.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:46.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:46.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:46.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:46.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:39:46.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:46.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:46.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:46.897 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:39:47.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:39:47.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:47.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:47.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:47.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:47.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:39:48.331 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:39:48.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:48.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:48.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:48.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:48.808 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:39:49.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:49.287 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:39:49.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:49.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:49.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:49.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:49.764 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:39:49.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:49.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:49.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:49.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:49.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:49.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:49.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:49.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:49.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:49.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:49.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:49.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:49.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:50.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:39:50.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:39:50.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:39:50.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:39:50.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:39:50.720 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:39:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:39:51.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:39:52.155 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:39:52.633 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:39:52.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:53.111 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:39:53.588 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:39:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:53.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:53.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:53.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:53.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:53.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:53.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:53.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:53.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:53.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:53.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:53.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:53.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:53.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:53.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:54.066 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:39:54.543 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:39:55.022 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:39:55.499 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:39:55.977 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:39:56.455 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:39:56.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:56.933 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:39:57.411 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:39:57.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:57.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:57.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:57.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:57.635 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:57.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:57.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:57.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:57.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:57.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:57.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:57.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:57.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:57.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:57.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:57.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:57.888 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:39:58.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:58.366 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:39:58.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:39:58.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:58.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:58.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:58.608 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=2808 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:39:58.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:39:58.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:39:58.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:39:58.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:58.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:58.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:58.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:39:58.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:39:58.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:39:58.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:39:58.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:39:58.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:58.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:39:58.844 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:39:59.322 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:39:59.800 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:40:00.279 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:40:00.757 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:40:01.236 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:40:01.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:01.714 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:40:02.192 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:40:02.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:02.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:02.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:02.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:02.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:02.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:02.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:02.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:02.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:02.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:02.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:02.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:02.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:02.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:02.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:02.670 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:40:03.145 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:40:03.619 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:40:04.098 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:40:04.576 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:40:05.055 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:40:05.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:40:06.012 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:40:06.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:06.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:06.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:06.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:06.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:06.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:06.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:06.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:06.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:06.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:06.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:06.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:06.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:06.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:06.490 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:40:06.968 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:40:07.446 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:40:07.925 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:40:08.403 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:40:08.880 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:40:09.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:09.358 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:40:09.836 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:40:10.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:10.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:10.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:10.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:10.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:10.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:10.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:10.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:10.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:10.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:10.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:10.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:10.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:10.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:10.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:10.315 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:40:10.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:40:11.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:11.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:11.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:11.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:11.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:11.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:11.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:11.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:11.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:11.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:11.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:11.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:11.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:11.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:11.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:11.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:11.271 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:40:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:40:12.226 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:40:12.704 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:40:13.182 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:40:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:40:14.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:14.137 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:40:14.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:14.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:14.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:14.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:14.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:14.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:14.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:14.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:14.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:14.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:14.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:14.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:14.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:14.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:14.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:14.615 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:40:15.093 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:40:15.571 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:40:16.049 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:40:16.527 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:40:17.005 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:40:17.482 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:40:17.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:17.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:17.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:17.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:17.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:17.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:17.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:17.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:17.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:17.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:17.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:17.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:17.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:17.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:17.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:17.960 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:40:18.438 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:40:18.916 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:40:19.394 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:40:19.872 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:40:20.350 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:40:20.827 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:40:21.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:21.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:21.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:21.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:21.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:21.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:21.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:21.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:21.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:21.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:21.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:21.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:21.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:21.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:21.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:21.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:21.305 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:40:21.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:21.783 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:40:22.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:22.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:22.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:22.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:22.232 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=7851 tn=1 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:22.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:22.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:22.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:22.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:22.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:22.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:22.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:22.260 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:40:22.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:22.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:22.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:22.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:22.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:22.737 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:40:23.216 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:40:23.693 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:40:24.171 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:40:24.649 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:40:25.127 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:40:25.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:25.605 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:40:25.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:26.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:26.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:26.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:26.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:26.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:26.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:26.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:26.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:26.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:26.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:26.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:26.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:26.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:26.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:26.083 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:40:26.562 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:40:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:40:27.517 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:40:27.996 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:40:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:40:28.953 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:40:29.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:29.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:29.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:29.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:29.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:29.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:29.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:29.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:29.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:29.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:29.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:29.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:29.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:29.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:29.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:29.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:29.431 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:40:29.910 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:40:30.388 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:40:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:40:31.345 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:40:31.824 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:40:32.302 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:40:32.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:32.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:32.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:32.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:32.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:32.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:32.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:32.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:32.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:32.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:32.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:32.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:40:32.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:32.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:32.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:32.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:32.781 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:40:33.259 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:40:33.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:33.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:33.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:33.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:33.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:33.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:33.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:33.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:33.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:33.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:33.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:33.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:33.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:40:33.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:40:33.671 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:40:33.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:33.672 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:38.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:40:38.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:40:38.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:38.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:38.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:38.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:38.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:38.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:40:38.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:38.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:40:38.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:40:38.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:40:38.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:40:38.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:40:38.691 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:38.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:38.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:40:38.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:40:38.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:40:38.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:40:38.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:40:38.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:40:38.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:38.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:38.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:40:38.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:40:38.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:40:38.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:40:38.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:40:38.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:40:38.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:38.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:38.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:40:38.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:40:38.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:40:38.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:40:38.702 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:40:38.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:38.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:40:39.191 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:40:39.229 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:40:39.230 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:40:39.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:39.232 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:40:39.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:39.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:39.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:39.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:39.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:39.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:39.240 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:39.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:39.663 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:40:39.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:39.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:39.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:40.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:40:40.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:40:40.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:40.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:40.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:41.088 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:40:41.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:40:41.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:41.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:41.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:41.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:42.040 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:40:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:40:42.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:42.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:42.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:42.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:42.984 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:40:43.454 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:40:43.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:43.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:43.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:43.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:43.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:40:44.402 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:40:44.880 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:40:45.355 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:40:45.824 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:40:46.295 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:40:46.765 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:40:47.235 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:40:47.706 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:40:48.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:48.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:48.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:48.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:48.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:48.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:48.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:48.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:40:48.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:40:48.059 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:40:48.059 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.059 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.059 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.059 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.059 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.060 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:48.060 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:40:53.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:40:53.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:40:53.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:53.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:53.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:53.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:53.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:40:53.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:40:53.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:53.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:40:53.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:40:53.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:40:53.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:40:53.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:40:53.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:53.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:40:53.079 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:40:53.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:40:53.079 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:40:53.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:40:53.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:40:53.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:40:53.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:40:53.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:40:53.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:40:53.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:40:53.083 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:40:53.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:40:53.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:40:53.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:40:53.606 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:40:53.609 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:40:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:40:53.611 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:40:53.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:40:53.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:40:53.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:40:53.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:40:53.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:40:53.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:40:53.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:40:53.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:40:54.048 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:40:54.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:54.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:54.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:54.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:54.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:40:54.992 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:40:55.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:55.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:55.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:55.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:40:55.932 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:40:56.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:56.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:56.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:56.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:56.403 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:40:56.874 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:40:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:57.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:57.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:57.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:57.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:40:57.818 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:40:58.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:40:58.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:40:58.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:40:58.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:40:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:40:58.757 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:40:59.227 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:40:59.699 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:41:00.169 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:41:00.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:41:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:41:01.581 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:41:02.052 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:41:02.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:02.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:02.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:02.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:02.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:02.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:02.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:02.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:02.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:02.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:02.403 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:41:02.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:07.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:07.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:07.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:07.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:07.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:07.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:07.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:07.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:07.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:07.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:41:07.428 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:41:07.428 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:41:07.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:07.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:07.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:07.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:41:07.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:07.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:41:07.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:41:07.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:41:07.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:07.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:07.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:07.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:41:07.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:07.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:07.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:41:07.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:07.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:41:07.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:41:07.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:41:07.439 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:41:07.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:07.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:41:07.928 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:41:07.970 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:07.972 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:41:07.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:07.974 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:41:07.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:07.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:07.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:08.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:41:08.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:08.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:08.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:08.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:08.866 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:41:08.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:08.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:08.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:08.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:08.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:09.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:41:09.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:09.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:09.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:09.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:09.819 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:41:10.291 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:41:10.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:10.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:10.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:10.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:41:11.232 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:41:11.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:11.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:11.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:11.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:41:12.181 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:41:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:12.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:12.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:12.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:41:13.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:41:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:41:14.071 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:41:14.542 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:41:15.013 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:41:15.484 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:41:15.955 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:41:16.425 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:41:16.896 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:41:17.367 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:41:17.838 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:41:18.315 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:41:18.792 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:41:19.270 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:41:19.747 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:41:20.225 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:41:20.703 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:41:20.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:20.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:20.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:20.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:20.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:20.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:20.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:20.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:20.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:20.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:20.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:20.787 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:41:20.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:25.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:25.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:25.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:25.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:25.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:25.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:25.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:25.805 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:25.805 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:25.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:25.806 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:41:25.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:41:25.812 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:41:25.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:25.813 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:25.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:25.814 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:41:25.814 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:25.814 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:41:25.816 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:41:25.816 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:41:25.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:25.817 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:25.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:25.817 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:41:25.817 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:25.817 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:41:25.819 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:41:25.819 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:41:25.819 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:25.819 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:25.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:25.820 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:41:25.820 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:25.820 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:41:25.823 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:41:25.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:41:25.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:41:25.825 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:41:25.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:25.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:25.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:41:26.314 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:41:26.358 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:26.360 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:41:26.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:26.363 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:41:26.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:26.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:26.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:26.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:26.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:26.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:26.791 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:41:26.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:26.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:26.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:26.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:27.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:41:27.404 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:27.747 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:41:27.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:27.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:27.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:27.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:27.950 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:28.225 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:41:28.473 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:28.702 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:41:28.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:28.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:28.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:28.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:29.180 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:41:29.657 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:41:29.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:29.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:29.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:29.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:30.136 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:41:30.495 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:30.613 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:41:30.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:30.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:30.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:30.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:31.004 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:31.090 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:41:31.527 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:31.568 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:41:32.046 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:41:32.059 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:32.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:41:33.001 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:41:33.478 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:41:33.956 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:41:34.080 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:34.434 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:41:34.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:41:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:41:35.894 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:41:36.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:36.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:36.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:36.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:36.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:36.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:36.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:36.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:36.101 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:41:36.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:36.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2188 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:41.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:41.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:41.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:41.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:41.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:41.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:41.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:41.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:41.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:41.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:41.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:41:41.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:41:41.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:41:41.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:41.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:41.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:41.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:41:41.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:41.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:41.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:41:41.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:41.119 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:41:41.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:41:41.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:41:41.121 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:41.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:41.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:41.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:41:41.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:41.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:41:41.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:41:41.126 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:41:41.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:41.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:41:41.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:41:41.657 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:41.659 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:41:41.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:41.661 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:41:41.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:41.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:41.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:41.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:41.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:41.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:41.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:41.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:41.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:41.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:41.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:41.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:41.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:41.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:41.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:41.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:41.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:41.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:41.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:41.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:41.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:41.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:41.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:41.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:41.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:41:42.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:42.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:42.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:42.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:41:42.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:42.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:42.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:42.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:42.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:42.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:42.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:42.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:42.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:42.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:42.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:42.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:42.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.038 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:41:43.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:43.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:43.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:43.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:43.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:43.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:43.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:43.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:43.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:43.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.135 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:43.135 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:43.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.377 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=484 tn=1 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:43.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:43.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:43.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:43.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:43.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.511 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:41:43.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:43.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:43.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:43.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:43.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:43.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:43.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:43.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:43.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:43.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:43.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:43.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:43.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:43.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:43.988 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:41:44.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:44.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:44.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:44.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:44.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:44.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:44.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:44.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:44.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:44.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:44.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:44.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:44.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:44.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:44.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:44.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:44.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:44.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:44.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:44.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:44.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:44.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:44.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:44.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:44.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:44.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:44.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:44.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:44.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.465 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:41:44.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:44.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:44.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:44.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:44.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:44.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:44.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:44.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:44.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:44.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:44.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:44.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:44.675 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:41:44.675 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=760 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.675 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=760 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=760 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=760 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:44.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:49.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:49.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:49.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:49.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:49.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:49.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:49.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:49.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:49.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:49.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:49.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:41:49.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:41:49.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:41:49.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:49.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:49.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:49.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:41:49.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:49.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:41:49.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:41:49.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:41:49.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:49.699 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:49.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:49.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:41:49.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:49.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:41:49.702 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:41:49.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:41:49.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:49.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:49.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:49.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:41:49.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:49.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:41:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.707 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:41:49.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:41:49.707 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:41:49.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:49.712 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:41:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:41:50.242 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:41:50.244 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:41:50.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:50.246 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:41:50.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:50.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:50.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:41:50.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:50.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:50.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:50.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:41:50.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:41:50.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 01:41:50.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:41:50.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:41:50.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:50.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:41:50.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:41:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:41:50.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:50.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:50.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:50.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:51.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:41:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:41:51.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:51.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:51.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:51.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:52.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:41:52.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:41:52.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:41:52.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:41:52.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:41:52.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:41:52.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:41:52.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:52.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:52.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:52.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:52.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:52.363 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:41:52.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:52.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:41:57.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:57.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:57.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:57.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:57.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:57.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:57.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:57.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:57.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:57.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:41:57.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:41:57.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:41:57.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:41:57.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:57.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:57.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:57.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:41:57.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:41:57.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:41:57.382 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:41:57.382 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:41:57.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:57.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:57.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:57.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:41:57.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:41:57.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:41:57.384 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:41:57.384 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:41:57.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:57.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:41:57.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:57.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:41:57.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:41:57.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:41:57.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:41:57.388 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:41:57.388 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:41:57.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:41:57.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:41:57.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:41:57.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:41:57.390 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:02.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:02.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:02.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:02.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:02.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:02.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:02.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:02.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:02.405 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:02.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:02.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:02.407 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:02.407 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:02.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:02.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:02.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:02.409 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:02.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:02.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:02.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:02.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:02.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:02.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:02.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:02.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:02.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:02.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:02.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:02.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:02.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:02.412 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:02.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:02.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:02.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:02.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:02.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:02.416 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:02.416 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:02.416 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:02.421 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:42:02.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:42:02.948 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:02.950 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:02.952 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:42:02.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:03.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:42:03.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:03.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:03.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:03.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:03.867 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:42:04.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:42:04.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:04.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:04.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:04.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:04.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:42:05.309 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:42:05.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:05.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:05.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:05.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:05.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:42:06.266 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:42:06.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:06.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:06.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:06.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:06.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:42:07.224 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:07.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:07.704 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:42:08.182 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:42:08.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:08.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:08.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:08.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:08.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:08.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:08.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:08.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:08.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:08.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:08.438 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:08.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:13.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:13.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:13.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:13.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:13.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:13.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:13.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:13.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:13.451 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:13.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:13.451 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:13.453 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:13.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:13.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:13.454 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:13.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:13.455 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:13.455 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:13.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:13.456 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:13.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:13.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:13.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:13.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:13.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:13.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:13.457 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:13.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:13.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:13.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:13.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:13.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:13.459 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:13.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:13.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:13.461 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:13.461 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:13.461 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:13.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:13.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:42:13.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:42:13.989 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:13.991 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:13.992 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:42:13.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:14.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:42:14.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:14.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:14.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:14.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:14.900 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:42:15.370 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:42:15.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:15.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:15.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:15.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:15.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:42:16.334 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:42:16.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:16.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:16.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:16.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:16.815 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:42:17.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:42:17.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:17.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:17.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:17.777 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:42:18.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:42:18.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:18.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:18.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:18.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:18.739 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:42:19.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:19.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:19.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:19.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:19.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:19.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:19.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:19.005 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:19.005 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1181 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:19.005 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1181 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:19.005 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1181 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:24.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:24.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:24.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:24.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:24.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:24.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:24.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:24.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:24.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:24.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:24.019 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:24.021 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:24.021 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:24.021 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:24.023 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:24.023 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:24.023 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:24.025 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:24.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:24.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:24.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:24.028 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:24.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:24.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:24.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:24.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:24.029 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:29.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:29.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:29.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:29.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:29.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:29.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:29.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:29.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:29.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:29.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:29.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:29.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:29.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:29.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:29.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:29.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:29.048 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:29.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:29.048 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:29.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:29.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:29.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:29.051 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:29.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:29.051 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:29.051 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:29.051 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:29.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:29.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:29.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:29.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:29.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:29.057 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:29.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:29.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:42:29.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:42:29.590 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:29.592 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:29.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:29.595 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:42:29.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:42:29.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:42:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:42:30.027 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:42:30.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:30.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:30.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:30.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:30.499 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:42:30.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:30.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:42:30.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:42:30.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:42:30.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:42:30.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:42:31.062 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:31.062 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:31.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:31.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:31.453 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:42:31.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:42:32.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:32.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:32.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:32.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:32.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:42:32.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:42:33.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:33.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:33.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:33.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:33.345 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:42:33.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:42:34.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:34.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:34.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:34.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:34.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:42:34.756 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:42:35.234 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:42:35.711 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:42:36.188 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:42:36.665 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:42:37.143 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:42:37.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:42:38.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:42:38.593 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:42:39.064 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:42:39.535 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:42:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:42:40.490 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:42:40.968 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:42:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:42:41.923 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:42:42.401 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:42:42.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:42:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:42:43.836 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:42:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:42:44.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:42:44.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:42:44.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:44.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:44.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:44.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:44.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:44.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:44.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:44.464 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:44.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:49.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:49.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:49.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:49.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:49.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:49.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:49.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:49.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:49.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:49.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:49.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:49.471 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:49.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:49.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:49.472 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:49.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:49.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:49.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:49.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:49.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:49.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:49.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:49.476 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:49.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:49.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:49.480 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:49.480 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:49.480 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:49.485 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:42:49.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:42:50.006 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:50.007 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:50.008 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:42:50.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:42:50.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:42:50.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:42:50.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:50.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:42:50.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:42:50.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:42:50.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:42:50.061 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:50.064 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:50.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:50.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:42:50.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:42:50.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:50.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:50.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:42:50.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:50.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:50.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:50.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:50.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:42:50.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:42:50.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:42:50.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:50.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:50.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:50.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:50.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:50.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:50.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:50.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:50.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:50.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:50.954 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:50.954 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:42:55.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:42:55.958 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:42:55.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:55.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:55.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:55.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:55.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:42:55.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:55.970 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:55.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:42:55.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:42:55.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:42:55.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:42:55.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:55.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:55.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:42:55.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:42:55.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:42:55.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:42:55.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:42:55.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:42:55.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:55.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:55.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:42:55.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:42:55.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:42:55.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:42:55.981 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:42:55.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:42:55.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:55.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:42:55.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:42:55.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:42:55.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:42:55.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:42:55.985 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:42:55.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:42:55.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:42:55.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:42:55.987 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:42:55.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:42:55.992 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:42:56.476 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:42:56.522 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:56.524 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:56.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:56.526 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:42:56.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:42:56.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:42:56.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:42:56.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:56.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:42:56.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:42:56.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:42:56.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:42:56.569 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:42:56.572 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:42:56.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:42:56.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:42:56.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:42:56.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:56.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:42:56.954 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:42:56.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:56.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:56.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:56.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:57.431 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:42:57.909 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:42:57.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:57.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:57.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:57.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:58.387 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:42:58.866 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:42:58.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:58.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:58.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:58.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:42:59.343 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:42:59.821 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:42:59.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:42:59.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:42:59.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:42:59.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:00.299 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:43:00.776 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:43:00.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:00.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:00.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:00.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:01.253 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:43:01.731 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:43:02.209 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:43:02.686 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:43:03.163 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:43:03.641 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:43:04.119 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:43:04.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:04.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:04.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:04.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:04.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:04.597 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:43:04.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:04.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:04.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:04.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:04.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:04.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:04.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:04.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:04.602 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:43:04.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:04.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.603 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.603 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.603 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.603 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:04.603 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:09.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:09.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:09.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:09.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:09.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:09.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:09.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:09.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:09.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:09.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:09.613 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:43:09.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:43:09.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:43:09.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:09.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:09.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:09.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:43:09.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:09.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:43:09.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:09.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:09.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:43:09.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:09.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:09.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:09.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:43:09.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:09.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:43:09.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:43:09.620 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:43:09.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:09.625 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:43:10.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:43:10.146 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:10.149 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:10.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:10.149 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:43:10.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:10.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:10.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:43:10.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:10.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:10.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:10.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:43:10.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:43:10.201 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:10.205 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:10.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:10.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:10.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:10.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:10.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:10.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:43:10.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:10.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:10.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:10.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:11.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:43:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:43:11.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:11.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:11.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:11.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:12.021 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:43:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:43:12.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:12.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:12.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:12.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:12.978 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:43:13.456 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:43:13.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:13.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:13.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:13.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:13.934 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:43:14.412 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:43:14.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:14.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:14.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:14.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:14.890 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:43:15.368 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:43:15.846 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:43:16.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:43:16.802 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:43:17.281 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:43:17.759 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:43:18.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:18.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:18.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:18.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:18.237 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:43:18.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:18.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:18.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:43:18.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:18.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:18.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:18.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:43:18.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:43:18.283 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:18.286 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:18.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:18.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:18.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:18.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:18.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:43:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:43:19.670 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:43:20.148 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:43:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:43:21.104 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:43:21.582 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:43:22.061 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:43:22.538 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:43:23.016 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:43:23.493 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:43:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:43:24.449 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:43:24.927 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:43:25.405 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:43:25.883 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:43:26.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:26.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:26.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:26.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:26.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:26.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:26.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:26.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:26.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:26.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:26.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:26.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:26.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:26.315 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:43:26.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:31.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:31.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:31.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:31.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:31.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:31.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:31.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:31.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:31.330 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:31.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:31.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:43:31.332 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:43:31.333 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:43:31.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:31.333 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:31.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:31.334 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:43:31.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:31.334 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:43:31.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:43:31.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:43:31.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:31.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:31.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:31.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:43:31.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:31.336 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:43:31.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:43:31.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:43:31.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:31.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:31.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:31.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:43:31.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:31.338 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:43:31.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:43:31.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:43:31.341 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:43:31.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:43:31.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:43:31.874 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:31.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:31.877 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:31.880 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:43:31.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:31.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:31.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:43:31.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:31.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:31.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:31.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:43:31.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:43:31.922 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:31.925 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:31.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:31.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:31.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:31.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:31.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:43:32.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:32.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:32.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:32.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:32.786 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:43:33.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:43:33.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:33.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:33.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:33.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:33.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:43:34.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:43:34.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:34.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:34.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:34.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:34.697 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:43:35.176 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:43:35.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:35.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:35.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:35.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:35.652 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:43:36.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:43:36.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:36.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:36.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:36.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:36.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:43:37.083 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:43:37.560 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:43:38.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:43:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:43:38.993 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:43:39.472 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:43:39.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:39.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:39.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:39.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:39.949 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:43:39.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:39.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:39.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:43:39.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:39.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:39.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:39.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:43:39.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:43:39.995 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:39.999 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:40.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:40.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:40.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:40.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:40.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:40.427 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:43:40.905 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:43:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:43:41.861 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:43:42.339 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:43:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:43:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:43:43.775 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:43:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:43:44.731 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:43:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:43:45.687 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:43:46.166 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:43:46.644 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:43:47.122 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:43:47.600 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:43:48.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:48.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:48.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:48.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:48.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:48.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:48.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:48.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:48.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:48.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:48.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:48.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:48.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:48.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:48.030 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:48.030 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:43:53.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:43:53.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:43:53.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:53.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:53.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:53.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:53.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:43:53.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:53.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:53.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:43:53.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:43:53.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:43:53.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:43:53.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:53.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:53.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:43:53.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:43:53.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:43:53.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:43:53.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:43:53.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:43:53.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:53.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:53.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:43:53.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:43:53.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:43:53.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:43:53.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:43:53.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:43:53.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:53.069 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:43:53.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:43:53.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:43:53.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:43:53.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:43:53.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:43:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:43:53.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:43:53.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:43:53.074 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:43:53.074 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:43:53.079 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:43:53.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:43:53.601 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:53.602 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:53.602 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:43:53.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:53.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:43:53.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:43:53.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:43:53.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:53.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:53.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:53.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:43:53.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:43:53.652 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:43:53.656 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:43:53.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:43:53.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:43:53.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:43:53.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:53.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:43:54.037 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:43:54.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:54.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:54.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:54.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:54.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:43:54.994 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:43:55.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:55.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:55.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:55.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:55.472 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:43:55.949 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:43:56.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:56.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:56.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:56.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:56.428 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:43:56.906 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:43:57.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:57.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:57.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:57.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:43:57.861 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:43:58.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:43:58.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:43:58.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:43:58.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:43:58.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:43:58.815 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:43:59.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:43:59.772 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:44:00.250 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:44:00.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:44:01.206 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:44:01.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:01.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:01.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:01.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:01.683 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:44:01.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:01.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:01.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:01.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:01.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:01.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:01.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:01.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:01.729 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:01.732 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:01.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:01.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:01.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:01.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:01.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:02.160 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:44:02.639 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:44:03.117 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:44:03.595 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:44:04.073 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:44:04.561 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:44:05.039 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:44:05.517 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:44:05.995 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:44:06.473 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:44:06.951 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:44:07.429 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:44:07.908 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:44:08.385 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:44:08.862 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:44:09.339 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:44:09.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:09.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:09.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:09.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:09.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:09.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:09.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:09.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:09.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:09.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:09.765 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:44:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:09.766 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:14.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:14.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:14.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:14.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:14.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:14.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:14.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:14.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:14.777 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:14.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:14.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:44:14.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:44:14.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:44:14.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:14.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:14.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:14.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:44:14.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:14.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:44:14.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:44:14.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:44:14.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:14.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:14.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:14.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:44:14.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:14.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:44:14.787 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:44:14.787 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:44:14.787 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:14.787 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:14.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:14.787 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:44:14.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:14.788 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:44:14.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:44:14.791 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:44:14.791 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:44:14.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:14.796 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:44:15.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:44:15.317 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:15.319 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:15.320 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:44:15.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:15.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:15.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:15.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:15.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:15.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:15.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:15.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:15.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:15.372 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:15.375 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:15.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:15.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:15.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:15.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:15.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:15.757 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:44:15.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:15.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:15.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:15.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:16.235 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:44:16.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:16.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:16.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:16.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:16.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:16.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:16.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:16.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:16.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:16.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:16.267 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:44:16.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:16.268 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:21.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:21.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:21.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:21.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:21.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:21.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:21.283 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:21.284 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:21.284 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:44:21.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:44:21.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:44:21.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:21.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:21.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:21.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:44:21.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:21.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:44:21.294 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:44:21.294 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:44:21.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:21.294 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:21.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:21.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:44:21.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:21.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:44:21.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:44:21.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:44:21.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:21.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:21.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:21.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:44:21.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:21.299 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:44:21.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:44:21.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:44:21.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:44:21.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:44:21.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:44:21.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:44:21.303 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:44:21.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:21.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:44:21.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:44:21.839 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:21.841 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:21.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:21.844 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:44:21.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:21.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:21.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:21.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:21.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:21.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:21.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:21.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:21.884 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:21.886 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:21.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:21.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:21.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:21.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:21.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:22.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:44:22.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:22.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:22.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:22.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:22.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:44:23.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:44:23.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:23.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:23.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:23.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:23.703 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:44:24.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:44:24.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:24.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:24.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:24.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:24.659 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:44:25.137 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:44:25.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:25.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:25.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:25.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:25.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:44:26.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:44:26.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:26.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:26.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:26.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:26.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:44:27.050 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:44:27.528 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:44:28.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:44:28.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:44:28.962 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:44:29.440 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:44:29.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:29.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:29.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:29.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:29.918 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:44:29.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:29.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:29.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:29.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:29.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:29.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:29.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:29.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:29.963 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:29.966 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:29.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:29.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:29.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:29.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:29.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:30.395 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:44:30.873 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:44:31.351 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:44:31.829 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:44:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:44:32.786 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:44:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:44:33.742 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:44:34.219 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:44:34.698 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:44:35.176 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:44:35.654 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:44:36.132 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:44:36.610 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:44:37.089 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:44:37.567 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:44:37.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:37.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:37.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:37.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:37.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:37.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:37.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:37.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:37.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:37.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:37.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:37.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:37.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:37.989 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:44:37.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:37.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:44:42.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:44:42.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:44:42.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:42.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:42.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:42.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:43.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:44:43.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:43.006 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:43.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:44:43.006 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:44:43.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:44:43.009 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:44:43.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:43.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:43.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:44:43.009 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:44:43.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:44:43.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:44:43.011 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:44:43.011 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:44:43.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:43.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:43.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:44:43.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:44:43.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:44:43.012 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:43.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:44:43.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:44:43.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:44:43.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:44:43.015 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:44:43.015 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:44:43.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:44:43.020 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:44:43.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:44:43.540 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:43.543 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:43.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:43.545 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:44:43.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:43.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:43.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:43.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:43.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:43.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:43.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:43.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:43.595 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:43.598 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:43.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:43.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:43.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:43.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:43.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:43.978 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:44:44.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:44.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:44.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:44.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:44:44.934 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:44:45.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:45.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:45.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:45.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:45.408 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:44:45.885 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:44:46.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:46.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:46.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:46.363 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:44:46.840 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:44:47.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:47.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:47.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:47.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:47.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:44:47.795 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:44:48.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:44:48.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:44:48.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:44:48.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:44:48.273 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:44:48.750 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:44:49.228 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:44:49.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:44:50.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:44:50.661 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:44:51.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:44:51.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:51.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:51.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:51.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:51.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:44:51.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:51.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:51.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:51.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:51.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:51.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:51.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:51.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:51.663 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:51.669 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:51.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:51.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:51.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:51.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:51.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:52.094 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:44:52.572 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:44:53.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:44:53.527 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:44:54.005 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:44:54.483 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:44:54.960 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:44:55.438 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:44:55.916 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:44:56.394 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:44:56.871 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:44:57.349 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:44:57.827 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:44:58.304 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:44:58.782 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:44:59.260 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:44:59.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:59.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:59.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:59.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:59.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:44:59.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:44:59.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:44:59.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:59.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:59.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:59.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:44:59.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:44:59.730 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:44:59.734 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:44:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:44:59.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:44:59.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:44:59.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:44:59.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:44:59.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:45:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:45:01.169 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:45:01.647 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:45:02.124 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:45:02.602 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:45:03.080 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:45:03.558 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:45:04.036 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:45:04.513 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:45:04.990 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:45:05.467 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:45:05.944 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:45:06.422 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:45:06.900 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:45:07.378 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:45:07.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:07.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:07.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:07.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:07.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:07.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:07.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:07.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:07.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:07.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:07.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:07.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:07.800 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:07.804 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:07.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:07.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:07.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:07.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:07.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:07.856 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:45:08.333 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:45:08.811 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:45:09.288 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:45:09.766 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:45:10.244 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:45:10.722 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:45:11.200 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:45:11.677 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:45:12.155 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:45:12.633 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:45:13.111 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:45:13.588 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:45:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:45:14.544 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:45:15.022 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:45:15.500 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:45:15.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:15.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:15.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:15.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:15.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:15.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:15.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:45:15.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:45:15.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:45:15.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:45:15.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:45:15.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:45:15.835 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:15.835 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7010 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:45:20.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:45:20.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:45:20.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:45:20.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:45:20.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:45:20.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:45:20.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:45:20.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:45:20.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:45:20.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:45:20.847 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:45:20.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:45:20.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:45:20.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:45:20.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:45:20.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:45:20.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:45:20.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:45:20.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:45:20.851 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:45:20.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:45:20.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:45:20.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:45:20.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:45:20.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:45:20.852 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:45:20.852 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:45:20.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:45:20.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:45:20.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:45:20.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:45:20.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:45:20.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:45:20.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:45:20.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:45:20.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:45:20.856 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:45:20.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:45:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:45:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:45:20.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:45:21.342 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:45:21.381 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:21.382 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:21.384 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:45:21.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:21.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:21.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:21.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:21.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:21.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:21.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:21.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:21.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:21.434 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:21.437 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:21.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:21.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:21.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:21.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:21.818 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:45:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:21.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:21.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:21.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:22.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:45:22.775 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:45:22.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:22.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:22.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:23.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:45:23.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:45:23.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:23.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:23.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:23.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:24.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:45:24.686 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:45:24.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:24.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:24.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:24.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:25.165 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:45:25.642 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:45:25.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:45:25.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:45:25.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:45:25.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:45:26.121 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:45:26.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:45:27.077 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:45:27.555 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:45:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:45:28.511 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:45:28.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:45:29.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:29.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:29.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:29.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:29.467 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:45:29.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:29.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:29.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:29.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:29.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:29.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:29.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:29.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:29.513 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:29.518 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:29.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:29.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:29.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:29.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:29.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:29.944 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:45:30.423 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:45:30.901 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:45:31.378 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:45:31.856 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:45:32.335 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:45:32.813 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:45:33.291 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:45:33.769 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:45:34.247 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:45:34.725 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:45:35.203 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:45:35.682 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:45:36.160 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:45:36.638 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:45:37.116 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:45:37.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:37.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:37.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:37.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:37.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:37.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:37.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:37.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:37.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:37.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:37.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:37.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:37.586 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:37.590 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:37.593 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:45:37.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:37.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:37.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:37.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:37.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:38.071 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:45:38.548 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:45:39.026 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:45:39.504 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:45:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:45:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:45:40.937 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:45:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:45:41.892 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:45:42.370 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:45:42.847 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:45:43.325 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:45:43.802 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:45:44.280 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:45:44.758 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:45:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:45:45.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:45.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:45.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:45.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:45.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:45.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:45.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:45.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:45.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:45.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:45.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:45.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:45.655 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:45.657 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:45.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:45.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:45.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:45.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:45.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:45.712 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:45:46.190 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:45:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:45:47.146 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:45:47.624 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:45:48.102 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:45:48.580 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:45:49.058 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:45:49.535 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:45:50.013 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:45:50.490 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:45:50.967 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:45:51.445 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:45:51.923 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:45:52.400 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:45:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:45:53.355 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:45:53.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:53.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:53.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:53.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:53.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:45:53.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:45:53.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:45:53.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:53.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:53.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:53.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:45:53.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:45:53.728 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:45:53.732 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:45:53.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:45:53.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:45:53.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:45:53.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:53.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:45:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:45:54.310 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:45:54.788 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:45:55.267 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:45:55.745 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:45:56.224 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:45:56.701 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:45:57.179 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:45:57.657 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:45:58.135 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:45:58.613 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:45:59.091 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:45:59.569 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:46:00.048 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:46:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:46:01.004 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:46:01.482 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:46:01.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:01.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:01.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:01.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:01.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:01.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:01.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:01.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:01.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:01.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:01.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:01.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:01.810 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:01.814 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:01.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:01.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:01.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:01.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:01.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:01.960 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:46:02.438 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:46:02.916 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:46:03.394 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:46:03.873 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:46:04.351 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:46:04.829 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:46:05.307 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:46:05.785 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:46:06.262 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:46:06.741 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:46:07.219 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:46:07.697 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:46:08.176 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:46:08.653 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:46:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 01:46:09.608 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 01:46:09.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:09.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:09.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:09.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:09.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:09.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:09.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:09.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:09.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:09.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:09.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:09.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:09.889 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:09.893 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:09.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:09.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:09.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:09.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:09.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:10.086 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 01:46:10.564 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 01:46:11.042 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 01:46:11.515 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 01:46:11.987 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 01:46:12.456 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 01:46:12.929 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 01:46:13.400 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 01:46:13.872 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 01:46:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 01:46:14.828 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 01:46:15.306 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 01:46:15.784 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 01:46:16.262 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 01:46:16.740 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 01:46:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 01:46:17.695 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 01:46:17.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:17.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:17.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:17.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:17.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:17.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:17.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:17.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:17.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:17.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:17.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:17.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:17.977 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:17.981 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:17.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:17.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:17.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:17.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:17.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 01:46:18.650 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 01:46:19.128 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 01:46:19.606 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 01:46:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 01:46:20.587 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 01:46:21.065 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 01:46:21.544 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 01:46:22.021 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 01:46:22.498 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 01:46:22.976 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 01:46:23.452 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 01:46:23.931 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 01:46:24.409 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 01:46:24.886 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 01:46:25.364 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 01:46:25.842 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 01:46:25.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:25.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:25.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:25.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:26.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:26.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:26.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:26.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:26.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:26.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:26.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:26.015 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:46:26.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:46:26.016 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:46:26.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:26.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:26.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:26.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:26.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:26.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:26.017 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13910 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:31.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:46:31.015 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:46:31.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:31.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:31.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:31.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:31.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:31.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:46:31.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:31.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:46:31.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:46:31.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:46:31.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:46:31.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:46:31.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:46:31.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:46:31.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:46:31.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:46:31.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:46:31.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:46:31.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:31.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:31.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:46:31.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:46:31.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:46:31.035 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:46:31.035 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:46:31.035 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:31.040 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:46:31.524 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:46:31.557 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:31.558 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:31.559 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:46:31.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:31.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:31.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:31.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:31.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:31.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:31.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:31.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:31.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:31.615 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:31.619 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:31.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:31.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:31.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:32.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:46:32.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:32.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:32.478 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:46:32.956 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:46:33.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:33.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:33.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:33.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:46:33.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:46:34.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:34.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:34.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:34.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:34.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:46:34.868 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:46:35.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:35.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:35.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:46:35.825 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:46:36.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:36.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:36.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:36.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:36.303 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:46:36.777 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:46:37.251 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:46:37.729 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:46:38.207 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:46:38.684 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:46:39.162 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:46:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:39.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:39.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:39.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:39.640 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:46:39.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:39.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:39.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:39.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:39.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:39.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:39.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:39.686 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:39.690 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:39.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:39.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:39.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:39.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:39.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:40.118 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:46:40.596 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:46:41.074 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:46:41.552 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:46:42.030 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:46:42.508 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:46:42.985 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:46:43.463 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:46:43.942 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:46:44.420 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:46:44.898 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:46:45.376 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:46:45.854 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:46:46.333 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:46:46.811 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:46:47.289 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:46:47.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:47.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:47.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:47.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:47.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:47.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:47.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:47.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:47.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:47.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:47.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:47.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:46:47.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:46:47.715 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:46:47.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:47.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:46:52.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:46:52.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:46:52.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:52.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:52.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:52.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:52.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:46:52.737 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:46:52.737 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:52.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:46:52.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:46:52.742 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:46:52.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:46:52.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:46:52.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:52.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:46:52.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:46:52.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:46:52.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:46:52.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:46:52.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:46:52.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:46:52.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:52.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:46:52.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:46:52.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:46:52.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:46:52.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:46:52.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:46:52.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:46:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:46:52.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:46:52.751 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:46:52.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:46:52.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:46:53.241 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:46:53.274 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:46:53.276 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:46:53.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:53.278 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:46:53.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:46:53.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:46:53.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:46:53.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:53.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:53.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:53.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:46:53.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:46:53.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:46:53.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:46:53.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:46:53.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:53.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:46:53.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:46:53.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:53.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:53.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:53.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:54.196 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:46:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:46:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:54.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:54.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:46:55.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:46:55.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:55.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:55.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:56.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:46:56.585 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:46:56.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:56.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:56.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:56.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:57.063 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:46:57.541 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:46:57.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:46:57.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:46:57.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:46:57.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:46:58.019 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:46:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:46:58.975 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:46:59.452 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:46:59.930 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:47:00.408 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:47:00.886 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:47:01.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:01.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:01.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:01.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:01.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:47:01.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:01.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:01.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:01.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:01.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:01.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:01.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:01.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:01.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:01.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:01.373 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:47:01.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.374 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.374 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.374 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:01.374 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:06.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:06.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:06.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:06.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:06.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:06.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:06.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:06.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:06.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:06.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:06.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:47:06.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:47:06.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:47:06.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:06.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:06.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:06.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:47:06.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:06.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:47:06.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:47:06.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:47:06.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:06.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:06.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:06.395 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:47:06.395 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:06.395 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:06.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:47:06.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:06.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:47:06.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:47:06.400 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:47:06.400 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:47:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:47:06.924 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:47:06.925 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:47:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:06.926 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:47:06.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:06.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:06.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:47:06.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:06.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:47:06.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:47:06.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:47:06.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:47:06.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:06.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:47:06.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:47:06.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:06.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:07.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:47:07.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:07.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:07.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:07.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:07.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:47:08.322 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:47:08.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:08.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:08.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:08.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:08.799 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:47:09.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:47:09.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:09.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:09.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:09.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:09.755 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:47:10.234 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:47:10.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:10.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:10.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:10.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:10.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:47:11.190 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:47:11.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:11.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:11.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:11.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:11.668 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:47:12.146 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:47:12.625 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:47:13.103 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:47:13.581 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:47:14.059 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:47:14.537 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:47:14.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:14.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:14.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:14.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:15.015 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:47:15.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:15.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:15.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:15.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:15.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:15.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:15.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:15.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:15.021 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:47:15.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:20.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:20.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:20.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:20.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:20.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:20.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:20.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:20.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:20.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:20.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:20.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:47:20.035 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:47:20.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:47:20.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:20.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:20.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:20.036 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:47:20.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:20.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:20.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:47:20.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:20.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:47:20.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:47:20.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:47:20.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:20.043 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:20.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:20.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:47:20.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:20.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:47:20.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:47:20.048 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:47:20.048 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:47:20.048 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:20.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:20.053 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:47:20.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:47:20.574 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:47:20.575 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:47:20.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:20.576 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:47:20.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:20.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:20.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:47:20.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:20.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:47:20.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:47:20.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:47:20.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:47:21.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:47:21.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:21.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:21.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:21.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:21.491 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:47:21.969 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:47:22.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:22.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:22.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:22.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:22.446 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:47:22.924 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:47:23.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:23.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:23.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:23.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:23.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:47:23.879 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:47:24.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:24.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:24.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:24.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:24.356 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:47:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:47:25.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:25.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:25.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:25.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:25.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:47:25.791 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:47:26.268 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:47:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:47:27.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:27.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:27.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:27.094 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:47:27.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:32.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:32.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:32.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:32.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:32.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:32.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:32.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:32.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:32.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:47:32.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:47:32.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:47:32.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:32.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:32.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:32.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:47:32.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:32.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:47:32.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:47:32.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:47:32.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:32.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:32.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:32.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:47:32.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:32.122 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:47:32.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:47:32.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:47:32.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:32.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:32.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:32.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:47:32.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:32.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:47:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:47:32.129 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:47:32.129 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:47:32.129 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:32.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:32.134 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:47:32.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:47:32.655 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:47:32.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:32.657 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:47:32.659 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:47:32.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:32.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:32.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:47:32.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:32.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:47:32.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:47:32.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:47:32.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:47:33.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:47:33.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:33.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:33.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:33.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:33.567 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:47:34.045 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:47:34.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:34.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:34.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:34.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:34.522 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:47:35.000 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:47:35.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:35.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:35.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:35.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:35.478 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:47:35.956 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:47:36.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:36.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:36.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:36.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:36.434 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:47:36.912 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:47:37.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:37.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:37.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:37.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:37.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:37.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:37.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.170 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.171 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:47:37.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:47:37.880 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:47:38.366 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:47:38.848 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:47:39.335 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:47:39.820 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:47:40.306 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:47:40.792 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:47:41.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:47:41.765 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:47:42.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:42.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:42.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:42.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:42.176 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:47:42.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:42.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:42.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:42.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:42.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:42.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:42.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:42.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:42.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:42.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:47:42.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:42.183 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:42.185 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:47:42.185 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:42.185 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:42.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:47:42.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:42.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:47:42.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:47:42.188 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:47:42.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:42.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:42.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:42.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:42.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:42.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:42.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:42.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:42.190 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:47:47.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:47:47.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:47:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:47.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:47.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:47.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:47.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:47.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:47.209 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:47.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:47:47.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:47:47.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:47:47.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:47:47.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:47.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:47.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:47:47.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:47:47.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:47:47.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:47:47.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:47:47.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:47:47.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:47.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:47:47.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:47:47.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:47:47.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:47:47.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:47:47.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:47:47.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:47.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:47:47.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:47:47.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:47:47.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:47:47.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:47:47.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:47:47.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:47:47.223 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:47:47.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:47:47.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:47:47.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:47:47.751 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:47:47.753 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:47:47.755 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:47:47.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:47:47.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:47:47.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:47:47.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:47:47.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:47:47.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:47:47.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:47:47.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:47:47.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:47:48.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:47:48.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:48.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:48.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:48.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:48.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:47:49.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:47:49.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:49.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:49.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:49.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:49.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:47:50.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:47:50.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:50.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:50.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:50.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:47:51.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:47:51.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:51.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:51.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:51.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:51.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:47:52.012 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:47:52.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:47:52.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:52.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:47:52.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:47:52.490 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:47:52.968 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:47:53.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:53.445 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:47:53.923 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:47:54.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:54.400 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:47:54.878 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:47:55.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:55.356 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:47:55.833 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:47:56.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:56.311 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:47:56.789 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:47:57.267 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:47:57.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:47:57.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:47:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:47:58.222 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:47:58.700 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:47:59.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:47:59.656 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:48:00.134 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:48:00.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:00.612 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:48:01.090 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:48:01.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:01.568 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:48:02.046 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:48:02.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:02.524 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:48:03.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:48:03.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:03.480 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:48:03.957 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:48:04.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:04.435 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:48:04.913 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:48:05.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:05.391 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:48:05.869 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:48:06.347 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:48:06.824 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:48:07.302 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:48:07.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:07.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:07.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:07.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:07.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:07.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:07.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:07.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:07.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:07.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:07.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:07.416 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:48:07.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:07.416 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:07.416 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:07.416 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:07.416 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:12.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:12.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:12.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:12.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:12.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:12.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:12.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:12.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:12.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:12.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:12.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:48:12.453 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:48:12.454 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:48:12.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:12.454 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:12.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:12.456 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:48:12.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:12.456 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:48:12.458 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:48:12.459 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:48:12.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:12.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:12.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:12.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:48:12.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:12.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:48:12.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:48:12.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:48:12.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:12.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:12.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:12.464 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:48:12.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:12.464 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:48:12.467 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:48:12.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:48:12.469 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:48:12.469 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:48:12.469 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:12.474 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:48:12.957 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:48:12.999 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:48:13.001 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:48:13.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:13.002 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:48:13.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:13.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:13.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:48:13.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:13.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:13.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:13.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:48:13.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:48:13.049 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:48:13.053 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:48:13.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 01:48:13.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:13.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:13.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:13.078 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.083 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.087 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.092 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.097 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.101 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.106 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.110 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.115 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.120 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.124 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.129 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.138 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.143 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.147 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.152 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.157 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.161 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.166 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.170 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.175 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.180 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.184 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.189 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.198 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.203 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.207 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.212 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.217 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.221 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.226 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.230 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.235 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.240 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.244 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.249 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.258 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.263 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.267 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.272 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.277 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.281 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.286 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.290 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.295 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.300 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.304 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.309 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.318 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.323 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.327 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.332 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.337 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.341 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.346 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.350 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.355 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.360 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.364 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.369 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.378 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.383 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.387 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.392 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.397 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.401 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.406 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.410 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.415 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.420 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.424 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.428 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:48:13.428 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.434 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.438 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.443 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.447 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.452 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.457 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.461 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.466 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.470 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:13.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:13.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:13.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:13.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:13.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 01:48:13.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:13.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:13.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:13.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:13.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:13.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:13.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:13.871 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:13.871 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:18.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:18.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:18.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:18.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:18.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:18.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:18.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:18.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:18.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:18.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:18.893 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:48:18.897 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:48:18.897 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:48:18.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:18.898 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:18.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:18.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:48:18.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:18.899 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:48:18.900 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:48:18.900 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:48:18.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:18.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:18.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:18.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:48:18.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:18.901 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:18.903 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:18.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:18.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:48:18.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:48:18.906 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:48:18.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:18.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:48:19.395 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:48:19.436 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:48:19.439 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:48:19.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:19.441 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:48:19.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:19.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:19.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:48:19.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:19.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:19.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:19.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:48:19.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:48:19.487 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:48:19.490 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:48:19.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 01:48:19.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:19.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:19.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:19.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:19.515 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.520 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.525 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.529 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.534 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.539 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.543 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.548 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.553 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.557 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.562 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.566 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.576 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.580 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.585 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.589 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.594 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.599 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.603 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.608 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.613 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.617 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.622 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.626 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.636 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.640 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.645 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.649 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.654 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.659 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.663 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.668 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.673 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.677 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.682 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.686 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.696 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.700 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.705 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.709 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.714 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.719 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.723 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.728 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.733 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.737 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.742 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.746 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.756 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.760 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.765 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.769 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.774 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.779 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.783 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.788 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.793 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.797 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.802 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.806 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.816 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.820 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.825 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.829 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.834 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.839 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.843 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.848 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.853 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.857 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.862 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.865 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:48:19.866 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.871 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.876 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.880 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.885 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.889 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.894 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.899 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.903 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.908 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 01:48:19.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:19.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:19.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:20.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 01:48:20.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:20.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:20.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:20.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:20.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:20.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:20.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:20.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:20.308 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:20.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:20.308 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:48:20.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.309 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.309 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.309 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.309 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:20.309 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:48:25.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:48:25.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:48:25.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:25.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:25.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:25.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:25.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:48:25.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:25.325 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:25.325 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:48:25.325 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:48:25.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:48:25.330 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:48:25.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:25.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:25.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:48:25.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:48:25.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:48:25.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:48:25.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:48:25.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:48:25.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:25.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:25.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:48:25.336 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:48:25.336 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:48:25.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:48:25.338 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:48:25.338 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:48:25.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:25.338 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:48:25.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:48:25.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:48:25.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:48:25.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:48:25.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:48:25.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:48:25.342 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:48:25.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:48:25.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:48:25.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:48:25.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:48:25.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:48:25.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:48:25.873 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:48:25.875 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:48:25.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:25.877 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:48:25.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:25.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:25.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:48:25.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:25.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:25.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:25.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:48:25.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:48:25.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:25.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:25.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:25.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:25.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:26.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:48:26.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:26.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:26.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:26.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:48:27.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:48:27.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:27.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:27.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:27.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:48:28.218 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:48:28.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:28.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:28.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:28.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:28.696 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:48:29.174 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:48:29.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:29.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:29.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:29.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:29.652 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:48:30.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:48:30.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:48:30.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:48:30.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:48:30.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:48:30.608 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:48:31.085 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:48:31.563 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:48:32.041 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:48:32.519 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:48:32.996 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:48:33.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:48:33.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:48:34.430 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:48:34.908 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:48:35.385 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:48:35.863 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:48:36.341 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:48:36.818 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:48:37.297 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:48:37.775 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:48:38.252 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:48:38.730 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:48:39.208 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:48:39.686 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:48:40.164 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:48:40.642 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:48:41.119 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:48:41.597 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:48:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:41.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:41.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:41.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:41.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:41.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:41.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:48:41.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:41.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:41.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:41.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:48:41.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:48:41.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:41.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:41.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:41.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:41.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:42.075 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:48:42.552 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:48:43.030 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:48:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:48:43.985 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:48:44.463 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:48:44.941 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:48:45.418 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:48:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:48:46.374 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:48:46.852 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:48:47.330 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:48:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:48:48.286 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:48:48.764 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:48:49.241 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:48:49.720 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:48:50.198 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:48:50.676 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:48:51.153 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:48:51.631 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:48:52.109 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:48:52.586 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:48:53.064 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:48:53.542 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:48:54.019 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:48:54.496 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:48:54.974 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:48:55.452 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:48:55.929 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:48:56.407 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:48:56.885 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:48:57.363 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:48:57.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:57.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:57.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:57.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:57.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:48:57.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:48:57.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:48:57.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:57.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:57.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:57.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:48:57.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:48:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:48:57.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:48:57.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:48:57.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:57.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:48:57.840 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:48:58.318 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:48:58.796 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:48:59.274 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:48:59.752 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 01:49:00.229 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 01:49:00.707 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 01:49:01.185 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 01:49:01.663 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 01:49:02.140 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 01:49:02.618 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 01:49:03.096 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 01:49:03.573 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 01:49:04.051 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 01:49:04.529 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 01:49:05.007 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 01:49:05.486 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 01:49:05.963 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 01:49:06.440 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 01:49:06.918 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 01:49:07.396 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 01:49:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 01:49:08.351 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 01:49:08.828 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 01:49:09.307 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 01:49:09.785 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 01:49:10.263 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 01:49:10.741 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 01:49:11.219 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 01:49:11.697 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 01:49:12.175 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 01:49:12.653 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 01:49:13.131 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 01:49:13.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:13.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:13.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:13.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:13.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:13.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:13.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:49:13.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:13.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:13.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:13.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:49:13.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:49:13.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:13.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:13.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:13.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:13.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:13.609 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 01:49:14.086 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 01:49:14.564 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 01:49:15.042 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 01:49:15.520 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 01:49:15.997 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 01:49:16.475 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 01:49:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 01:49:17.430 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 01:49:17.908 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 01:49:18.385 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 01:49:18.863 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 01:49:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 01:49:19.817 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 01:49:20.294 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 01:49:20.772 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 01:49:21.250 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 01:49:21.728 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 01:49:22.206 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 01:49:22.684 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 01:49:23.162 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 01:49:23.640 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 01:49:24.128 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 01:49:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 01:49:25.084 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 01:49:25.562 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 01:49:26.040 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 01:49:26.517 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 01:49:26.995 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 01:49:27.473 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 01:49:27.951 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 01:49:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 01:49:28.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:28.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:28.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:28.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:28.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:28.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:28.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:28.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:28.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:28.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:28.879 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:28.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:28.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:28.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:28.880 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:28.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:33.879 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:33.879 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:33.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:33.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:33.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:33.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:33.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:33.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:33.885 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:33.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:33.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:33.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:49:33.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:33.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:33.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:49:33.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:33.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:33.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:49:33.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:33.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:49:33.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:49:33.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:49:33.890 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:49:33.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:49:33.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:33.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:33.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:33.891 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:49:38.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:38.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:38.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:38.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:38.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:38.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:38.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:38.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:38.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:38.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:38.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:49:38.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:49:38.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:49:38.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:38.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:38.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:38.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:49:38.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:38.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:38.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:49:38.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:38.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:38.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:49:38.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:38.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:49:38.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:49:38.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:49:38.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:49:38.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:38.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:49:39.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:49:39.456 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:49:39.458 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:49:39.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:39.460 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:49:39.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:39.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:39.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:49:39.500 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:49:39.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:39.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:39.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:39.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:49:39.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:49:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:39.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:39.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:39.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:39.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:39.893 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:49:39.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:39.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:39.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:39.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:49:40.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:49:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:40.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:41.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:49:41.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:49:41.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:41.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:41.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:41.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:42.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:49:42.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:49:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:42.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:42.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:42.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:43.238 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:49:43.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:49:43.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:43.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:43.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:43.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:49:44.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:49:45.149 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:49:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:49:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:49:46.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:49:47.061 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:49:47.538 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:49:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:49:48.494 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:49:48.971 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:49:49.446 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:49:49.924 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:49:50.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:50.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:50.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:50.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:50.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:50.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:50.396 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:49:50.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:50.396 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:49:55.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:49:55.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:49:55.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:55.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:55.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:55.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:55.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:49:55.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:55.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:55.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:49:55.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:49:55.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:49:55.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:49:55.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:55.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:55.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:49:55.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:49:55.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:49:55.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:49:55.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:49:55.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:49:55.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:55.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:55.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:49:55.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:49:55.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:49:55.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:55.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:49:55.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:49:55.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:49:55.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:49:55.432 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:49:55.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:49:55.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:49:55.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:49:55.962 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:49:55.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:55.964 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:49:55.965 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:49:55.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:49:55.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:49:55.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:49:55.997 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:49:56.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:56.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:56.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:56.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:49:56.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:49:56.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:49:56.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:49:56.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:49:56.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:56.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:49:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:49:56.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:56.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:56.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:56.875 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:49:57.352 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:49:57.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:57.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:57.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:57.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:57.831 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:49:58.309 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:49:58.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:58.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:58.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:58.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:58.787 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:49:59.264 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:49:59.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:49:59.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:49:59.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:49:59.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:49:59.742 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:50:00.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:50:00.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:00.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:00.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:00.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:00.699 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:50:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:50:01.654 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:50:02.131 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:50:02.609 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:50:03.087 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:50:03.564 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:50:04.042 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:50:04.520 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:50:04.998 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:50:05.476 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:50:05.954 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:50:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:06.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:06.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:06.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:06.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:06.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:06.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:06.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:06.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:06.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:06.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:06.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:06.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:06.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:06.408 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:50:11.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:11.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:11.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:11.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:11.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:11.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:11.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:11.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:11.429 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:11.429 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:11.429 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:50:11.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:50:11.431 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:50:11.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:11.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:11.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:11.432 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:50:11.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:11.432 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:11.433 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:50:11.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:11.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:11.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:50:11.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:11.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:50:11.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:50:11.436 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:50:11.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:11.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:11.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:50:11.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:50:11.961 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:50:11.963 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:11.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:11.965 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:50:11.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:11.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:11.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:50:11.990 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:11.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:11.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:11.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:11.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:50:11.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:50:12.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:12.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:12.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:12.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:12.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:12.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:50:12.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:12.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:12.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:12.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:12.880 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:50:12.896 [DEBUG] fake_trx.py:264 (MS@172.18.28.22:6700) Recv SETTA cmd
2026-01-23 01:50:13.358 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:50:13.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:13.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:13.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:13.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:13.836 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:50:14.314 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:50:14.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:14.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:14.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:14.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:14.792 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:50:15.270 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:50:15.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:15.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:15.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:15.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:15.748 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:50:16.225 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:50:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:16.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:16.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:16.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:16.703 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:50:17.181 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:50:17.660 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:50:18.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:50:18.615 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:50:19.093 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:50:19.570 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:50:20.048 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:50:20.526 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:50:21.004 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:50:21.481 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:50:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:50:22.437 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:50:22.914 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:50:23.392 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:50:23.869 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:50:24.347 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:50:24.824 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:50:25.302 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:50:25.779 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:50:26.257 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:50:26.734 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:50:27.212 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:50:27.690 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:50:28.167 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:50:28.644 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:50:29.122 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:50:29.600 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:50:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:50:30.556 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:50:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:50:31.511 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:50:31.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:31.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:31.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:31.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:31.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:31.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:31.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:31.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:31.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:31.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:31.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:31.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:31.628 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:31.628 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:50:36.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:36.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:36.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:36.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:36.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:36.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:36.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:36.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:36.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:36.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:36.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:50:36.642 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:50:36.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:50:36.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:36.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:36.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:36.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:50:36.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:36.644 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:50:36.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:50:36.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:50:36.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:36.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:36.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:36.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:50:36.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:36.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:50:36.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:50:36.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:50:36.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:36.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:36.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:36.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:50:36.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:36.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:50:36.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:50:36.652 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:50:36.652 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:50:36.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:50:36.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:36.657 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:50:37.141 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:50:37.178 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:50:37.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:37.181 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:37.184 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:50:37.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:37.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:37.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:50:37.229 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:37.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:37.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:37.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:37.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:50:37.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:50:37.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:37.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:37.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:37.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:37.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:50:37.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:37.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:37.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:37.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:38.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:50:38.571 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:50:38.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:38.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:38.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:38.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:39.049 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:50:39.527 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:50:39.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:39.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:39.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:39.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:50:40.482 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:50:40.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:40.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:40.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:40.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:50:41.438 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:50:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:41.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:41.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:41.915 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:50:42.390 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:50:42.866 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:50:43.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:50:43.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:50:44.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:50:44.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:50:45.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:50:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:50:46.209 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:50:46.686 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:50:47.164 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:50:47.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:50:48.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:48.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:48.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:48.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:50:48.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:48.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:48.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:48.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:48.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:48.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:48.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:48.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:48.128 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:50:53.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:50:53.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:50:53.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:53.134 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:53.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:53.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:53.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:50:53.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:53.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:53.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:50:53.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:50:53.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:50:53.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:50:53.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:53.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:53.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:50:53.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:50:53.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:50:53.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:50:53.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:50:53.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:50:53.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:53.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:53.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:50:53.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:50:53.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:50:53.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:53.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:50:53.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:50:53.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:50:53.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:50:53.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:50:53.161 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:50:53.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:50:53.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:50:53.645 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:50:53.689 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:50:53.690 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:53.691 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:50:53.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:53.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:50:53.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:50:53.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:50:53.729 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:53.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:53.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:53.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:53.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:50:53.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:50:53.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:50:53.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:50:53.741 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:53.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:50:53.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:53.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:50:54.123 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:50:54.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:54.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:54.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:54.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:54.601 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:50:54.618 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:50:55.079 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:50:55.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:55.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:55.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:55.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:55.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:50:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:50:56.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:56.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:56.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:56.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:56.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:50:56.990 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:50:57.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:57.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:57.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:57.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:57.467 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:50:57.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:50:58.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:50:58.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:50:58.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:50:58.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:50:58.423 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:50:58.901 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:50:59.378 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:50:59.856 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:51:00.333 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:51:00.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:00.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:00.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:00.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:00.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:00.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:00.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:00.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:00.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:00.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:00.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:00.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:00.482 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.483 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:00.484 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:05.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:05.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:05.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:05.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:05.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:05.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:05.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:05.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:05.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:05.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:05.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:51:05.496 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:51:05.496 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:51:05.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:05.496 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:05.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:05.497 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:51:05.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:05.497 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:51:05.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:51:05.499 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:51:05.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:05.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:05.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:05.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:51:05.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:05.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:05.501 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:51:05.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:05.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.504 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:51:05.504 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:51:05.504 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:51:05.504 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:05.509 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:51:05.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:51:06.028 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:06.028 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:06.029 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:51:06.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:06.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:06.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:06.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:06.057 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:06.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:06.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:06.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:06.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:06.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:06.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:06.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:06.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:06.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:06.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:06.470 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:51:06.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:06.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:06.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:06.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:06.947 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:51:07.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:51:07.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:07.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:07.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:07.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:07.903 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:51:08.380 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:51:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:08.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:08.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:08.858 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:51:09.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:51:09.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:09.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:09.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:09.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:51:10.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:51:10.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:10.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:10.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:10.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:10.768 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:51:11.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:51:11.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:51:12.201 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:51:12.679 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:51:13.157 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:51:13.635 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:51:14.113 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:51:14.591 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:51:15.068 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:51:15.546 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:51:16.023 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:51:16.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:16.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:16.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:16.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:16.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:16.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:16.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:16.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:16.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:16.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:16.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:16.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:16.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:16.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:16.108 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:16.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2264 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:21.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:21.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:21.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:21.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:21.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:21.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:21.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:21.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:21.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:21.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:21.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:51:21.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:51:21.130 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:51:21.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:21.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:21.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:21.131 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:51:21.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:21.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:51:21.133 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:51:21.134 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:51:21.134 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:21.134 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:21.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:21.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:51:21.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:21.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:51:21.136 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:51:21.136 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:51:21.136 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:21.136 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:21.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:21.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:51:21.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:21.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:51:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:51:21.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:51:21.140 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:51:21.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:21.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:51:21.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:51:21.668 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:21.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:21.670 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:21.672 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:51:21.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:21.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:21.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:21.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:21.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:21.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:21.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:21.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:21.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:21.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:21.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:21.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:21.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.105 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:51:22.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:22.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:22.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:22.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:22.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:22.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:22.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:22.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:22.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:22.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:22.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:22.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:22.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:22.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:22.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:22.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:22.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:22.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:51:22.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:22.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:22.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:22.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:22.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:22.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:22.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:22.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:22.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:22.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:22.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:22.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:22.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:23.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:23.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:23.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:23.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:23.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:23.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:23.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:23.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:23.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:23.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:23.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:23.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.059 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:51:23.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:23.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:23.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:23.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:23.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:23.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:23.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:23.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:23.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:23.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:23.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:23.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:23.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:23.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:23.468 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:23.468 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:23.468 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:51:23.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:23.468 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:28.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:28.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:28.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:28.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:28.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:28.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:28.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:28.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:28.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:28.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:28.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:51:28.477 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:51:28.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:28.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:28.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:51:28.478 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:51:28.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:28.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:28.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:51:28.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:28.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:28.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:28.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:28.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:28.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:51:28.481 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:51:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:51:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:51:28.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:51:28.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:51:28.482 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:51:28.482 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:51:28.482 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:28.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:28.487 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:51:28.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:51:29.009 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:29.011 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:29.014 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:51:29.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:29.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:29.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:29.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:29.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:29.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:29.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:29.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:29.063 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:29.067 [DEBUG] fake_trx.py:264 (MS@172.18.28.22:6700) Recv SETTA cmd
2026-01-23 01:51:29.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:29.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:29.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:29.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:29.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:29.448 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:51:29.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:29.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:29.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:29.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:29.925 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:51:29.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:29.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:29.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:29.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:29.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:29.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:29.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:29.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:29.960 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:29.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:34.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:34.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:34.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:34.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:34.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:34.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:34.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:34.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:34.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:34.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:34.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:51:34.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:51:34.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:51:34.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:34.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:34.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:34.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:51:34.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:34.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:51:34.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:51:34.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:51:34.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:34.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:34.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:34.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:51:34.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:34.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:51:34.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:51:34.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:51:34.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:34.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:34.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:34.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:51:34.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:34.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:34.998 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:51:34.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:51:34.999 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:51:34.999 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:34.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:35.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:51:35.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:51:35.526 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:35.527 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:35.528 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:51:35.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:35.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:35.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:35.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:35.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:35.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:35.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:35.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:35.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:35.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:35.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:35.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:35.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:35.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:35.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:35.966 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:51:36.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:36.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:36.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:36.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:36.444 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:51:36.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:51:37.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:37.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:37.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:37.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:37.400 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:51:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:51:38.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:38.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:38.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:38.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:38.355 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:51:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:38.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:38.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:38.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:38.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:38.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:38.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:38.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:38.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:38.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:38.726 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:38.726 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:38.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:38.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:38.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:38.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:38.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:38.832 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:51:38.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:39.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:39.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:39.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:39.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:39.310 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:51:39.783 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:51:40.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:40.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:40.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:40.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:51:40.722 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:51:41.190 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:51:41.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:51:41.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:41.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:41.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:41.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:41.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:41.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:41.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:41.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:41.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:41.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:41.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:41.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:41.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:41.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:41.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:41.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:42.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:42.137 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:51:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:51:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:51:43.562 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:51:44.036 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:51:44.507 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:51:44.976 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:51:45.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:45.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:45.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:45.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:45.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:45.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:45.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:45.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:45.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:45.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:45.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:45.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:45.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:45.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:45.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:45.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:45.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:45.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:45.448 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:51:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:51:46.390 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:51:46.861 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:51:47.333 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:51:47.803 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:51:48.274 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:51:48.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:48.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:48.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:48.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:48.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:48.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:48.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:48.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:48.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:48.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:48.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:48.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:48.371 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:51:48.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:48.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:48.372 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:51:53.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:51:53.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:51:53.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:53.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:53.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:53.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:53.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:51:53.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:53.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:53.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:51:53.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:51:53.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:51:53.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:51:53.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:53.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:53.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:51:53.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:51:53.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:51:53.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:51:53.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:51:53.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:51:53.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:53.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:53.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:51:53.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:51:53.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:51:53.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:51:53.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:51:53.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:51:53.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:53.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:51:53.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:51:53.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:51:53.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:51:53.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.400 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:51:53.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:51:53.400 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:51:53.400 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:51:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:51:53.885 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:51:53.933 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:51:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:51:53.935 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:51:53.935 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:51:53.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:51:53.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:51:53.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:51:53.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:51:53.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:51:53.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:51:53.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:51:53.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:51:54.362 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:51:54.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:54.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:54.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:54.840 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:51:55.318 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:51:55.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:55.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:55.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:55.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:55.795 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:51:56.272 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:51:56.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:56.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:56.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:56.750 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:51:57.228 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:51:57.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:57.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:57.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:57.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:57.706 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:51:58.183 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:51:58.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:51:58.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:51:58.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:51:58.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:51:58.661 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:51:59.139 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:51:59.616 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:52:00.094 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:52:00.572 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:52:01.050 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:52:01.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:52:02.005 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:52:02.482 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:52:02.960 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:52:03.438 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:52:03.915 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:52:04.393 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:52:04.870 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:52:05.348 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:52:05.825 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:52:06.302 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:52:06.779 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:52:07.257 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:52:07.735 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:52:08.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:08.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:08.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:52:08.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:52:08.024 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:52:08.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:13.031 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:52:13.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:52:13.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:13.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:13.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:13.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:13.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:13.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:52:13.038 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:13.038 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:52:13.038 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:52:13.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:52:13.040 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:52:13.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:52:13.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:13.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:13.041 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:52:13.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:52:13.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:52:13.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:52:13.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:52:13.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:52:13.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:13.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:13.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:52:13.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:52:13.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:52:13.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:52:13.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:52:13.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:52:13.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:52:13.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:52:13.051 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:52:13.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:13.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:52:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:52:13.573 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:52:13.574 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:52:13.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:52:13.575 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:52:13.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:13.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:13.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:52:13.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:13.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:52:13.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:52:13.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:52:13.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:52:13.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:52:13.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:52:13.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:52:13.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:13.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:14.017 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:52:14.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:14.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:14.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:14.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:14.495 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:52:14.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:52:15.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:15.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:15.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:15.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:15.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:52:15.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:15.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:15.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:15.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:52:15.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:15.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:52:15.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:52:15.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:52:15.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:52:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:52:16.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:16.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:16.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:16.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:16.406 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:52:16.883 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:52:17.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:17.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:17.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:17.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:52:17.839 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:52:18.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:18.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:18.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:18.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:18.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:52:18.794 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:52:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:52:19.750 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:52:20.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:52:20.706 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:52:21.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:52:21.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:52:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:52:22.615 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:52:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:52:23.571 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:52:24.049 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:52:24.527 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:52:25.005 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:52:25.482 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:52:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:52:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:52:26.915 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:52:27.393 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:52:27.871 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:52:28.348 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:52:28.826 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:52:29.303 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:52:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:52:30.259 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:52:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:52:30.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:30.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:30.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:30.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:30.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:30.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:30.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:52:30.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:52:30.560 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:52:30.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:30.560 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:35.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:52:35.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:52:35.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:35.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:35.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:35.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:35.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:35.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:52:35.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:35.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:52:35.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:52:35.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:52:35.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:52:35.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:52:35.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:35.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:35.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:52:35.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:52:35.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:52:35.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:52:35.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:52:35.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:52:35.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:35.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:35.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:52:35.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:52:35.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:52:35.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:52:35.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:52:35.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:52:35.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:52:35.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:35.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:52:35.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:52:35.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:52:35.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:52:35.587 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:52:35.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:52:35.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:52:36.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:52:36.114 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:52:36.115 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:52:36.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:52:36.117 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:52:36.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:36.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:36.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:52:36.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:52:36.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:52:36.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:52:36.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:52:36.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:52:36.553 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:52:36.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:36.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:36.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:36.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:52:37.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:52:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:37.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:37.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:37.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:37.987 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:52:38.464 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:52:38.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:38.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:38.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:38.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:38.942 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:52:39.419 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:52:39.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:39.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:39.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:39.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:39.897 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:52:40.375 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:52:40.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:40.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:40.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:40.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:40.853 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:52:41.330 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:52:41.808 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:52:42.286 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:52:42.764 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:52:43.242 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:52:43.720 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:52:44.197 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:52:44.675 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:52:45.153 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:52:45.631 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:52:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:52:46.583 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:52:47.060 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:52:47.538 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:52:48.016 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:52:48.493 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:52:48.971 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:52:49.449 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:52:49.927 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:52:50.405 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:52:50.883 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:52:51.361 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:52:51.839 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:52:52.316 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:52:52.794 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:52:53.272 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:52:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:52:54.226 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:52:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:52:55.182 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:52:55.659 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:52:56.137 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:52:56.615 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:52:57.093 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:52:57.571 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:52:57.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:52:57.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:52:57.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:52:57.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:52:57.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:52:57.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:52:57.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:52:57.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:52:57.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:52:57.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:52:57.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:52:57.612 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:52:57.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:52:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4702 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:53:02.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:53:02.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:53:02.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:53:02.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:53:02.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:53:02.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:53:02.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:53:02.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:53:02.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:02.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:53:02.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:53:02.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:53:02.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:53:02.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:53:02.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:02.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:53:02.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:53:02.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:53:02.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:53:02.635 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:53:02.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:53:02.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:53:02.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:02.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:53:02.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:53:02.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:53:02.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:53:02.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:53:02.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:53:02.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:53:02.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:02.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:53:02.640 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:53:02.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:53:02.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:53:02.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:53:02.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:53:02.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.644 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:53:02.644 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:53:02.645 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:53:02.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:02.649 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:53:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:53:03.177 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:53:03.178 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:53:03.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:53:03.179 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:53:03.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:53:03.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:53:03.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:53:03.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:53:03.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:53:03.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:53:03.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:53:03.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:53:03.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:53:03.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:03.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:03.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:03.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:04.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:53:04.566 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:53:04.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:04.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:04.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:04.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:05.044 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:53:05.522 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:53:05.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:05.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:05.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:05.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:06.000 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:53:06.478 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:53:06.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:06.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:06.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:06.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:06.955 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:53:07.432 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:53:07.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:07.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:07.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:07.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:07.910 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:53:08.387 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:53:08.865 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:53:09.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:53:09.819 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:53:10.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:53:10.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:53:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:53:11.731 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:53:12.208 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:53:12.686 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:53:13.164 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:53:13.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:53:14.136 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:53:14.614 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:53:15.092 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:53:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:53:16.047 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:53:16.525 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:53:17.003 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:53:17.480 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:53:17.958 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:53:18.436 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:53:18.914 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:53:19.392 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:53:19.870 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:53:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:53:20.825 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:53:21.302 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:53:21.780 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:53:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:53:22.736 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:53:23.213 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:53:23.691 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:53:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:53:24.646 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:53:24.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:53:24.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:53:24.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:24.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:24.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:53:24.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:53:24.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:53:24.673 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:53:29.677 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:53:29.677 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:53:29.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:53:29.680 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:53:29.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:53:29.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:53:29.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:53:29.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:53:29.687 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:29.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:53:29.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:53:29.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:53:29.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:53:29.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:53:29.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:29.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:53:29.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:53:29.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:53:29.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:53:29.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:53:29.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:53:29.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:53:29.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:29.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:53:29.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:53:29.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:53:29.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:53:29.695 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:53:29.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:53:29.695 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.698 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:53:29.698 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:53:29.698 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:53:29.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:53:29.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:53:30.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:53:30.222 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:53:30.223 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:53:30.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:53:30.224 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:53:30.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:53:30.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:53:30.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:53:30.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:53:30.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:53:30.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:53:30.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:53:30.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:53:30.665 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:53:30.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:30.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:30.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:31.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:53:31.620 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:53:31.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:31.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:31.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:31.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:53:32.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:53:32.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:32.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:32.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:32.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:33.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:53:33.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:53:33.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:33.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:33.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:33.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:34.009 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:53:34.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:53:34.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:53:34.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:53:34.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:53:34.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:53:34.964 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:53:35.442 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:53:35.917 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:53:36.394 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:53:36.871 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:53:37.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:53:37.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:53:38.304 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:53:38.781 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:53:39.252 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:53:39.724 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:53:40.202 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:53:40.680 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:53:41.157 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:53:41.634 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:53:42.112 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:53:42.590 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:53:43.068 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:53:43.546 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:53:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:53:44.501 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:53:44.978 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:53:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:53:45.934 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:53:46.412 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:53:46.889 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:53:47.367 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:53:47.845 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:53:48.317 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:53:48.794 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:53:49.271 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:53:49.749 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:53:50.226 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:53:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:53:51.182 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:53:51.659 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:53:52.137 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:53:52.615 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:53:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:53:53.570 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:53:54.048 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:53:54.526 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:53:55.003 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:53:55.481 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:53:55.959 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:53:56.437 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:53:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:53:57.392 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:53:57.869 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:53:58.347 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:53:58.825 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:53:59.303 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:53:59.781 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:54:00.258 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:54:00.736 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:54:01.213 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:54:01.691 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:54:02.170 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:54:02.648 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:54:03.125 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:54:03.603 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:54:03.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:54:03.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:54:03.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:03.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:03.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:03.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:03.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:03.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:03.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:03.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:03.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:03.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:03.729 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:54:03.729 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.729 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.729 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.729 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.729 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:03.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:08.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:08.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:08.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:08.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:08.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:08.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:08.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:08.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:08.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:08.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:08.738 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:54:08.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:54:08.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:54:08.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:08.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:08.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:08.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:54:08.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:08.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:54:08.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:54:08.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:54:08.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:08.744 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:08.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:08.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:54:08.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:08.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:54:08.746 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:54:08.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:54:08.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:08.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:08.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:08.747 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:54:08.747 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:08.747 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:54:08.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:54:08.750 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:54:08.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:08.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:54:09.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:54:09.286 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:54:09.289 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:54:09.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:54:09.291 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:54:09.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:54:09.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:54:09.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:54:09.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:54:09.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:54:09.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:54:09.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:54:09.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:54:09.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:54:09.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:09.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:09.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:09.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:10.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:54:10.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:54:10.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:10.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:10.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:10.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:11.150 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:54:11.627 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:54:11.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:11.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:11.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:11.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:12.105 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:54:12.583 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:54:12.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:12.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:12.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:12.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:13.060 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:54:13.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:54:13.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:13.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:13.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:13.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:14.016 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:54:14.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:54:14.979 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:54:15.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:54:15.935 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:54:16.413 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:54:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:54:17.368 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:54:17.846 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:54:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:54:18.802 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:54:19.280 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:54:19.757 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:54:20.235 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:54:20.713 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:54:21.190 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:54:21.668 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:54:22.145 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:54:22.623 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:54:23.101 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:54:23.578 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:54:24.056 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:54:24.533 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:54:25.011 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:54:25.488 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:54:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:54:26.444 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:54:26.922 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:54:27.399 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:54:27.877 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:54:28.355 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:54:28.833 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:54:29.311 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:54:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:54:30.266 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:54:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:54:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:54:31.700 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:54:32.178 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:54:32.656 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:54:33.134 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:54:33.611 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:54:34.089 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:54:34.566 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:54:35.044 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:54:35.522 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:54:36.000 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:54:36.478 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:54:36.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:54:36.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:54:36.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:36.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:36.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:36.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:36.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:36.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:36.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:36.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:36.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:36.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:36.779 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:36.779 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5983 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:41.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:41.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:41.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:41.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:41.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:41.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:41.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:41.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:41.803 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:41.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:41.804 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:54:41.807 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:54:41.807 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:54:41.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:41.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:41.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:41.808 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:54:41.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:41.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:54:41.810 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:54:41.810 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:54:41.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:41.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:41.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:41.811 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:54:41.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:41.811 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:54:41.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:54:41.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:54:41.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:41.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:41.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:41.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:54:41.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:41.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:54:41.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:54:41.816 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:54:41.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:41.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:54:42.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:54:42.342 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:54:42.344 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:54:42.346 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:54:42.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:54:42.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:42.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:42.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:42.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:42.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:42.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:42.364 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:54:42.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:42.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.365 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.365 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.365 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.365 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:42.365 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:47.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:47.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:47.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:47.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:47.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:47.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:47.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:47.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:47.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:47.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:54:47.379 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:54:47.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:54:47.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:47.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:47.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:47.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:54:47.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:47.382 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:54:47.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:54:47.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:54:47.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:47.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:47.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:47.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:54:47.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:47.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:47.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:54:47.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:47.385 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.388 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:54:47.388 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:54:47.389 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:54:47.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:47.393 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:54:47.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:54:47.921 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:54:47.923 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:54:47.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:54:47.926 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:47.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:47.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:47.941 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:54:47.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:47.941 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:52.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:52.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:52.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:52.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:52.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:52.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:52.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:52.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:52.957 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:52.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:52.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:54:52.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:54:52.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:54:52.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:52.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:52.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:52.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:54:52.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:52.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:54:52.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:54:52.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:54:52.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:52.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:52.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:52.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:54:52.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:52.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:54:52.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:54:52.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:54:52.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:52.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:52.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:52.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:54:52.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:52.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:54:52.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:54:52.976 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:54:52.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:52.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:54:53.461 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:54:53.508 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:54:53.510 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:54:53.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:54:53.512 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:54:53.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:53.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:53.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:53.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:53.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:53.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:53.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:53.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:53.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:53.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:53.531 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.531 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:53.532 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:54:58.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:54:58.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:54:58.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:58.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:58.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:58.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:58.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:54:58.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:58.541 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:58.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:54:58.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:54:58.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:54:58.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:54:58.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:58.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:58.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:54:58.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:54:58.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:54:58.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:58.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:54:58.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:54:58.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:58.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:54:58.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:54:58.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:54:58.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:54:58.549 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:54:58.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:54:58.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:54:58.554 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:54:59.037 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:54:59.069 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:54:59.070 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:54:59.071 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:54:59.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:54:59.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:54:59.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:54:59.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:54:59.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:54:59.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:54:59.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:54:59.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:54:59.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:54:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:55:00.466 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:55:00.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:00.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:00.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:00.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:00.944 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:55:01.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:55:01.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:01.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:01.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:01.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:01.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:55:02.377 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:55:02.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:02.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:02.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:02.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:02.855 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:55:03.333 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:55:03.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:03.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:03.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:03.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:03.811 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:55:04.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:55:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:55:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:55:05.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:55:06.198 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:55:06.676 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:55:07.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:07.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:07.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:07.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:07.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:07.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:07.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:07.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:07.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:07.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:07.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:07.099 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:55:07.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.100 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:07.101 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:12.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:12.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:12.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:12.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:12.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:12.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:12.108 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:12.108 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:12.108 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:55:12.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:55:12.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:55:12.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:12.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:12.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:12.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:55:12.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:12.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:55:12.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:55:12.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:55:12.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:12.115 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:12.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:12.115 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:55:12.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:12.115 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:55:12.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:55:12.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:55:12.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:12.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:12.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:12.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:55:12.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:12.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:55:12.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:55:12.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:55:12.122 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:55:12.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:12.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:12.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:55:12.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:55:12.654 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:55:12.656 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:55:12.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:55:12.659 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:55:12.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:12.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:12.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:55:12.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:55:12.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:55:12.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:55:12.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:55:12.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:55:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:55:13.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:13.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:13.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:13.565 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:55:14.043 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:55:14.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:14.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:14.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:14.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:14.520 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:55:14.998 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:55:15.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:15.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:15.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:15.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:15.476 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:55:15.962 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:55:16.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:16.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:16.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:16.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:16.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:55:16.917 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:55:17.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:17.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:17.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:17.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:17.394 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:55:17.872 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:55:18.350 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:55:18.828 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:55:19.305 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:55:19.783 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:55:20.261 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:55:20.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:20.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:20.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:20.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:20.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:20.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:20.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:20.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:20.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:20.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:20.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:20.719 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:55:20.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:20.719 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.719 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.719 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:20.720 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:25.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:25.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:25.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:25.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:25.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:25.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:25.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:25.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:25.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:25.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:25.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:55:25.734 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:55:25.735 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:55:25.735 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:25.735 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:25.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:25.735 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:55:25.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:25.736 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:55:25.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:55:25.739 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:55:25.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:25.739 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:25.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:25.739 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:55:25.739 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:25.739 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:55:25.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:55:25.742 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:55:25.742 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:25.742 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:25.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:25.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:55:25.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:25.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:55:25.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:55:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:55:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:55:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:55:25.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:55:25.747 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:55:25.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:55:26.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:55:26.273 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:55:26.274 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:55:26.275 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:55:26.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:55:26.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:26.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:26.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:55:26.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:55:26.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:55:26.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:55:26.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:55:26.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:55:26.713 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:55:26.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:26.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:26.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:26.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:27.191 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:55:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:55:27.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:27.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:27.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:27.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:28.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:55:28.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:55:28.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:28.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:28.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:28.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:29.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:55:29.578 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:55:29.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:29.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:29.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:29.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:30.055 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:55:30.533 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:55:30.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:30.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:30.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:30.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:31.011 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:55:31.489 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:55:31.967 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:55:32.445 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:55:32.923 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:55:33.401 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:55:33.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:55:34.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:34.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:34.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:34.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:34.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:34.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:34.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:34.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:34.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:34.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:34.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:34.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:34.291 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:34.291 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1825 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:39.291 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:39.291 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:39.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:39.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:39.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:39.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:39.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:39.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:39.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:39.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:39.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:55:39.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:55:39.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:55:39.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:39.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:39.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:55:39.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:39.302 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:55:39.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:55:39.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:55:39.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:39.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:39.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:39.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:55:39.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:39.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:39.305 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:55:39.305 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:39.305 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:55:39.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:55:39.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:55:39.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:55:39.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:55:39.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:55:39.308 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:55:39.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:39.313 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:55:39.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:55:39.842 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:55:39.845 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:55:39.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:55:39.847 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:55:39.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:39.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:39.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:55:39.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:55:39.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:55:39.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:55:39.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:55:39.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:55:40.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:55:40.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:40.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:40.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:40.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:40.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:55:41.230 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:55:41.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:41.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:41.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:41.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:41.708 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:55:42.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:55:42.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:42.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:42.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:42.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:42.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:55:43.142 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:55:43.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:43.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:43.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:43.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:43.619 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:55:44.096 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:55:44.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:44.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:44.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:44.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:44.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:55:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:55:45.529 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:55:46.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:55:46.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:55:46.961 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:55:47.439 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:55:47.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:47.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:47.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:47.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:47.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:47.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:47.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:47.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:47.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:47.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:47.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:47.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:47.899 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:47.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:55:52.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:55:52.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:55:52.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:52.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:52.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:52.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:52.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:55:52.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:52.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:52.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:55:52.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:55:52.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:55:52.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:55:52.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:52.909 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:52.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:55:52.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:55:52.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:55:52.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:52.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:55:52.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:55:52.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:52.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:55:52.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:55:52.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:55:52.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:55:52.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:55:52.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:55:52.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:55:52.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:55:52.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:55:52.917 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:55:52.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:55:52.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:55:52.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:55:53.404 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:55:53.433 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:55:53.434 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:55:53.434 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:55:53.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:55:53.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:55:53.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:55:53.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:55:53.881 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:55:53.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:53.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:53.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:53.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:54.359 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:55:54.836 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:55:54.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:54.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:54.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:54.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:55.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:55:55.792 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:55:55.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:55.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:55.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:55.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:56.269 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:55:56.747 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:55:56.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:56.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:56.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:56.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:57.225 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:55:57.702 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:55:57.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:55:57.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:55:57.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:55:57.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:55:58.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:55:58.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:55:59.136 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:55:59.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:56:00.091 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:56:00.568 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:56:01.045 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:56:01.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:01.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:01.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:01.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:01.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:01.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:01.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:01.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:01.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:01.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:01.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:01.465 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:56:01.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:01.466 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1826 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:06.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:06.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:06.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:06.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:06.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:06.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:06.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:06.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:06.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:06.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:06.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:56:06.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:56:06.480 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:56:06.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:06.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:06.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:06.481 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:56:06.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:06.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:56:06.483 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:56:06.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:56:06.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:06.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:06.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:06.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:56:06.485 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:06.485 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:06.486 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:56:06.486 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:06.486 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:56:06.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:56:06.490 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:56:06.490 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:56:06.490 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.490 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:06.495 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:56:06.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:56:07.018 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:56:07.018 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:56:07.020 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:56:07.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:56:07.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:07.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:07.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:56:07.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:56:07.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:56:07.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:56:07.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:56:07.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:56:07.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:56:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:07.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:07.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:07.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:56:08.411 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:56:08.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:08.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:08.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:08.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:08.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:56:09.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:56:09.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:09.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:09.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:09.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:09.843 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:56:10.319 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:56:10.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:10.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:10.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:10.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:10.796 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:56:11.274 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:56:11.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:11.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:11.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:11.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:11.749 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:56:12.222 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:56:12.708 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:56:13.185 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:56:13.663 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:56:14.140 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:56:14.618 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:56:15.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:56:15.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:56:16.049 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:56:16.526 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:56:17.004 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:56:17.482 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:56:17.960 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:56:18.437 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:56:18.914 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:56:19.392 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:56:19.869 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:56:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:56:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:56:21.303 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:56:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:56:22.259 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:56:22.763 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:56:23.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:23.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:23.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:23.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:23.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:23.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:23.091 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:56:23.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:23.091 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3540 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.092 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.093 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.093 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.093 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:23.093 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3541 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:28.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:28.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:28.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:28.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:28.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:28.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:28.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:28.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:28.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:28.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:28.110 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:56:28.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:56:28.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:56:28.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:28.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:28.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:28.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:56:28.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:28.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:56:28.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:56:28.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:56:28.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:28.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:28.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:28.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:56:28.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:28.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:28.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:56:28.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:28.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:56:28.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:56:28.117 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:56:28.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:28.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:56:28.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:56:28.641 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:56:28.643 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:56:28.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:56:28.645 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:56:28.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:28.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:28.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:56:28.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:56:28.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:56:28.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:56:28.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:56:28.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:56:29.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:56:29.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:29.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:29.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:29.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:29.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:56:30.038 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:56:30.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:30.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:30.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:30.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:30.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:56:30.994 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:56:31.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:31.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:31.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:31.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:31.472 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:56:31.949 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:56:32.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:32.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:32.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:32.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:32.426 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:56:32.904 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:56:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:33.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:33.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:33.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:56:33.859 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:56:34.336 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:56:34.814 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:56:35.292 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:56:35.770 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:56:36.247 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:56:36.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:36.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:36.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:36.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:36.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:36.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:36.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:36.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:36.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:36.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:36.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:36.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:36.716 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:36.716 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:41.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:41.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:41.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:41.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:41.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:41.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:41.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:41.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:41.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:41.729 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:56:41.729 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:56:41.731 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:56:41.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:56:41.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:41.733 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:41.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:41.734 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:56:41.734 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:56:41.734 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:56:41.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:56:41.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:56:41.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:41.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:41.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:41.737 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:56:41.737 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:56:41.737 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:56:41.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:56:41.738 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:56:41.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:41.738 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:56:41.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:41.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:56:41.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:56:41.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:56:41.742 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:56:41.742 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:56:41.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:56:41.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:56:42.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:56:42.266 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:56:42.268 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:56:42.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:56:42.270 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:42.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:56:42.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:56:42.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:56:42.707 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:56:42.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:42.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:42.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:42.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:43.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:56:43.663 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:56:43.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:43.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:43.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:43.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:44.141 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:56:44.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:56:44.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:44.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:44.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:44.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:45.096 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:56:45.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:56:45.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:45.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:45.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:45.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:46.069 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:56:46.546 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:56:46.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:46.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:46.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:56:47.501 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:56:47.979 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:56:48.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:56:48.935 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:56:49.413 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:56:49.891 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:56:50.369 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:56:50.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:56:51.325 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:56:51.802 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:56:52.280 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:56:52.758 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:56:53.231 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:56:53.705 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:56:54.183 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:56:54.662 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:56:55.140 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:56:55.617 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:56:56.094 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:56:56.572 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:56:57.049 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:56:57.527 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:56:58.005 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:56:58.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:56:58.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:56:58.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:56:58.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:56:58.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:56:58.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:56:58.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:56:58.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:56:58.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:56:58.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:56:58.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:56:58.350 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:56:58.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:56:58.351 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:03.351 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:03.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:03.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:03.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:03.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:03.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:03.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:03.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:03.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:03.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:03.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:03.373 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:03.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:03.373 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:03.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:03.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:03.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:03.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:03.376 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:03.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:03.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:03.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:03.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:03.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:03.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:03.377 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:03.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:03.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:03.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:03.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:03.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:03.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:03.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:03.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:03.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:03.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:03.384 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:03.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:03.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:03.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:03.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:03.917 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:03.920 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:03.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:03.921 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:03.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:03.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:03.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:03.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:03.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:03.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:03.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:03.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:03.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:03.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:03.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:03.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:03.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:03.959 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:03.960 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:08.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:08.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:08.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:08.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:08.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:08.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:08.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:08.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:08.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:08.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:08.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:08.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:08.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:08.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:08.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:08.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:08.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:08.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:08.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:08.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:08.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:08.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:08.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:08.979 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:08.979 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:08.979 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:08.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:08.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:08.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:08.983 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:08.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:08.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:08.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:08.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:08.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:08.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:08.988 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:08.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:08.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:09.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:09.513 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:09.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:09.515 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:09.517 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:09.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:09.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:09.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:09.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:09.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:09.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:09.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:09.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:09.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:09.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:09.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:09.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:09.570 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:09.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:09.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.571 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:09.572 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:14.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:14.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:14.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:14.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:14.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:14.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:14.579 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:14.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:14.580 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:14.580 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:14.580 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:14.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:14.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:14.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:14.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:14.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:14.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:14.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:14.586 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:14.586 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:14.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:14.586 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:14.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:14.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:14.587 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:14.587 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:14.589 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:14.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:14.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:14.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:14.592 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:14.593 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:14.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:15.081 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:15.125 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:15.127 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:15.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:15.130 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:15.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:15.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:15.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:15.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:15.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:15.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:15.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:15.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:15.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:15.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:15.166 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:15.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:15.167 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:20.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:20.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:20.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:20.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:20.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:20.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:20.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:20.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:20.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:20.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:20.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:20.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:20.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:20.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:20.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:20.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:20.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:20.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:20.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:20.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:20.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:20.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:20.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:20.187 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:20.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:20.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:20.191 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:20.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:20.712 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:20.715 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:20.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:20.717 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:20.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:20.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:20.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:20.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:20.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:20.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:20.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:20.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:20.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:20.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:20.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:20.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:20.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:20.773 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:20.773 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.773 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.773 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:20.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:25.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:25.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:25.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:25.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:25.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:25.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:25.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:25.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:25.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:25.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:25.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:25.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:25.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:25.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:25.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:25.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:25.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:25.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:25.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:25.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:25.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:25.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:25.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:25.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:25.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:25.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:25.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:25.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:25.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:25.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:25.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:25.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:25.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:25.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:25.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:25.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:25.796 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:25.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:26.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:26.327 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:26.329 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:26.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:26.332 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:26.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:26.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:26.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:26.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:26.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:26.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:26.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:26.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:26.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:26.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:26.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:26.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:26.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:26.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:26.382 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:26.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:57:31.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:31.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:31.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:31.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:31.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:31.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:31.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:31.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:31.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:31.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:31.396 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:31.399 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:31.399 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:31.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:31.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:31.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:31.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:31.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:31.400 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:31.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:31.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:31.402 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:31.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:31.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:31.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:31.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:31.403 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:31.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:31.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:31.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:31.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:31.409 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:31.409 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:31.409 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:31.414 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:31.897 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:31.944 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:31.946 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:31.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:31.948 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:31.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:31.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:31.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:31.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:31.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:31.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:32.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:32.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:32.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:32.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:32.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:32.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:32.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:32.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:32.003 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:57:32.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:32.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:37.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:57:37.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:57:37.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:37.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:37.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:37.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:37.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:57:37.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:37.016 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:37.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:57:37.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:57:37.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:57:37.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:57:37.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:37.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:37.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:57:37.022 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:57:37.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:57:37.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:57:37.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:57:37.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:57:37.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:37.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:37.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:57:37.026 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:57:37.026 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:57:37.026 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:57:37.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:57:37.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:57:37.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:37.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:57:37.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:57:37.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:57:37.028 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:57:37.028 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:57:37.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:57:37.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:57:37.031 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:57:37.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:57:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:57:37.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:57:37.520 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:57:37.561 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:57:37.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:57:37.564 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:57:37.566 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:57:37.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:57:37.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:57:37.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:57:37.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:57:37.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:57:37.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:57:37.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:57:37.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:57:37.998 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:57:38.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:38.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:38.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:38.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:38.475 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:57:38.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:57:39.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:39.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:39.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:39.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:39.430 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:57:39.908 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:57:40.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:40.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:40.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:40.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:40.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:57:40.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:57:41.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:41.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:41.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:41.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:41.341 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:57:41.818 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:57:42.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:57:42.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:57:42.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:57:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:57:42.295 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:57:42.772 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:57:43.250 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:57:43.728 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:57:44.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:57:44.684 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:57:45.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:57:45.639 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 01:57:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 01:57:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 01:57:47.073 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 01:57:47.551 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 01:57:48.029 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 01:57:48.507 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 01:57:48.984 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 01:57:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 01:57:49.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 01:57:50.416 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 01:57:50.894 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 01:57:51.371 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 01:57:51.849 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 01:57:52.327 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 01:57:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 01:57:53.282 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 01:57:53.759 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 01:57:54.237 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 01:57:54.715 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 01:57:55.193 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 01:57:55.671 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 01:57:56.149 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 01:57:56.626 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 01:57:57.104 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 01:57:57.582 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 01:57:58.060 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 01:57:58.538 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 01:57:59.015 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 01:57:59.493 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 01:57:59.971 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 01:58:00.449 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 01:58:00.927 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 01:58:01.405 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 01:58:01.883 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 01:58:02.361 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 01:58:02.839 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 01:58:03.316 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 01:58:03.794 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 01:58:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 01:58:04.749 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 01:58:05.227 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 01:58:05.705 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 01:58:06.183 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 01:58:06.661 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 01:58:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 01:58:07.617 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 01:58:08.094 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 01:58:08.591 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 01:58:09.069 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 01:58:09.547 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 01:58:10.025 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 01:58:10.503 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 01:58:10.981 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 01:58:11.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:58:11.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:58:11.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:11.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:11.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:11.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:11.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:11.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:11.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:11.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:11.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:11.061 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:58:11.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.061 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:11.062 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:16.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:16.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:16.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:16.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:16.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:16.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:16.078 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:16.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:16.079 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:58:16.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:58:16.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:58:16.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:16.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:16.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:16.087 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:58:16.087 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:16.087 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:58:16.089 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:58:16.089 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:58:16.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:16.090 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:16.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:16.090 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:58:16.090 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:16.091 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:58:16.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:58:16.093 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:58:16.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:16.093 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:16.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:16.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:58:16.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:16.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:58:16.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:58:16.097 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:58:16.097 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:58:16.097 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:58:16.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:16.102 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:58:16.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:58:16.626 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:58:16.628 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:58:16.631 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:58:16.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:58:17.063 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:58:17.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:17.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:17.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:17.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:17.541 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:58:18.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:58:18.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:18.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:18.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:18.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:18.498 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:58:18.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:58:19.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:19.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:19.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:19.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:19.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:58:19.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:58:19.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:19.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:19.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:19.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:19.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:19.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:19.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:19.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:19.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:19.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:19.649 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:19.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:24.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:24.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:24.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:24.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:24.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:24.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:24.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:24.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:24.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:24.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:24.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:58:24.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:58:24.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:58:24.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:24.669 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:24.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:24.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:58:24.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:24.670 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:58:24.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:58:24.672 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:58:24.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:24.672 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:24.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:24.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:58:24.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:24.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:58:24.674 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:58:24.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:58:24.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:24.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:24.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:24.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:58:24.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:24.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:58:24.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:58:24.678 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:58:24.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:24.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:58:25.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:58:25.205 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:58:25.207 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:58:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:58:25.209 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:58:25.645 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:58:25.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:25.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:25.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:25.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:26.126 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:58:26.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:58:26.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:26.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:26.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:26.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:58:27.567 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:58:27.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:27.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:27.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:27.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:58:28.523 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:58:28.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:28.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:28.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:28.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:58:29.478 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:58:29.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:29.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:29.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:29.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:29.956 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:58:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:58:30.912 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:58:31.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:31.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:31.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:31.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:31.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:31.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:31.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:31.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:31.224 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:58:31.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.224 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:31.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:36.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:36.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:36.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:36.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:36.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:36.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:36.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:36.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:36.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:36.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:36.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:58:36.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:58:36.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:58:36.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:36.243 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:36.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:36.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:58:36.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:36.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:36.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:58:36.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:36.246 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:58:36.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:58:36.248 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:58:36.248 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:36.248 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:36.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:36.248 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:58:36.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:36.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:58:36.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:58:36.252 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:58:36.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:36.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:58:36.741 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:58:36.779 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:58:36.781 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:58:36.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:58:36.785 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:58:37.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:58:37.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:37.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:37.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:37.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:37.679 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:58:38.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:58:38.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:38.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:38.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:38.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:38.633 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:58:39.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:58:39.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:39.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:39.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:39.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:39.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:58:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:58:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:40.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:40.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:40.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:40.554 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:58:41.035 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:58:41.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:41.262 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:41.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:41.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:41.515 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:58:41.994 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:58:42.473 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:58:42.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:42.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:42.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:42.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:42.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:42.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:42.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:42.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:42.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:42.800 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:58:42.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:47.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:47.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:47.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:47.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:47.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:47.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:47.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:47.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:47.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:47.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:47.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:58:47.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:58:47.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:58:47.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:47.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:47.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:47.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:58:47.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:47.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:58:47.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:58:47.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:58:47.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:47.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:47.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:47.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:58:47.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:47.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:47.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:58:47.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:47.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:58:47.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:58:47.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:58:47.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:58:47.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:58:47.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:58:47.828 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:58:47.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:47.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:47.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:58:48.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:58:48.351 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:58:48.352 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:58:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:58:48.353 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:58:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:58:48.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:48.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:48.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:49.268 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:58:49.736 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:58:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:49.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:49.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:49.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:50.211 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:58:50.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:58:50.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:50.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:50.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:50.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:51.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:58:51.649 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:58:51.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:51.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:51.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:51.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:52.129 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:58:52.611 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:58:52.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:52.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:52.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:52.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:58:53.571 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:58:54.050 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:58:54.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:58:54.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:58:54.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:58:54.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:58:54.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:54.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:54.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:54.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:54.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:54.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:54.368 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:54.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:58:59.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:58:59.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:58:59.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:59.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:59.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:59.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:59.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:58:59.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:59.382 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:59.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:58:59.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:59.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:58:59.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:58:59.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:58:59.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:58:59.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:58:59.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:59.388 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:59.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:58:59.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:58:59.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:58:59.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:58:59.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:58:59.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:58:59.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:59.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:58:59.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:58:59.391 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:58:59.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:58:59.391 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:58:59.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:58:59.395 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:58:59.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:58:59.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:58:59.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:58:59.929 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:58:59.931 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:58:59.933 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:58:59.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:00.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:59:00.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:00.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:00.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:00.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:00.834 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:59:01.302 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:59:01.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:01.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:01.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:01.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:01.774 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:59:02.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:59:02.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:02.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:02.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:02.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:02.732 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:59:03.213 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:59:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:03.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:03.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:03.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:59:03.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 01:59:04.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:04.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:04.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:04.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:04.651 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 01:59:05.120 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 01:59:05.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 01:59:06.066 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 01:59:06.548 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 01:59:07.030 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 01:59:07.511 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 01:59:07.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:07.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:07.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:07.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:07.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:07.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:07.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:07.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:07.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:07.969 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:07.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:07.970 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:12.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:12.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:12.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:12.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:12.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:12.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:12.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:12.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:12.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:12.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:12.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:12.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:12.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:12.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:12.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:12.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:12.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:12.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:12.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:12.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:12.995 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:12.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:12.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:12.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:12.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:12.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:12.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:12.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:13.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:13.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:13.000 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:13.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:13.000 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:13.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:13.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:13.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:13.006 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:13.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:13.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:13.495 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:13.534 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:13.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:13.536 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:13.539 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:13.976 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:59:14.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:14.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:14.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:14.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:14.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:59:14.937 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:59:15.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:15.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:15.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:15.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:15.418 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:59:15.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:59:16.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:16.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:16.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:16.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:16.380 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:59:16.861 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:59:17.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:17.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:17.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:17.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:17.342 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:59:17.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:17.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:17.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:17.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:17.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:17.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:17.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:17.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:17.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:17.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:17.557 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:17.557 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=966 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:22.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:22.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:22.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:22.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:22.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:22.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:22.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:22.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:22.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:22.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:22.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:22.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:22.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:22.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:22.577 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:22.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:22.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:22.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:22.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:22.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:22.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:22.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:22.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:22.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:22.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:22.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:22.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:22.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:22.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:22.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:22.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:22.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:22.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:22.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:22.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:22.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:22.587 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:22.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:22.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:23.075 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:23.113 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:23.114 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:23.115 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:23.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:23.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:23.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:23.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:23.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:23.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:23.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:23.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:23.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:23.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:23.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:23.129 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:23.129 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:28.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:28.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:28.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:28.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:28.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:28.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:28.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:28.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:28.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:28.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:28.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:28.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:28.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:28.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:28.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:28.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:28.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:28.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:28.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:28.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:28.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:28.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:28.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:28.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:28.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:28.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:28.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:28.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:28.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:28.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:28.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:28.146 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:28.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:28.151 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:28.633 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:28.674 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:28.677 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:28.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:28.679 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:28.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:28.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:28.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:28.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:28.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:28.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:28.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:28.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:28.696 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.697 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.698 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.698 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:28.698 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:33.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:33.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:33.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:33.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:33.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:33.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:33.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:33.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:33.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:33.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:33.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:33.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:33.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:33.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:33.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:33.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:33.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:33.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:33.713 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:33.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:33.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:33.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:33.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:33.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:33.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:33.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:33.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:33.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:33.717 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:33.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:33.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:33.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:33.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:33.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:33.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:33.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:33.721 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:33.721 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:33.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:34.245 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:34.246 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:34.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:34.248 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:34.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:34.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:34.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:34.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:34.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:34.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:34.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:34.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:34.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:34.261 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:34.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:34.261 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:34.261 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:39.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:39.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:39.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:39.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:39.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:39.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:39.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:39.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:39.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:39.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:39.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:39.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:39.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:39.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:39.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:39.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:39.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:39.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:39.282 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:39.285 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:39.285 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:39.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:39.285 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:39.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:39.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:39.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:39.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:39.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:39.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:39.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:39.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:39.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:39.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:39.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:39.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:39.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:39.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:39.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:39.294 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:39.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:39.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:39.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:39.820 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:39.821 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:39.822 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:39.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:39.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:59:39.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:59:39.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:59:39.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:39.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:59:39.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:59:39.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:59:39.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:59:40.260 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:59:40.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:40.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:40.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:40.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:40.738 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:59:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:59:41.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:41.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:41.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:41.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:41.693 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:59:42.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:59:42.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:42.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:42.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:42.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:42.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:59:42.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:59:42.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:59:42.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:42.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:42.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:59:42.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:59:42.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:42.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:42.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:42.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:42.937 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:42.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:47.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:47.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:47.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:47.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:47.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:47.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:47.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:47.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:47.952 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:47.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:47.952 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:47.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:47.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:47.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:47.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:47.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:47.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:47.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:47.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:47.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:47.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:47.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:47.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:47.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:47.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:47.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:47.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:47.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:47.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:47.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:47.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:47.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:47.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:47.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:47.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:47.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:47.966 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:47.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:47.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:48.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:48.489 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:48.490 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:48.491 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:48.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:48.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:59:48.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:59:48.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:59:48.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:48.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:59:48.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:59:48.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:59:48.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:59:48.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:59:48.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:48.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:48.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:48.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:49.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:59:49.885 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:59:49.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:49.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:49.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:49.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:50.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 01:59:50.841 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 01:59:50.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:50.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:50.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:50.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:51.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 01:59:51.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:59:51.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:59:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:51.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 01:59:51.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:51.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:51.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:51.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:52.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 01:59:52.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:59:52.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:59:52.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:52.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:52.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:52.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:52.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:52.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:52.295 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 01:59:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:52.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 01:59:57.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 01:59:57.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 01:59:57.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:57.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:57.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:57.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:57.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 01:59:57.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:57.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:57.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 01:59:57.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 01:59:57.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 01:59:57.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 01:59:57.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:57.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:57.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 01:59:57.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 01:59:57.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 01:59:57.317 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 01:59:57.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 01:59:57.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 01:59:57.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:57.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:57.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 01:59:57.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 01:59:57.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 01:59:57.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:57.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 01:59:57.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 01:59:57.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 01:59:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 01:59:57.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 01:59:57.323 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 01:59:57.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 01:59:57.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 01:59:57.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 01:59:57.846 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 01:59:57.847 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 01:59:57.847 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 01:59:57.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 01:59:57.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 01:59:57.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 01:59:57.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 01:59:57.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 01:59:57.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 01:59:57.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 01:59:57.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 01:59:57.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 01:59:58.289 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 01:59:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:58.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:58.767 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 01:59:59.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 01:59:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 01:59:59.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 01:59:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 01:59:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 01:59:59.722 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:00:00.200 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:00:00.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:00.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:00.678 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:00:00.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:00.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:00.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:00.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:01.155 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:00:01.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:01.633 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:00:02.110 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:00:02.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:02.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:02.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:02.587 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:00:03.065 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:00:03.542 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:00:04.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:00:04.498 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:00:04.975 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:00:05.453 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:00:05.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:05.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:05.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:05.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:05.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:05.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:05.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:05.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:05.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:05.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:05.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:05.883 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:05.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:10.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:10.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:10.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:10.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:10.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:10.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:10.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:10.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:10.895 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:10.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:10.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:00:10.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:00:10.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:00:10.899 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:10.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:10.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:10.900 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:00:10.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:10.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:00:10.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:00:10.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:00:10.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:10.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:10.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:10.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:00:10.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:10.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:00:10.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:00:10.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:00:10.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:10.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:10.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:10.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:00:10.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:10.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:00:10.908 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:00:10.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:00:10.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:00:10.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:00:10.910 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:00:10.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:10.915 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:00:11.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:00:11.438 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:00:11.440 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:00:11.442 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:00:11.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:11.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:11.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:11.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:00:11.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:11.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:11.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:11.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:00:11.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:00:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:00:11.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:11.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:11.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:11.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:12.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:00:12.830 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:00:12.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:12.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:12.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:12.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:13.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:00:13.784 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:00:13.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:13.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:13.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:13.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:14.262 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:00:14.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:14.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:14.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:14.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:14.740 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:00:14.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:14.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:14.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:14.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:15.218 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:00:15.695 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:00:15.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:15.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:15.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:16.173 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:00:16.650 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:00:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:00:17.606 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:00:18.083 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:00:18.561 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:00:19.038 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:00:19.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:19.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:19.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:19.516 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:00:19.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:19.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:19.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:19.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:19.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:19.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:19.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:19.528 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:19.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:24.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:24.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:24.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:24.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:24.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:24.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:24.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:24.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:24.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:24.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:24.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:00:24.545 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:00:24.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:00:24.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:24.546 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:24.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:24.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:00:24.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:24.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:00:24.549 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:00:24.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:00:24.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:24.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:24.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:24.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:00:24.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:24.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:00:24.553 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:00:24.553 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:00:24.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:24.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:24.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:24.554 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:00:24.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:24.554 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:00:24.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:00:24.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:00:24.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:00:24.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:00:24.559 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:00:24.559 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:24.564 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:00:25.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:00:25.084 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:00:25.086 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:00:25.087 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:00:25.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:25.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:25.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:25.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:00:25.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:25.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:25.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:25.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:00:25.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:00:25.523 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:00:25.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:25.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:25.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:25.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:26.001 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:00:26.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:00:26.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:26.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:26.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:26.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:26.957 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:00:27.435 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:00:27.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:27.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:27.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:27.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:27.913 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:00:28.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:28.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:28.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:28.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:28.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:00:28.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:28.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:28.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:28.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:28.868 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:00:29.346 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:00:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:29.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:29.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:29.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:29.824 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:00:30.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:00:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:00:31.256 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:00:31.734 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:00:32.212 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:00:32.689 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:00:33.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:33.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:33.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:33.167 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:00:33.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:33.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:33.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:33.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:33.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:33.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:33.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:33.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:33.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:33.178 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:00:33.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:38.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:38.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:38.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:38.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:38.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:38.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:38.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:38.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:38.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:38.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:38.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:00:38.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:00:38.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:00:38.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:38.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:38.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:38.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:00:38.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:38.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:00:38.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:00:38.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:00:38.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:38.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:38.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:38.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:00:38.201 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:38.201 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:00:38.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:00:38.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:00:38.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:38.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:38.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:38.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:00:38.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:38.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:00:38.206 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:00:38.206 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:00:38.206 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:38.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:00:38.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:00:38.736 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:00:38.739 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:00:38.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:38.743 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:00:38.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:38.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:38.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:00:38.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:38.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:38.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:38.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:00:38.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:00:38.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:38.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:38.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:38.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:39.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:00:39.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:39.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:39.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:39.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:39.649 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:00:40.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:00:40.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:40.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:40.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:40.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:40.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:00:41.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:00:41.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:41.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:41.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:41.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:41.559 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:00:42.038 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:00:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:42.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:42.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:00:42.993 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:00:43.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:43.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:43.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:43.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:43.471 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:00:43.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:43.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:43.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:43.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:43.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:43.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:43.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:43.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:43.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:43.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:43.800 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:43.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:48.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:48.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:48.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:48.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:48.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:48.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:48.814 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:48.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:48.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:48.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:00:48.816 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:00:48.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:00:48.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:00:48.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:48.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:48.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:48.822 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:00:48.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:00:48.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:00:48.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:00:48.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:00:48.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:48.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:48.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:48.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:00:48.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:00:48.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:00:48.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:00:48.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:00:48.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:48.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:00:48.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:48.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:00:48.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:00:48.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:00:48.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:00:48.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:00:48.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:00:48.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:00:48.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:00:48.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:00:48.831 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:00:48.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:00:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:00:48.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:00:49.319 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:00:49.362 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:00:49.364 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:00:49.366 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:00:49.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:49.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:49.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:49.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:00:49.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:49.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:49.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:49.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:00:49.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:00:49.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:00:49.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:49.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:49.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:49.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:50.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:00:50.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:00:50.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:50.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:50.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:50.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:51.230 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:00:51.707 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:00:51.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:51.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:51.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:51.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:52.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:00:52.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:00:52.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:00:52.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:52.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:00:52.663 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:00:52.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:52.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:52.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:52.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:53.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:00:53.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:00:53.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:53.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:53.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:53.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:54.095 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:00:54.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:00:55.050 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:00:55.528 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:00:56.006 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:00:56.483 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:00:56.961 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:00:57.438 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:00:57.916 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:00:58.394 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:00:58.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:00:58.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:00:58.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:00:58.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:00:58.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:00:58.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:00:58.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:00:58.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:00:58.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:00:58.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:00:58.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:00:58.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:00:58.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:00:58.519 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:00:58.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2068 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:03.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:03.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:03.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:03.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:03.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:03.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:03.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:03.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:03.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:03.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:03.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:03.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:03.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:03.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:03.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:03.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:03.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:03.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:03.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:03.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:03.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:03.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:03.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:03.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.540 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:03.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:03.541 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:03.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:03.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:03.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:03.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:03.545 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:04.028 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:04.071 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:04.074 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:04.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:04.075 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:04.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:04.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:04.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:04.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:04.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:04.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:04.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:04.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:04.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:01:04.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:04.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:04.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:04.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:04.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:01:05.459 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:01:05.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:05.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:05.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:05.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:05.938 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:01:06.415 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:01:06.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:06.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:06.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:06.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:06.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:01:07.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:07.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:07.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:07.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:07.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:07.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:07.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:07.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:07.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:07.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:07.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:07.197 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:07.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:07.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:07.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:07.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:12.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:12.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:12.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:12.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:12.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:12.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:12.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:12.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:12.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:12.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:12.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:12.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:12.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:12.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:12.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:12.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:12.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:12.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:12.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:12.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:12.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:12.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:12.218 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:12.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:12.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:12.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:12.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:12.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:12.220 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:12.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:12.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:12.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:12.221 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:12.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:12.221 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:12.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:12.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:12.224 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:12.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:12.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:12.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:12.752 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:12.754 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:12.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:12.756 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:12.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:12.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:12.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:12.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:12.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:12.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:12.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:12.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:13.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:01:13.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:13.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:13.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:13.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:13.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:01:14.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:01:14.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:14.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:14.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:14.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:14.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:01:15.095 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:01:15.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:15.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:15.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:15.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:15.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:01:15.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:15.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:15.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:15.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:15.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:15.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:15.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:15.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:15.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:15.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:15.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:15.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:15.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:15.883 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:15.883 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:20.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:20.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:20.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:20.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:20.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:20.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:20.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:20.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:20.887 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:20.887 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:20.887 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:20.888 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:20.888 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:20.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:20.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:20.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:20.888 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:20.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:20.889 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:20.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:20.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:20.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:20.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:20.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:20.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:20.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:20.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:20.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:20.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:20.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:20.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:20.893 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:20.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:20.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:20.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:21.366 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:21.406 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:21.406 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:21.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:21.407 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:21.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:21.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:21.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:21.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:21.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:21.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:21.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:21.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:21.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:21.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:21.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:21.682 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:21.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:26.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:26.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:26.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:26.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:26.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:26.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:26.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:26.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:26.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:26.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:26.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:26.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:26.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:26.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:26.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:26.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:26.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:26.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:26.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:26.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:26.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:26.693 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:26.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:26.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:27.168 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:27.204 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:27.204 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:27.204 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:27.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:27.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:27.206 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:27.206 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:27.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:27.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:27.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:27.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:27.249 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:32.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:32.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:32.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:32.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:32.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:32.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:32.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:32.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:32.257 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:32.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:32.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:32.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:32.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:32.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:32.259 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:32.259 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:32.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:32.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:32.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:32.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:32.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:32.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:32.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:32.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:32.261 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:32.262 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:32.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:32.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:32.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:32.263 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:32.263 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:32.263 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:32.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:32.268 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:32.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:32.776 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:32.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:32.777 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:32.777 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:32.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:32.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:32.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:32.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:32.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:32.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:32.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:32.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:33.203 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:01:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:33.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:33.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:01:34.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:01:34.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:34.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:34.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:34.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:34.606 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:01:34.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:34.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:34.830 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:34.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:34.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:34.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:34.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:34.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:34.831 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:34.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:39.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:39.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:39.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:39.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:39.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:39.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:39.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:39.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:39.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:39.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:39.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:39.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:39.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:39.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:39.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:39.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:39.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:39.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:39.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:39.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:39.840 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:39.840 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:39.845 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:40.312 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:40.352 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:40.353 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:40.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:40.353 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:40.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:40.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:40.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:40.780 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:01:40.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:40.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:40.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:40.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:41.248 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:01:41.716 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:01:41.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:41.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:41.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:41.845 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:42.184 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:01:42.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:42.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:42.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:42.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:42.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:42.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:42.408 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:42.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:42.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:42.408 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:42.408 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:42.408 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:42.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:42.408 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:01:47.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:47.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:47.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:47.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:47.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:47.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:47.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:47.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:47.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:47.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:47.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:47.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:47.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:47.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:47.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:47.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:47.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:47.418 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:47.418 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:47.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:47.423 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:47.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:47.930 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:47.930 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:47.930 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:47.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:47.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:47.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:47.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:01:47.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:47.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:47.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:47.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:01:47.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:01:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:01:48.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:48.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:48.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:48.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:48.832 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:01:49.300 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:01:49.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:49.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:49.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:49.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:01:50.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:01:50.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:50.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:50.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:50.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:50.704 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:01:50.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:01:50.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:01:50.984 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:50.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:50.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:01:51.030 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.071 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.108 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.150 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.172 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:01:51.187 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.224 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.265 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.307 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.344 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.385 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:51.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:51.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:51.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:51.427 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.464 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:51.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:01:51.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:01:51.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:51.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:51.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:51.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:51.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:51.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:51.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:51.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:51.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:51.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:51.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:51.508 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:01:56.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:56.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:56.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:56.509 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:56.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:56.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:56.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:56.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:56.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:56.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:01:56.513 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:56.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:01:56.514 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:01:56.514 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:56.515 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:01:56.515 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:01:56.515 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:01:56.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:56.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:01:56.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:56.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:01:56.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:01:56.516 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:01:56.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:01:56.517 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:01:56.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:01:56.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:01:56.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:01:57.031 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:01:57.032 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:01:57.032 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:01:57.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:01:57.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:01:57.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:01:57.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:01:57.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:01:57.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:01:57.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:01:57.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:01:57.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:01:57.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:01:57.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:01:57.070 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:02.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:02.071 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:02.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:02.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:02.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:02.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:02.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:02.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:02.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:02.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:02.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:02.076 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:02.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:02.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:02.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:02.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:02.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:02.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:02.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:02.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:02.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:02.079 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:02.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:02.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:02.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:02.592 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:02.593 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:02.593 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:02.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:03.019 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:03.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:03.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:03.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:03.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:03.487 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:02:03.955 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:02:04.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:04.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:04.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:04.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:04.423 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:02:04.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:02:05.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:05.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:05.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:05.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:05.358 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:02:05.826 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:02:06.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:06.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:06.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:06.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:06.294 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:02:06.761 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:02:07.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:07.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:07.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:07.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:07.229 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:02:07.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:02:08.164 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:02:08.631 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:02:09.099 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:02:09.567 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:02:10.034 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:02:10.502 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:02:10.969 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:02:11.437 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:02:11.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:11.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:11.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:11.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:11.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:11.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:11.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:11.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:11.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:11.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:11.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:11.601 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:16.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:16.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:16.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:16.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:16.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:16.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:16.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:16.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:16.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:16.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:16.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:16.607 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:16.608 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:16.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:16.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:16.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:16.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:16.609 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:16.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:16.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:16.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:16.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:16.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:16.611 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:16.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:16.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:16.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:17.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:17.123 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:17.124 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:17.124 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:17.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:17.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:17.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:17.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:17.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:18.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:02:18.487 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:02:18.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:18.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:18.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:18.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:18.954 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:02:19.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:02:19.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:19.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:19.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:19.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:19.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:02:20.358 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:02:20.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:20.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:20.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:20.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:02:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:02:21.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:21.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:21.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:21.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:02:22.243 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:02:22.721 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:02:23.200 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:02:23.671 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:02:24.140 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:02:24.609 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:02:25.078 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:02:25.546 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:02:26.017 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:02:26.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:26.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:26.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:26.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:26.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:26.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:26.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:26.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:26.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:26.156 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:26.157 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:31.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:31.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:31.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:31.157 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:31.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:31.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:31.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:31.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:31.169 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:31.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:31.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:31.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:31.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:31.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:31.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:31.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:31.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:31.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:31.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:31.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:31.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:31.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:31.177 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:31.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:31.177 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:31.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:31.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:31.181 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:31.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:31.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:31.662 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:31.712 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:31.714 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:31.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:31.716 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:32.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:32.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:32.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:32.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:32.617 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:02:33.084 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:02:33.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:33.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:33.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:33.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:33.561 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:02:34.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:02:34.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:34.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:34.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:34.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:34.511 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:02:34.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:34.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:34.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:34.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:34.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:34.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:34.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:34.744 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:34.745 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=767 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:39.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:39.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:39.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:39.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:39.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:39.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:39.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:39.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:39.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:39.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:39.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:39.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:39.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:39.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:39.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:39.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:39.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:39.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:39.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:39.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:39.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:39.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:39.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:39.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:39.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:39.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:39.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:39.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:39.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:39.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:39.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:39.769 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:39.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:39.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:40.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:40.285 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:40.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:40.286 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:40.286 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:40.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:02:40.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:02:40.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:02:40.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:02:40.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:02:40.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:02:40.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:02:40.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:02:40.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:40.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:02:40.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:02:40.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:02:40.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:02:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:40.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:40.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:02:40.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:02:40.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:02:40.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:40.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:40.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:40.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:40.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:40.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:40.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:40.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:40.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:40.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:40.752 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.753 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.754 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.754 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:40.754 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:45.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:45.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:45.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:45.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:45.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:45.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:45.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:45.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:45.758 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:45.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:45.758 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:45.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:45.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:45.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:45.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:45.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:45.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:45.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:45.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:45.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:45.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:45.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:45.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:45.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:45.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:45.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:45.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:45.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:45.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:45.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:45.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:45.768 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:45.769 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:46.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:46.298 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:46.299 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:46.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:46.300 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:46.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:46.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:46.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:46.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:46.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:46.318 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:46.319 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:51.317 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:51.317 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:51.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:51.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:51.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:51.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:51.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:51.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:51.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:51.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:51.329 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:51.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:51.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:51.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:51.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:51.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:51.333 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:51.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:51.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:51.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:51.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:51.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:51.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:51.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:51.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:51.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:51.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:51.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:51.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:51.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:51.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:51.344 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:51.344 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:51.344 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:51.349 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:51.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:51.875 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:51.876 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:51.877 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:51.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:52.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:52.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:52.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:52.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:52.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:52.787 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:02:53.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:02:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:53.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:53.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:53.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:53.743 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:02:53.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:53.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:53.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:53.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:02:53.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:53.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:53.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:53.900 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:53.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:02:58.902 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:02:58.902 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:02:58.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:58.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:58.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:58.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:58.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:02:58.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:58.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:58.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:02:58.916 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:02:58.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:02:58.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:02:58.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:58.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:58.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:02:58.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:02:58.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:02:58.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:02:58.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:02:58.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:02:58.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:58.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:58.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:02:58.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:02:58.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:02:58.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:02:58.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:02:58.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:02:58.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:58.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:02:58.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:02:58.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:02:58.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:02:58.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:02:58.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:02:58.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:02:58.928 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:02:58.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:02:58.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:02:59.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:02:59.455 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:02:59.457 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:02:59.458 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:02:59.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:02:59.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:02:59.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:02:59.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:02:59.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:02:59.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:02:59.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:02:59.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:02:59.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:02:59.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:02:59.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:02:59.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:02:59.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:02:59.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:00.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:00.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:00.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:00.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:00.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:03:01.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:01.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:01.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:02.279 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:03:02.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:02.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:02.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:02.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:02.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:02.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:02.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:02.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:02.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:02.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:02.298 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:02.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:03:07.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:07.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:07.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:07.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:07.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:07.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:07.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:07.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:07.324 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:07.324 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:07.324 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:07.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:07.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:07.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:07.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:07.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:07.331 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:07.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:07.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:07.333 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:07.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:07.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:07.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:07.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:07.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:07.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:07.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:07.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:07.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:07.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:07.337 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:07.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:07.337 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:07.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:07.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:07.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:07.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:07.341 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:07.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:07.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:07.824 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:07.870 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:07.871 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:07.872 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:07.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:07.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:07.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:07.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:07.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:03:07.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:03:07.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:03:07.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:03:07.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:03:08.299 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:08.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:08.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:08.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:08.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:08.773 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:09.245 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:09.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:09.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:09.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:09.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:09.721 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:09.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:09.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:09.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:09.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:09.979 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:09.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:14.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:14.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:14.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:14.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:14.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:14.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:14.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:14.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:14.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:14.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:14.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:14.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:14.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:14.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:14.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:14.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:14.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:14.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:14.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:14.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:14.990 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:14.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:14.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:15.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:15.513 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:15.514 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:15.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:15.515 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:15.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:15.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:15.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:15.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:03:15.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:03:15.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:03:15.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:03:15.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:03:15.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:15.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:15.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:15.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:15.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:16.900 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:16.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:16.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:16.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:17.370 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:03:17.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:17.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:17.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:17.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:18.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:03:18.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:18.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:18.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:18.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:18.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:18.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:18.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:18.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:18.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:18.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:18.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:18.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:18.340 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:23.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:23.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:23.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:23.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:23.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:23.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:23.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:23.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:23.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:23.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:23.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:23.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:23.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:23.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:23.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:23.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:23.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:23.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:23.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:23.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:23.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:23.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:23.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:23.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:23.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:23.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:23.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:23.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:23.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:23.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:23.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:23.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:23.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:23.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:23.367 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:23.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:23.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:23.849 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:23.887 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:23.887 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:23.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:23.887 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:23.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:03:23.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:03:23.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:03:24.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:24.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:24.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:24.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:24.796 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:25.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:25.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:25.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:25.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:25.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:25.744 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:25.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:25.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:25.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:25.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:25.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:25.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:25.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:25.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:25.997 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:25.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:31.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:31.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:31.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:31.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:31.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:31.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:31.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:31.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:31.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:31.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:31.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:31.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:31.021 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:31.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:31.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:31.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:31.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:31.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:31.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:31.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:31.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:31.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:31.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:31.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:31.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:31.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:31.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:31.032 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:31.032 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:31.032 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:31.032 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:31.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:31.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:31.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:31.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:31.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:31.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:31.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:31.036 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:31.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:31.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:31.519 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:31.565 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:31.567 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:31.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:31.568 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:31.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:31.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:31.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:31.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:03:31.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:03:31.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:03:31.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:03:31.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:03:31.988 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:32.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:32.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:32.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:32.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:32.460 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:33.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:33.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:33.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:33.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:33.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:33.879 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:03:34.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:34.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:34.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:34.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:34.352 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:03:34.827 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:03:35.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:35.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:35.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:35.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:35.302 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:03:35.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:35.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:35.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:35.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:35.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:35.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:35.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:35.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:35.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:35.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:35.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:35.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:35.320 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:40.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:40.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:40.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:40.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:40.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:40.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:40.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:40.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:40.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:40.327 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:40.327 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:40.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:40.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:40.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:40.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:40.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:40.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:40.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:40.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:40.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:40.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:40.331 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:40.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:40.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:40.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:40.845 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:40.846 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:40.846 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:40.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:40.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:03:40.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:03:40.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:03:41.287 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:41.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:41.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:41.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:41.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:41.762 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:42.231 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:42.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:42.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:42.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:42.700 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:43.175 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:03:43.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:43.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:43.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:43.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:43.648 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:03:43.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:43.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:43.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:43.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:43.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:43.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:43.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:43.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:43.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:43.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:43.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:43.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:43.904 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:48.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:48.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:48.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:48.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:48.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:48.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:48.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:48.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:48.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:48.921 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:48.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:48.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:48.922 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:48.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:48.922 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:48.923 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:48.923 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:48.924 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:48.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:48.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:48.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:48.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:48.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:48.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:48.929 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:48.930 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:48.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:49.454 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:49.456 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:49.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:49.458 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:49.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:49.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:49.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:49.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:49.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:50.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:50.831 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:50.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:50.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:50.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:50.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:51.310 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:51.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:51.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:51.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:51.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:51.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:51.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:51.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:51.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:51.471 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:03:56.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:03:56.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:03:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:56.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:56.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:56.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:56.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:03:56.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:56.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:56.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:03:56.481 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:03:56.484 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:03:56.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:03:56.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:56.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:56.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:03:56.485 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:03:56.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:03:56.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:03:56.487 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:03:56.487 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:03:56.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:56.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:56.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:03:56.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:03:56.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:03:56.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:56.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:03:56.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:03:56.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:03:56.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:03:56.494 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:03:56.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:03:56.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:03:57.020 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:03:57.021 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:03:57.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:57.023 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:03:57.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:03:57.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:03:57.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:03:57.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:03:57.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:03:57.451 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:03:57.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:57.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:57.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:57.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:57.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:03:58.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:03:58.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:58.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:58.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:58.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:58.861 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:03:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:03:59.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:03:59.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:03:59.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:03:59.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:03:59.803 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:04:00.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:00.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:00.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:00.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:00.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:00.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:00.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:00.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:00.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:00.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:00.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:00.080 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:00.080 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:05.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:05.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:05.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:05.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:05.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:05.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:05.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:05.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:05.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:05.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:05.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:05.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:05.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:05.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:05.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:05.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:05.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:05.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:05.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:05.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:05.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:05.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:05.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:05.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:05.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:05.098 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:05.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:05.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:05.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:05.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:05.103 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:05.103 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:05.103 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.108 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:05.591 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:05.634 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:05.636 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:05.637 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:05.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:05.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:05.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:04:05.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:05.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:05.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:05.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:05.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:05.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:05.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:05.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:05.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:05.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:05.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:05.673 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:05.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:05.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:05.673 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.673 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.674 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.674 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.674 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.674 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:05.674 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:10.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:10.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:10.675 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:10.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:10.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:10.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:10.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:10.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:10.687 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:10.687 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:10.687 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:10.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:10.691 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:10.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:10.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:10.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:10.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:10.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:10.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:10.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:10.694 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:10.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:10.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:10.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:10.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:10.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:10.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:10.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:10.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:10.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:10.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:10.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:10.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:10.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:10.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:10.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:10.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:10.700 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:10.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:10.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:11.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:11.220 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:11.220 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:11.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:11.221 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:11.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:11.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:11.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:04:11.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:04:11.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:11.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:11.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:11.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:12.136 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:04:12.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:04:12.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:12.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:12.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:12.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:13.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:04:13.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:04:13.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:13.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:13.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:13.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:14.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:04:14.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:14.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:14.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:14.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:14.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:14.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:14.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:14.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:14.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:14.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:14.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:14.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:14.263 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:14.263 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.263 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.263 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:14.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=765 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:19.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:19.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:19.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:19.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:19.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:19.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:19.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:19.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:19.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:19.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:19.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:19.279 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:19.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:19.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:19.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:19.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:19.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:19.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:19.281 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:19.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:19.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:19.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:19.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:19.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:19.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:19.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:19.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:19.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:19.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:19.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:19.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:19.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:19.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:19.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:19.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:19.287 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:19.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:19.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:19.816 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:19.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:19.819 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:19.820 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:19.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:19.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:19.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:04:19.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:19.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:19.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:19.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:19.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:19.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:19.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:19.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:19.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:19.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:19.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:19.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:19.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:19.869 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:19.869 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:24.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:24.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:24.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:24.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:24.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:24.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:24.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:24.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:24.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:24.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:24.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:24.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:24.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:24.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:24.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:24.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:24.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:24.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:24.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:24.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:24.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:24.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:24.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:24.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:24.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:24.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:24.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:24.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:24.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:24.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:24.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:24.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:24.890 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:24.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:24.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:24.895 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:25.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:25.409 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:25.409 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:25.410 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:25.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:25.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:25.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:25.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:25.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:25.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:25.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:25.415 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:25.415 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:25.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:30.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:30.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:30.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:30.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:30.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:30.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:30.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:30.423 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:30.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:30.423 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:30.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:30.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:30.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:30.426 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:30.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:30.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:30.428 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:30.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:30.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:30.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:30.431 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:30.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:30.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:30.961 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:30.963 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:30.965 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:30.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:30.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:30.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:30.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:30.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:30.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:30.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:30.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:30.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:30.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:30.983 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:30.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:30.983 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.983 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.984 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.985 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:30.985 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:35.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:35.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:35.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:35.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:35.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:35.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:35.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:35.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:35.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:35.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:35.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:36.001 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:36.001 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:36.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:36.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:36.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:36.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:36.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:36.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:36.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:36.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:36.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:36.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:36.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:36.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:36.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:36.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:36.007 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:36.007 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:36.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:36.007 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:36.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:36.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:36.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:36.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:36.011 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:36.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:36.011 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.012 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:36.012 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:36.012 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:36.012 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:36.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:36.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:36.533 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:36.534 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:36.534 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:36.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:36.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:36.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:36.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:36.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:36.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:36.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:36.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:36.544 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:36.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:36.545 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:41.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:41.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:41.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:41.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:41.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:41.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:41.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:41.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:41.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:41.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:41.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:41.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:41.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:41.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:41.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:41.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:41.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:41.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:41.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:41.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:41.569 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:41.569 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:41.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:41.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:41.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:41.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:41.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:41.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:41.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:41.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:41.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:41.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:41.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:41.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:41.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:41.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:41.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:41.575 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:41.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:41.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:42.061 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:42.099 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:42.100 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:42.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:42.102 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:42.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:42.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:42.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:42.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:42.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:42.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:42.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:42.113 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:42.113 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:47.113 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:47.113 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:47.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:47.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:47.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:47.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:47.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:47.124 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:47.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:47.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:47.125 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:47.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:47.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:47.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:47.128 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:47.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:47.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:47.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:47.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:47.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:47.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:47.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:47.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:47.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:47.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.135 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:47.135 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:47.136 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:47.136 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:47.623 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:47.657 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:47.658 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:47.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:47.659 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:48.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:04:48.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:48.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:48.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:48.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:04:49.040 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:04:49.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:49.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:49.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:49.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:49.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:04:49.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:04:50.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:50.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:50.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:50.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:50.451 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:04:50.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:50.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:50.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:04:50.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:04:50.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:04:50.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:04:50.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:04:50.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:04:50.929 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:04:51.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:51.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:51.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:51.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:51.407 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:04:51.885 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:04:52.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:52.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:52.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:52.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:52.362 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:04:52.840 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:04:52.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:52.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:52.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:52.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:52.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:52.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:52.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:52.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:52.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:52.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:52.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:52.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:52.977 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.977 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:52.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:57.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:57.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:57.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:57.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:57.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:57.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:57.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:57.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:57.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:57.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:04:57.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:04:57.996 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:04:57.996 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:04:57.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:57.997 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:57.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:57.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:04:57.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:04:57.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:04:57.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:04:58.000 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:04:58.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:58.000 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:58.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:58.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:04:58.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:04:58.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:04:58.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:04:58.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:04:58.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:58.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:04:58.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:58.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:04:58.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:04:58.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:04:58.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:04:58.006 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:04:58.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:04:58.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:04:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:04:58.536 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:04:58.538 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:04:58.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:04:58.540 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:04:58.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:04:58.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:04:58.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:04:58.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:04:58.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:04:58.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:04:58.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:04:58.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:04:58.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:04:58.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:04:58.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:04:58.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:04:58.573 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:04:58.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:04:58.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:03.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:03.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:03.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:03.597 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:03.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:03.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:03.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:03.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:03.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:03.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:03.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:03.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:03.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:03.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:03.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:03.608 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:03.608 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:03.608 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:03.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:03.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:03.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:03.609 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:03.610 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:03.610 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:03.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:03.610 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:03.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:03.611 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:03.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:03.611 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:03.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:03.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:03.614 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:03.614 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:03.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:04.102 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:04.140 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:04.142 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:04.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:04.143 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:04.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:04.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:04.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:04.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:04.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:04.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:04.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:04.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:04.167 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:04.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:04.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:04.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:04.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:04.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:04.167 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:09.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:09.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:09.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:09.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:09.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:09.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:09.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:09.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:09.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:09.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:09.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:09.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:09.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:09.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:09.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:09.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:09.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:09.191 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:09.191 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:09.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:09.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:09.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:09.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:09.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:09.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:09.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:09.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:09.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:09.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:09.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:09.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:09.199 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:09.199 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:09.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:09.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.204 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:09.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:09.726 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:09.728 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:09.729 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:09.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:09.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:09.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:09.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:09.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:09.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:09.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:09.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:09.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:09.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:09.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:09.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:09.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:09.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:09.765 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:09.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:09.765 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:14.765 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:14.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:14.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:14.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:14.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:14.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:14.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:14.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:14.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:14.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:14.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:14.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:14.783 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:14.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:14.783 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:14.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:14.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:14.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:14.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:14.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:14.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:14.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:14.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:14.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:14.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:14.794 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:14.794 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:14.794 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:14.799 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:15.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:15.324 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:15.326 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:15.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.328 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:15.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:15.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:15.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:15.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:15.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:15.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:15.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:15.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:15.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:15.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:15.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:15.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:15.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:15.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:15.403 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:15.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.404 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:15.405 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:20.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:20.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:20.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:20.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:20.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:20.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:20.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:20.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:20.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:20.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:20.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:20.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:20.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:20.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:20.418 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:20.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:20.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:20.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:20.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:20.421 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:20.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:20.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:20.424 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:20.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:20.424 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:20.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:20.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:20.428 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:20.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:20.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:20.917 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:20.962 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:20.964 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:20.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:20.967 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:20.969 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 02:05:20.969 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 200
2026-01-23 02:05:20.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 02:05:21.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:21.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:21.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:05:21.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:21.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:21.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:21.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:21.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:21.877 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:05:22.358 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:05:22.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:22.604 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 02:05:22.604 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 0
2026-01-23 02:05:22.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 02:05:22.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:22.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:22.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:22.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:22.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:22.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:22.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:22.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:22.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:22.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:22.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:22.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:22.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:22.615 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:22.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:22.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:27.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:27.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:27.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:27.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:27.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:27.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:27.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:27.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:27.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:27.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:27.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:27.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:27.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:27.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:27.622 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:27.622 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:27.622 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:27.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:27.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:27.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:27.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:27.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:27.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:27.623 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:27.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:27.624 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:27.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:27.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:28.099 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:28.139 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:28.140 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:28.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:28.140 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:28.141 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 02:05:28.141 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 200
2026-01-23 02:05:28.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 02:05:28.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:28.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:28.570 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:05:28.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:28.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:28.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:28.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:28.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:05:29.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.511 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:05:29.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.751 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 02:05:29.751 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 0
2026-01-23 02:05:29.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 02:05:29.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:29.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:29.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:29.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:29.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:29.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:29.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:29.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:29.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:29.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:29.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:29.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:29.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:29.755 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:29.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:34.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:34.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:34.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:34.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:34.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:34.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:34.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:34.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:34.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:34.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:34.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:34.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:34.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:34.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:34.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:34.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:34.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:34.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:34.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:34.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:34.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:34.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:34.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:34.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:34.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:34.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:34.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:34.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:34.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:34.778 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:34.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:34.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:35.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:35.316 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:35.316 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:35.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:35.317 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:35.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:35.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:35.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:35.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:35.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:35.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:35.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:35.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:35.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:35.334 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:40.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:40.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:40.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:40.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:40.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:40.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:40.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:40.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:40.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:40.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:40.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:40.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:40.345 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:40.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:40.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:40.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:40.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:40.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:40.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:40.348 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:40.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:40.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:40.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:40.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:40.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:40.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:40.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:40.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:40.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:40.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:40.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:40.354 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:40.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:40.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:40.840 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:40.879 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:40.881 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:40.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:40.883 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:40.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:40.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:40.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:40.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:40.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:40.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:40.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:40.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:40.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:40.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:40.925 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:40.925 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:05:45.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:05:45.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:05:45.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:45.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:45.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:45.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:45.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:05:45.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:45.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:45.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:05:45.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:05:45.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:05:45.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:05:45.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:45.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:45.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:05:45.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:05:45.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:05:45.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:05:45.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:05:45.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:05:45.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:45.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:45.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:05:45.937 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:05:45.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:05:45.937 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:45.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:05:45.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:05:45.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:05:45.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:05:45.941 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:05:45.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:05:45.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:05:46.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:05:46.496 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:05:46.499 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:05:46.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:46.502 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:05:46.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:46.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:46.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:46.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:46.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:46.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:46.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:46.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:46.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:46.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:46.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:46.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:46.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:46.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:46.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:46.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:46.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:46.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:46.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:46.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:46.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:46.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:46.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:46.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:46.904 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:05:46.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:46.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:46.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:46.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:47.382 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:05:47.860 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:05:47.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:47.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:47.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:47.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:48.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:05:48.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:05:48.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:48.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:48.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:48.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:49.294 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:05:49.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:49.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:49.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:49.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:49.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:49.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:49.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:49.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:49.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:49.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:49.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:49.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:49.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:49.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:49.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:49.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:49.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:05:49.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:49.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:49.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:49.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:49.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:49.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:49.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:49.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:49.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:49.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:49.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:49.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:49.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:49.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:50.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:05:50.718 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:05:50.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:05:50.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:05:50.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:05:50.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:05:51.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:05:51.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:05:52.151 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:05:52.629 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:05:52.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:52.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:52.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:52.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:52.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:52.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:52.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:52.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:52.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:52.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:52.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:52.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:52.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:52.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:52.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:52.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:53.106 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:05:53.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:05:54.061 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:05:54.539 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:05:55.017 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:05:55.495 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:05:55.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:55.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:55.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:55.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:55.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:55.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:55.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:55.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:55.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:55.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:55.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:55.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:55.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:55.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:55.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:55.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:55.972 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:05:55.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:55.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:55.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:55.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:55.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:55.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:55.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:55.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:56.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:56.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:56.025 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:56.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:56.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:56.445 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:05:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:05:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:57.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:57.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:57.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:57.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:57.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:57.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:57.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:57.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:57.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:57.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:57.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:57.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:57.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:57.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:57.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:05:57.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:05:57.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:05:57.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:57.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:57.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:05:57.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:05:57.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:05:57.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:05:57.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:05:57.396 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:05:57.874 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:05:58.353 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:05:58.830 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:05:59.308 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:05:59.786 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:06:00.264 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:06:00.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:00.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:00.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:00.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:00.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:00.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:00.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:00.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:00.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:00.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:00.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:00.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:00.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:00.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:00.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:00.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:00.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:00.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:00.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:00.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:00.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:00.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:00.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:00.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:00.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:00.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:00.739 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:06:01.217 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:06:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:06:02.172 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:06:02.650 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:06:03.128 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:06:03.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:03.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:03.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:03.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:03.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:03.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:03.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:03.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:03.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:03.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:03.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:03.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:03.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:03.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:03.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:03.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:03.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:03.605 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:06:04.083 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:06:04.562 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:06:05.040 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:06:05.518 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:06:05.994 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:06:06.471 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:06:06.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:06.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:06.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:06.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:06.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:06.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:06.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:06.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:06.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:06.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:06.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:06.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:06.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:06.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:06.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:06.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:06.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:06.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:06.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:06.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:06.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:06.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:06.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:06.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:06.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:06.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:06.946 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:06:07.424 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:06:07.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:07.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:07.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:07.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:07.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:07.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:07.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:07.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:07.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:07.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:07.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:07.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:07.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:07.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:07.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:07.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:07.900 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:06:07.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:07.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:07.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:07.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:07.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:07.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:07.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:07.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:07.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:07.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:07.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:08.376 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:06:08.851 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:06:09.329 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:06:09.806 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:06:10.284 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:06:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:06:10.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:10.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:10.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:10.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:10.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:10.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:10.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:10.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:10.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:10.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:10.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:10.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:10.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:11.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:11.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:11.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:11.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:11.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:11.239 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:06:11.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:11.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:11.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:11.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:11.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:11.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:11.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:11.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:11.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:11.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:11.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:11.717 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:06:12.194 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:06:12.672 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:06:13.150 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:06:13.627 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:06:14.105 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:06:14.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:14.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:14.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:14.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:14.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:14.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:14.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:14.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:14.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:14.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:14.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:14.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:14.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:14.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:14.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:14.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:14.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:14.582 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:06:15.060 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:06:15.538 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:06:16.016 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:06:16.493 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:06:16.971 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:06:17.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:17.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:17.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:17.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:17.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:17.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:17.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:17.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:17.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:17.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:17.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:17.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:17.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:17.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:17.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:17.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:17.447 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:06:17.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:17.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:17.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:17.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:17.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:17.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:17.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:17.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:17.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:17.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:17.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:17.925 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:06:18.402 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:06:18.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:18.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:18.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:18.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:18.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:18.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:18.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:18.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:18.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:18.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:18.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:18.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:18.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:18.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:18.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:18.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:18.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:18.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:18.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:18.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:18.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:18.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:18.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:18.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:18.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:18.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:18.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:18.878 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:06:19.356 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:06:19.834 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:06:20.311 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:06:20.789 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:06:21.266 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:06:21.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:21.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:21.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:21.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:21.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:21.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:21.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:21.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:21.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:21.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:21.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:21.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:21.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.744 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:06:21.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:21.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:21.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:21.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:21.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:21.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:21.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:21.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:21.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:21.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:21.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:21.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:21.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:21.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:21.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:22.220 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:06:22.697 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:06:23.175 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:06:23.652 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:06:24.131 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:06:24.609 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:06:24.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:24.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:24.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:24.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:24.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:24.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:24.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:24.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:24.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:24.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:24.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:24.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:24.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:24.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:24.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:24.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:24.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:25.086 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:06:25.564 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:06:26.042 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:06:26.520 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:06:26.997 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:06:27.474 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:06:27.952 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:06:27.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:27.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:27.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:27.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:28.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:28.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:28.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:28.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:28.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:28.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:28.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:28.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:28.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:28.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:28.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:28.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:28.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:28.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:28.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:28.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:28.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:28.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:28.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:28.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:28.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:28.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:28.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:28.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.429 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:06:28.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:28.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:28.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:28.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:28.906 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:06:28.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:28.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:28.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:28.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:28.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:28.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:28.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:28.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:28.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:28.913 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:06:28.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:33.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:33.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:33.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:33.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:33.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:33.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:33.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:33.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:06:33.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:06:33.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:06:33.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:33.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:33.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:33.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:06:33.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:33.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:06:33.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:06:33.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:06:33.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:33.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:33.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:33.938 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:06:33.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:33.938 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:06:33.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:06:33.940 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:06:33.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:33.940 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:33.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:33.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:06:33.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:33.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:06:33.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:06:33.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:06:33.944 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:06:33.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:33.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:33.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:33.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:06:34.432 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:06:34.480 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:06:34.482 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:06:34.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.484 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:06:34.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:34.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.516 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:34.516 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:34.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:34.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:34.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:34.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:34.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:34.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:34.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:34.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:34.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:34.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:34.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:34.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:06:34.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:34.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:34.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:34.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:34.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:34.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:34.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:34.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:34.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:34.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:34.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:35.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:35.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:35.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:35.001 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:06:35.001 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=226 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=226 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:35.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:40.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:40.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:40.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:40.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:40.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:40.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:40.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:40.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:40.014 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:40.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:40.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:06:40.015 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:06:40.015 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:06:40.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:40.015 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:40.015 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:40.016 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:06:40.016 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:40.016 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:06:40.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:06:40.019 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:06:40.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:40.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:40.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:40.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:06:40.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:40.020 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:06:40.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:06:40.023 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:06:40.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:40.023 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:40.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:40.023 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:06:40.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:40.023 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:06:40.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:06:40.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:06:40.028 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:06:40.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:40.033 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:06:40.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:06:40.565 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:06:40.567 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:06:40.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:40.569 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:06:40.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:40.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:40.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:40.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:40.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:40.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:40.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:40.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:40.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:40.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:40.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:40.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:40.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:40.994 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:06:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:41.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:41.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:41.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:41.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:41.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:41.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:41.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.471 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:06:41.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:41.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:41.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:41.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:41.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:41.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:41.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:41.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:41.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:41.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:41.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:06:42.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:42.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:42.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:42.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:42.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:42.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:42.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:42.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:42.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:42.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:42.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:42.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:42.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:42.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:42.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:42.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:42.353 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:06:42.353 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:42.353 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:42.353 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:47.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:47.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:47.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:47.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:47.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:47.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:47.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:47.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:47.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:47.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:47.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:06:47.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:06:47.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:06:47.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:47.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:47.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:47.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:06:47.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:47.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:06:47.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:06:47.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:06:47.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:47.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:47.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:47.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:06:47.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:47.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:06:47.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:06:47.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:06:47.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:47.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:47.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:47.376 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:06:47.376 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:47.376 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:06:47.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:06:47.379 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:06:47.379 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:06:47.379 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:47.384 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:06:47.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:06:47.904 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:06:47.906 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:06:47.906 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:06:47.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:47.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:47.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:47.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:47.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:47.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:47.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:47.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:47.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:47.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:47.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:47.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:48.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:48.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:48.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.344 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:06:48.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:48.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:48.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:48.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:48.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:48.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:48.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.822 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:06:48.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:48.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:48.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:48.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:48.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:48.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:48.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:48.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:48.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:48.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:49.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:49.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:49.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:49.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:49.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:49.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:49.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:49.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:49.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:49.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:49.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:49.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:49.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:49.228 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:06:49.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.229 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:49.230 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:06:54.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:54.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:54.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:54.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:54.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:54.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:54.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:54.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:54.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:54.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:06:54.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:06:54.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:06:54.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:06:54.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:54.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:54.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:54.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:06:54.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:06:54.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:06:54.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:06:54.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:06:54.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:54.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:54.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:06:54.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:54.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:06:54.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:06:54.250 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:06:54.250 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:06:54.250 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:54.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:06:54.250 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:06:54.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:54.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:06:54.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:06:54.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:06:54.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:06:54.253 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:06:54.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:06:54.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:06:54.740 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:06:54.780 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:06:54.782 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:06:54.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:54.784 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:06:54.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:54.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:54.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:54.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:54.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:54.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:54.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:54.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:54.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:54.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:54.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:54.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:54.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:55.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:55.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:55.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.218 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:06:55.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:55.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:55.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:55.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:55.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:55.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:55.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:55.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.695 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:06:55.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:55.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:55.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:06:55.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:06:55.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:06:55.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:55.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:06:55.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:06:55.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:55.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:56.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:06:56.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:06:56.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:06:56.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:06:56.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:06:56.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:06:56.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:06:56.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:06:56.094 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:07:01.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:01.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:01.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:01.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:01.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:01.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:01.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:01.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:01.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:01.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:01.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:07:01.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:07:01.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:07:01.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:01.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:01.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:01.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:07:01.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:01.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:07:01.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:07:01.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:07:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:01.118 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:01.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:01.118 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:07:01.118 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:01.118 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:01.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:07:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:01.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:07:01.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:07:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:07:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:07:01.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:07:01.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:07:01.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:07:01.123 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:07:01.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:01.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:07:01.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:07:01.656 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:07:01.658 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:07:01.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:01.660 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:07:01.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:01.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:01.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:01.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:01.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:01.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:01.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:01.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:01.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:01.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:01.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:01.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:01.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:02.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:07:02.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:02.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:02.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:02.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:02.565 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:07:03.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:07:03.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:03.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:03.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:03.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:03.521 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:07:03.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:03.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:03.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:03.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:03.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:03.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:03.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:03.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:03.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:03.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:03.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:03.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:03.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:03.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:03.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:03.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:03.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:03.996 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:07:04.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:04.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:04.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:04.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:04.474 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:07:04.949 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:07:05.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:05.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:05.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:05.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:05.426 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:07:05.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:05.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:05.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:05.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:05.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:05.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:05.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:05.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:05.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:05.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:05.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:05.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:05.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:05.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:05.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:05.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:05.904 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:07:06.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:06.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:06.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:06.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:06.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:07:06.859 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:07:07.336 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:07:07.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:07.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:07.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:07.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:07.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:07.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:07.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:07.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:07.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:07.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:07.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:07.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:07.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:07.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:07.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:07.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:07.813 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:07:08.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:07:08.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:07:09.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:09.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:09.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:09.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:09.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:09.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:09.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:07:09.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:09.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:09.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:09.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:09.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:09.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:09.246 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:09.246 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:14.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:14.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:14.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:14.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:14.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:14.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:14.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:14.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:14.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:14.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:14.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:14.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:07:14.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:14.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:07:14.263 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:07:14.263 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:07:14.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:14.263 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:14.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:14.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:07:14.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:14.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:07:14.265 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:07:14.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:07:14.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:14.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:14.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:07:14.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:14.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:14.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:07:14.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:07:14.270 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:07:14.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:14.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:07:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:07:14.796 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:07:14.797 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:07:14.798 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:07:14.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:14.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:14.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:14.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:14.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:14.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:14.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:14.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:14.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:14.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:14.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:14.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:15.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:07:15.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:15.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:15.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:15.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:07:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:07:16.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:16.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:16.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:16.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:07:16.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:16.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:16.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:16.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:16.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:16.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:16.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:16.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:16.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:16.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:16.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:16.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:16.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:16.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:16.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:16.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:16.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:07:17.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:17.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:17.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:17.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:17.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:07:18.104 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:07:18.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:18.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:18.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:18.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:07:18.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:18.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:18.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:18.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:18.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:18.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:18.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:18.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:18.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:18.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:18.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:18.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:18.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:18.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:18.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:18.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:18.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:19.060 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:07:19.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:19.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:19.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:19.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:19.537 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:07:20.015 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:07:20.492 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:07:20.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:20.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:20.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:20.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:20.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:20.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:20.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:20.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:20.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:20.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:20.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:20.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:20.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:20.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:20.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:20.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:20.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:20.970 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:07:21.449 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:07:21.926 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:07:22.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:22.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:22.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:22.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:22.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:22.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:22.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:22.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:22.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:22.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:22.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:22.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:22.398 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:22.398 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1736 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:27.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:27.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:27.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:27.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:27.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:27.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:27.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:27.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:27.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:27.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:27.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:07:27.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:07:27.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:07:27.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:27.420 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:27.420 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:07:27.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:27.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:27.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:27.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:27.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:27.422 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:27.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:27.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:27.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.425 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:07:27.425 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:07:27.426 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:07:27.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:27.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:27.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:07:27.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:07:27.948 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:07:27.950 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:07:27.951 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:07:27.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:27.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:27.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:27.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:27.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:27.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:27.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:27.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:27.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:28.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:28.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:28.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:28.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:28.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:28.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:28.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:28.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:28.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:28.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:28.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:28.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:28.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:28.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:28.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:28.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:28.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:28.391 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:07:28.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:28.868 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:07:29.346 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:07:29.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:29.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:29.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:29.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:29.824 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:07:30.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:07:30.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:30.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:30.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:30.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:30.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:30.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:30.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:30.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:30.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:30.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:30.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:30.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:30.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:30.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:30.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:30.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:30.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:30.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:30.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:30.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:30.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:30.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:30.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:30.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:30.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:30.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:07:31.257 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:07:31.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:31.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:31.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:31.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:31.736 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:07:32.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:07:32.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:32.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:32.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:32.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:32.689 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:07:32.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:32.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:32.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:32.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:32.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:32.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:32.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:32.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:32.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:32.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:32.802 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:32.802 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:32.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:32.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:32.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:32.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:32.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:33.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:33.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:33.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:33.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:33.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:33.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:33.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:33.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:33.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:33.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:33.124 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:33.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:33.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:07:33.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:33.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:33.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:33.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:33.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:07:34.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:07:34.597 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:07:35.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:07:35.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:35.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:35.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:35.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:35.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:35.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:35.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:35.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:35.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:35.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:35.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:35.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:35.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:35.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:07:35.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:35.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:35.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:35.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:35.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:35.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:35.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:35.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:35.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:35.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:35.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:35.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:35.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:35.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:35.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:36.029 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:07:36.506 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:07:36.983 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:07:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:07:37.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:37.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:37.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:37.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:37.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:37.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:37.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:37.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:37.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:37.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:37.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:37.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:37.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:37.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:37.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:37.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:37.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:37.938 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:07:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:07:38.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:38.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:38.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:38.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:38.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:38.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:38.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:38.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:38.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:38.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:38.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:38.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:38.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:38.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:38.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:38.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:38.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:38.890 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:07:39.368 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:07:39.845 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:07:40.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:40.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:40.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:40.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:40.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:40.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:40.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:40.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:40.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:40.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:40.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:40.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:40.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:40.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.322 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:07:40.796 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:07:40.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:40.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:40.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:40.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:40.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:40.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:40.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:40.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:40.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:40.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:40.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:41.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:41.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:41.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:41.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:41.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:41.272 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:07:41.750 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:07:42.227 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:07:42.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:42.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:42.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:42.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:42.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:42.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:42.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:42.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:42.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:42.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:42.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:42.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:42.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:42.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:42.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:42.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:42.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:42.704 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:07:43.182 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:07:43.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:43.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:43.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:43.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:43.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:43.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:43.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:43.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:43.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:43.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:43.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:43.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:43.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:43.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:43.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:43.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:43.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:43.660 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:07:44.138 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:07:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:07:45.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:45.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:45.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:45.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:45.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:45.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:45.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:45.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:45.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:45.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:45.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:45.095 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:07:45.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:45.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.573 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:07:45.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:45.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:45.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:45.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:45.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:45.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:45.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:45.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:45.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:45.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:45.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:45.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:45.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:45.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:45.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:46.050 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:07:46.528 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:07:47.006 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:07:47.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:47.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:47.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:47.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:47.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:47.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:47.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:47.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:47.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:47.409 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:07:47.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:47.409 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4271 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:47.409 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4271 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:47.409 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4271 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:47.409 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4271 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:47.409 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4271 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:07:52.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:52.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:52.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:52.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:52.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:52.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:52.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:52.431 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:52.431 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:52.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:52.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:07:52.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:07:52.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:07:52.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:52.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:52.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:52.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:07:52.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:52.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:07:52.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:07:52.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:07:52.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:52.441 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:52.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:52.441 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:07:52.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:52.442 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:07:52.443 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:07:52.443 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:07:52.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:52.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:52.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:52.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:07:52.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:52.444 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.447 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:07:52.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:07:52.448 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:07:52.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:07:52.936 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:07:52.974 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:07:52.976 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:07:52.977 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:07:52.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.409 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:07:53.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:53.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:53.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:53.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:53.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:53.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:07:53.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:53.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:53.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:53.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:53.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:53.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:53.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:53.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:53.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:54.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:54.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:54.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:54.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:54.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:54.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:54.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:54.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:54.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:54.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:07:54.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:07:54.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:07:54.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:07:54.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:54.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:54.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:54.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:54.214 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:07:59.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:07:59.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:07:59.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:59.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:59.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:59.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:59.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:07:59.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:59.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:59.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:07:59.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:07:59.238 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:07:59.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:07:59.239 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:59.239 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:59.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:07:59.240 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:07:59.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:07:59.240 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:07:59.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:07:59.242 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:07:59.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:59.242 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:59.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:07:59.243 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:07:59.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:07:59.243 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:07:59.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:07:59.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:07:59.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:59.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:07:59.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:07:59.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:07:59.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:07:59.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:07:59.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:07:59.250 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:07:59.250 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:07:59.250 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:07:59.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:07:59.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:07:59.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:07:59.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:07:59.255 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:07:59.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:07:59.785 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:07:59.787 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:07:59.789 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:07:59.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:59.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:07:59.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:07:59.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:07:59.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:59.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:59.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:59.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:07:59.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:07:59.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:07:59.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:07:59.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:07:59.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:07:59.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:00.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:00.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:00.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:00.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:00.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:00.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:00.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:00.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:00.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:00.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:00.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:00.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:00.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:00.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:00.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:00.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:00.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:00.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:00.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:00.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:00.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:00.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:00.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:08:01.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:01.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:01.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:01.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:01.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:01.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:01.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:01.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:01.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:01.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:01.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:01.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:01.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:01.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:01.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:01.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:01.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:01.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:08:01.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:01.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:01.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:01.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:01.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:01.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:01.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:01.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:01.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:01.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:01.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:01.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:01.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:01.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:01.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.126 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:08:02.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:02.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:02.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:02.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:02.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:02.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:02.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:02.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:02.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:02.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:02.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:02.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:02.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:02.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:02.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:02.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:02.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:02.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:02.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:02.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:02.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:02.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:02.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:02.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:02.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:02.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:02.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:02.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:02.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:02.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:02.603 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:08:03.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:03.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:03.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:03.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:03.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:03.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:03.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:03.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:03.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:03.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:03.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:03.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:03.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:03.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.080 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:08:03.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:03.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:03.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:03.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:03.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:03.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:03.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:03.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:03.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:03.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:03.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:03.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:03.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:03.557 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:08:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:03.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:03.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:03.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:03.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:03.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:03.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:03.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:03.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:03.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:03.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:03.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:03.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:03.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:03.974 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:03.974 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:08.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:08.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:08.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:08.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:08.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:08.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:08.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:08.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:08.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:08.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:08.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:08.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:08.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:08.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:08.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:08.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:08.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:08.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:08.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:08.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:08.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:08.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:08.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:08.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:08.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:08.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:08.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:08.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:08.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:08.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:08.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:08.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:08.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:08.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:09.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:09.000 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:09.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:09.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:09.005 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:09.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:09.536 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:09.538 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:09.539 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:09.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:09.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:09.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:09.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:09.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:09.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:09.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:09.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:09.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:09.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:09.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:09.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:09.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:09.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:09.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:09.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:09.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:09.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:09.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:10.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:10.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:10.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:10.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:10.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:10.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:10.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:10.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:10.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:10.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:10.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:10.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:10.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:10.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:10.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:10.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:10.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:10.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:10.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:10.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:10.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:10.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:10.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:10.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:10.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:10.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:10.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:10.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:10.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:10.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:10.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:10.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:10.840 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:10.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:10.841 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:15.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:15.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:15.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:15.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:15.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:15.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:15.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:15.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:15.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:15.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:15.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:15.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:15.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:15.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:15.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:15.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:15.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:15.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:15.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:15.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:15.861 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:15.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:15.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:15.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:15.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:15.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:15.863 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:15.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:15.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:15.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:15.865 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:15.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:15.865 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:15.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:15.865 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:15.869 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:15.869 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:15.869 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:15.874 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:16.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:16.402 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:16.404 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:16.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:16.406 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:16.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:16.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:16.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:16.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:16.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:16.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:16.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:16.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:16.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:16.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:16.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:16.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:16.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:16.835 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:16.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:16.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:16.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:16.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:17.313 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:17.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:17.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:17.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:17.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:17.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:17.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:17.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:17.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:17.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:17.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:17.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:17.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:17.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:17.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:17.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:17.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:17.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:17.790 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:08:17.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:17.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:17.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:17.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:18.268 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:08:18.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:18.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:18.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:18.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:18.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:18.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:18.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:18.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:18.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:18.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:18.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:18.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:18.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:18.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:18.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:18.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:18.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:18.746 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:08:18.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:18.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:18.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:19.224 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:08:19.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:19.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:19.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:19.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:19.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:19.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:19.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:19.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:19.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:19.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:19.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:19.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:19.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:19.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:19.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:19.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:19.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:19.699 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:08:19.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:19.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:19.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:20.177 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:08:20.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:20.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:20.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:20.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:20.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:20.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:20.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:20.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:20.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:20.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:20.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:20.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:20.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:20.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:20.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:20.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:20.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:20.654 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:08:20.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:20.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:20.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:21.131 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:08:21.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:21.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:21.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:21.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:21.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:21.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:21.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:21.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:21.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:21.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:21.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:21.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:21.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:21.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:21.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:21.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:21.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:21.609 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:08:22.086 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:08:22.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:22.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:22.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:22.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:22.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:22.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:22.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:22.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:22.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:22.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:22.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:22.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:22.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:22.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:22.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:22.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:22.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:22.564 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:08:23.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:23.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:23.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:23.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:23.041 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:08:23.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:23.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:23.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:23.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:23.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:23.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:23.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:23.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:23.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:23.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:23.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:23.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:23.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:23.518 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:08:23.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:23.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:23.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:23.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:23.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:23.995 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:08:23.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:23.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:23.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:23.997 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:23.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.997 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:23.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:28.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:28.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:29.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:29.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:29.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:29.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:29.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:29.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:29.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:29.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:29.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:29.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:29.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:29.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:29.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:29.010 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:29.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:29.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:29.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:29.011 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:29.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:29.013 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:29.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:29.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:29.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:29.545 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:29.547 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:29.550 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:29.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:29.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:29.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:29.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:29.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:29.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:29.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:29.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:29.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:29.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:29.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:29.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:29.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:29.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:29.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:29.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:29.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:29.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:29.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:29.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:29.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:29.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:29.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:29.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:30.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:30.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:30.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:30.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:30.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:30.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:30.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:30.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:30.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:30.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:30.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:30.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:30.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:30.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:30.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:30.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:30.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:30.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:30.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:30.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:30.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:30.454 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:30.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:30.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:30.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:30.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:30.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:30.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:30.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:30.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:30.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:30.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:30.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:30.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:30.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:30.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:30.620 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:35.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:35.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:35.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:35.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:35.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:35.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:35.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:35.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:35.638 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:35.638 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:35.638 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:35.642 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:35.642 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:35.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:35.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:35.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:35.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:35.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:35.644 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:35.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:35.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:35.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:35.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:35.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:35.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:35.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:35.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:35.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:35.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:35.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:35.647 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:35.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:35.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:35.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:35.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:35.650 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:35.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:35.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:35.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:35.650 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:35.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:35.651 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:35.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:35.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:36.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:36.182 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:36.184 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:36.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.186 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:36.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:36.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:36.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:36.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:36.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:36.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:36.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:36.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:36.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:36.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:36.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:36.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:36.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:36.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:36.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:36.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:36.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:36.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:36.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:36.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:36.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:36.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:36.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:36.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:37.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:37.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:37.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:37.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:37.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:37.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:37.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:37.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:37.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:37.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:37.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:37.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:37.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:37.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:37.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:37.265 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.266 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:37.267 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:42.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:42.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:42.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:42.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:42.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:42.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:42.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:42.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:42.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:42.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:42.280 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:42.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:42.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:42.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:42.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:42.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:42.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:42.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:42.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:42.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:42.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:42.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:42.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:42.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:42.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:42.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:42.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:42.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:42.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:42.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:42.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:42.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:42.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:42.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:42.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:42.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:42.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:42.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:42.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:42.298 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:42.298 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:42.298 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:42.303 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:42.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:42.826 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:42.827 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:42.829 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:42.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:42.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:42.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:42.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:42.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:42.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:42.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:42.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:42.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:42.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:42.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:42.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:42.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:42.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:42.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:42.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:42.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:42.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:43.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:43.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:43.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:43.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:43.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:43.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.262 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:43.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:43.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:43.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:43.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:43.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:43.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:43.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:43.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:43.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:43.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:43.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:43.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:43.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:43.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:43.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:43.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:43.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:43.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:43.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:43.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:43.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:43.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:43.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:43.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:43.911 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:43.911 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.911 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.911 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.911 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:43.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:48.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:48.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:48.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:48.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:48.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:48.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:48.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:48.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:48.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:48.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:48.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:48.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:48.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:48.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:48.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:48.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:48.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:48.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:48.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:48.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:48.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:48.933 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:48.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:48.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:48.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:48.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:48.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:48.940 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:48.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:48.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:49.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:49.462 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:49.463 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:49.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.465 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:49.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:49.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:49.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:49.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:49.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:49.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:49.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:49.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:49.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:49.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:49.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:49.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:49.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:49.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:49.906 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:49.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:49.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:49.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:49.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:49.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:49.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:49.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:49.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:49.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:49.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:49.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:49.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:49.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:49.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:50.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:50.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:50.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:50.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:50.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:50.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:50.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:50.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:50.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:50.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:50.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:50.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:50.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.383 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:50.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:50.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:50.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:50.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:50.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:50.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:50.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:50.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:50.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:50.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:50.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:50.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:50.553 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:50.553 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:50.553 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:50.553 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:50.554 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:50.554 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:50.554 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:50.554 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:50.554 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:55.554 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:55.554 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:55.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:55.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:55.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:55.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:55.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:55.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:55.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:55.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:08:55.565 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:08:55.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:08:55.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:08:55.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:55.569 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:55.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:55.570 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:08:55.570 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:08:55.570 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:08:55.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:08:55.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:08:55.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:55.572 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:55.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:55.572 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:08:55.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:08:55.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:08:55.574 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:08:55.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:08:55.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:55.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:08:55.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:55.575 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:08:55.575 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:08:55.575 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:08:55.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:08:55.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:08:55.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:08:55.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:08:55.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:08:55.578 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:08:55.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:08:55.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:08:55.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:08:55.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:08:56.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:08:56.110 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:08:56.112 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:08:56.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:56.113 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:08:56.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:56.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:56.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:56.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:56.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:56.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:56.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:56.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:56.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:56.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:56.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:56.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:56.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:56.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:56.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:56.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:56.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:56.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:56.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:56.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:08:56.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:56.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:56.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:56.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:56.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:56.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:56.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:56.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:57.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:08:57.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:57.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:57.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:57.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:57.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:57.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:57.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:57.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:57.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:57.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:57.049 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:57.049 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:57.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:57.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:57.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:57.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:57.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:57.485 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:08:57.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:57.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:57.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:57.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:57.962 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:08:58.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:58.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:58.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:58.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:58.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:58.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:58.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:08:58.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:58.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:58.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:58.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:08:58.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:08:58.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:58.207 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:08:58.207 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:08:58.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:58.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:58.440 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:08:58.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:58.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:58.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:58.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:58.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:08:59.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:08:59.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:08:59.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:08:59.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:08:59.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:08:59.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:08:59.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:08:59.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:08:59.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:08:59.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:08:59.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:08:59.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:08:59.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:08:59.252 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:08:59.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:08:59.252 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:04.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:04.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:04.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:04.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:04.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:04.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:04.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:04.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:04.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:04.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:04.266 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:04.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:04.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:04.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:04.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:04.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:04.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:04.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:04.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:04.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:04.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:04.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:04.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:04.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:04.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:04.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:04.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:04.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:04.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:04.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:04.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:04.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:04.280 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:04.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:04.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:04.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:04.806 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:04.807 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:04.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:04.808 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:04.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:04.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:04.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:04.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:04.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:04.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:04.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:04.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:04.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:04.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:04.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:04.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:04.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:05.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:05.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:05.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:05.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:05.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:05.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:05.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:05.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:05.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:05.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:05.245 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:09:05.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:05.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:05.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:05.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:05.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:05.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:05.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:09:05.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:05.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:05.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:05.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:05.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:05.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:05.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:05.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:05.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:05.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:05.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:05.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:05.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:05.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:05.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:06.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:09:06.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:06.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:06.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:06.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:06.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:09:06.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:06.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:06.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:06.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:06.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:06.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:06.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:06.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:06.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:06.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:06.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:06.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:06.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:06.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:06.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:06.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:06.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:07.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:09:07.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:07.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:07.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:07.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:07.634 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:09:07.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:07.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:07.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:07.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:07.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:07.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:07.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:07.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:07.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:07.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:07.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:07.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:07.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:07.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:07.968 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:07.968 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:12.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:12.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:12.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:12.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:12.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:12.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:12.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:12.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:12.982 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:12.982 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:12.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:12.988 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:12.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:12.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:12.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:12.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:12.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:12.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:12.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:12.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:12.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:12.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:12.995 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:12.995 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:12.995 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:12.999 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:12.999 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:13.000 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:13.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:13.004 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:13.533 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:13.534 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:13.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:13.536 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:13.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:13.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:13.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:13.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:13.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:13.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:13.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:13.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:13.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:13.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:13.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:13.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:13.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:13.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:13.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:13.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:13.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:13.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:13.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:13.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:13.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:09:13.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:13.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:13.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:13.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:14.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:14.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:14.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:14.441 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:09:14.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:14.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:14.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:14.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:14.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:14.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:14.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:14.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:14.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:14.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:14.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:14.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:14.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:14.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:14.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:14.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:14.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:09:15.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:15.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:15.396 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:09:15.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:15.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:15.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:15.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:15.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:15.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:15.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:15.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:15.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:15.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:15.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:15.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:15.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:15.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:15.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:15.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:15.873 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:09:16.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:16.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:16.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:16.352 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:09:16.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:16.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:16.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:16.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:16.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:16.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:16.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:16.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:16.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:16.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:16.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:16.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:16.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:16.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:16.683 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:21.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:21.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:21.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:21.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:21.688 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:21.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:21.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:21.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:21.698 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:21.698 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:21.699 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:21.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:21.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:21.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:21.702 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:21.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:21.702 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:21.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:21.703 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:21.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:21.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:21.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:21.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:21.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:21.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:21.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:21.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:21.706 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:21.706 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:21.706 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:21.710 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:21.710 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:21.710 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:21.714 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:22.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:22.238 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:22.240 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:22.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:22.242 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:22.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:22.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:22.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:22.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:22.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:22.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:22.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:22.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:22.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:22.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:22.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:22.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:22.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:22.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:22.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:22.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:22.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:22.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:22.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:22.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:22.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:22.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:09:22.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:22.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:22.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:22.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:22.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:22.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:22.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:23.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:09:23.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:23.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:23.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:23.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:23.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:23.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:23.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:23.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:23.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:23.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:23.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:23.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:23.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:23.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:23.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:23.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:23.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:23.630 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:09:23.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:23.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:23.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:23.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:24.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:09:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:24.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:24.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:24.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:24.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:24.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:24.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:24.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:24.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:24.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:24.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:24.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:24.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:24.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:24.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:24.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:24.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:24.586 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:09:24.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:24.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:24.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:24.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:25.063 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:09:25.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:25.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:25.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:25.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:25.394 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:25.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:25.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:25.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:25.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:25.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:25.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:25.399 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:25.399 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.399 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.399 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.399 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:25.400 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:30.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:30.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:30.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:30.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:30.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:30.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:30.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:30.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:30.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:30.417 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:30.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:30.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:30.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:30.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:30.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:30.422 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:30.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:30.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:30.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:30.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:30.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:30.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:30.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:30.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:30.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:30.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:30.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:30.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:30.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:30.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:30.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:30.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:30.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:30.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:30.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:30.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:30.430 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:30.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:30.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:30.917 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:30.959 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:30.960 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:30.961 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:30.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:30.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:30.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:30.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:30.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:30.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:30.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:30.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:30.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:30.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:30.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:30.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:30.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:30.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:30.998 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:30.998 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:35.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:35.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:36.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:36.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:36.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:36.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:36.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:36.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:36.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:36.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:36.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:36.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:36.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:36.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:36.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:36.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:36.015 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:36.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:36.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:36.016 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:36.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:36.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:36.017 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:36.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:36.017 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:36.017 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:36.017 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:36.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:36.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:36.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:36.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:36.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:36.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:36.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:36.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:36.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:36.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:36.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:36.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:36.023 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:36.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:36.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:36.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:36.028 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:36.511 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:36.541 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:36.541 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:36.542 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:36.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:36.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:36.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:36.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:36.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:36.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:36.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:36.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:36.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:36.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:36.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:36.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:36.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:36.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:36.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:36.584 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:36.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:41.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:41.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:41.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:41.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:41.590 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:41.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:41.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:41.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:41.601 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:41.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:41.601 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:41.605 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:41.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:41.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:41.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:41.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:41.607 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:41.608 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:41.608 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:41.608 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:41.609 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:41.609 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:41.609 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:41.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:41.609 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:41.610 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:41.610 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:41.611 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:41.611 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:41.611 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:41.611 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:41.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:41.611 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:41.612 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:41.612 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:41.614 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:41.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:41.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:41.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:41.614 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:41.615 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:41.615 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:41.615 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:41.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:42.103 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:42.146 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:42.148 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:42.149 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:42.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:42.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:42.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:42.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:42.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:42.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:42.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:42.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:42.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:42.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:42.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:42.192 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:42.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.192 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:42.193 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:09:47.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:47.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:47.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:47.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:47.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:47.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:47.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:47.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:47.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:47.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:47.206 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:47.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:47.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:47.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:47.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:47.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:47.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:47.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:47.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:47.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:47.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:47.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:47.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:47.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:47.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:47.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:47.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:47.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:47.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:47.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:47.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:47.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:47.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:47.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:47.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:47.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:47.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:47.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:47.222 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:47.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:47.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:47.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:47.225 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:09:52.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:09:52.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:09:52.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:52.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:52.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:52.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:52.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:09:52.239 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:52.239 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:52.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:09:52.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:09:52.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:09:52.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:09:52.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:52.243 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:52.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:09:52.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:09:52.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:09:52.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:09:52.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:09:52.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:09:52.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:52.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:52.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:09:52.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:09:52.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:09:52.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:09:52.248 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:09:52.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:09:52.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:52.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:09:52.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:09:52.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:09:52.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:09:52.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:09:52.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:09:52.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:09:52.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:09:52.252 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:09:52.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:52.257 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:09:52.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:09:52.779 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:09:52.781 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:09:52.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:52.783 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:09:52.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:52.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:52.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:52.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:52.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:52.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:52.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:52.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:52.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:52.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:52.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:52.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:52.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:53.219 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:09:53.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:53.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:53.696 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:09:53.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:53.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:53.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:53.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:53.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:53.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:53.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:53.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:53.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:53.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:53.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:53.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:53.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:53.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:53.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:53.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:53.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:54.173 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:09:54.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:54.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:54.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:54.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:54.651 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:09:54.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:54.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:54.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:54.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:54.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:54.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:54.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:54.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:54.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:54.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:54.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:54.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:54.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:54.844 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:54.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:54.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:54.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:55.128 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:09:55.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:55.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:55.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:55.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:55.606 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:09:55.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:55.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:55.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:55.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:55.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:55.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:55.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:55.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:55.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:55.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:55.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:55.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:55.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:55.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:55.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:55.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:55.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:56.083 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:09:56.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:56.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:56.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:56.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:56.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:09:56.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:56.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:56.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:56.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:56.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:56.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:56.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:56.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:56.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:56.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:56.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:56.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:56.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:56.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:56.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:56.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:56.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.038 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:09:57.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:09:57.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:09:57.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:09:57.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:09:57.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:57.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:57.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:57.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:57.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:57.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:57.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:57.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:57.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:57.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:57.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:57.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:57.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:57.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.516 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:09:57.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:57.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:57.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:57.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:57.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:57.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:57.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:57.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:57.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:57.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:57.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:57.993 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:09:58.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:58.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:58.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:58.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:09:58.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:58.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:58.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:58.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:58.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:58.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:58.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:58.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:58.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:58.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:58.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:58.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:58.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:58.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:58.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:58.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:09:59.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:59.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:59.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:59.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:59.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:59.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:59.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:59.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:59.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:59.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:59.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:59.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:59.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:59.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.420 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:09:59.898 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:09:59.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:59.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:59.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:59.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:09:59.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:09:59.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:09:59.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:59.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:59.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:09:59.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:09:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:09:59.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:09:59.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:09:59.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:09:59.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:09:59.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:00.375 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:10:00.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:00.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:00.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:00.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:00.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:00.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:00.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:00.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:00.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:00.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:00.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:00.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:00.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:00.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:00.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:00.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:00.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:00.852 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:10:01.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:01.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:01.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:01.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:01.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:01.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:01.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:01.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:01.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:01.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:01.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:01.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:01.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:01.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.330 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:10:01.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:01.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:01.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:01.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:01.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:01.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:01.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:01.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:01.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:01.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:01.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:01.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:01.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:01.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:01.807 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:10:02.284 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:10:02.762 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:10:02.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:02.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:02.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:02.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:02.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:02.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:02.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:02.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:02.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:02.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:02.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:02.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:02.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:02.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:02.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:02.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:02.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:03.239 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:10:03.717 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:10:03.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:03.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:03.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:03.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:03.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:03.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:03.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:03.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:03.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:03.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:03.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:03.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:03.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:03.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:03.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:03.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:03.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:10:04.672 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:10:04.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:04.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:04.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:04.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:04.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:04.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:04.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:04.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:04.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:04.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:04.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:04.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:04.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:04.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:04.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:04.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:04.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:05.149 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:10:05.630 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:10:05.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:05.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:05.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:05.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:05.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:05.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:05.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:05.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:05.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:05.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:05.709 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:05.709 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:05.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:05.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:05.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:05.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:05.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:06.107 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:10:06.585 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:10:06.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:06.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:06.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:06.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:06.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:06.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:06.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:06.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:06.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:06.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:06.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:06.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:06.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:06.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:06.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:06.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:06.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:07.060 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:10:07.539 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:10:07.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:07.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:07.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:07.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:07.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:07.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:07.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:07.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:07.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:07.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:07.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:07.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:07.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:07.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:07.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:07.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:07.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:08.014 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:10:08.492 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:10:08.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:08.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:08.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:08.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:08.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:08.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:08.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:08.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:08.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:08.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:08.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:08.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:08.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:08.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:08.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:08.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:08.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:08.969 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:10:09.447 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:10:09.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:09.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:09.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:09.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:09.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:10:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:10:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:10:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:10:09.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:09.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:09.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:09.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:09.600 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:10:09.600 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.601 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:09.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:14.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:14.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:14.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:14.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:14.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:14.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:14.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:14.621 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:14.621 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:14.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:14.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:10:14.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:10:14.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:10:14.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:14.628 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:14.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:14.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:10:14.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:14.629 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:10:14.630 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:10:14.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:10:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:14.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:14.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:14.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:10:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:14.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:14.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:10:14.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:14.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:10:14.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:10:14.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:10:14.637 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:10:14.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:10:15.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:10:15.165 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:10:15.168 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:10:15.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.170 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:10:15.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:15.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:15.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:15.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:15.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:15.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:15.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:15.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:15.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:15.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:10:15.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:10:15.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:10:15.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:10:15.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:10:15.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:15.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:15.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:15.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:15.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:15.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:15.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:15.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:15.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:15.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:16.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:16.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:16.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:10:16.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:16.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:16.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:16.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:10:16.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:10:16.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:16.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:10:16.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:10:16.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:16.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:16.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:10:16.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:10:16.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:10:16.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:10:16.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:10:16.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:10:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:10:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:10:16.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:10:16.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:16.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:16.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:16.264 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:10:16.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:16.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:21.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:21.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:21.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:21.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:21.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:21.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:21.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:21.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:21.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:21.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:21.276 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:10:21.279 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:10:21.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:10:21.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:21.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:21.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:21.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:10:21.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:21.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:10:21.283 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:10:21.284 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:10:21.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:21.284 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:21.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:21.284 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:10:21.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:21.284 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:10:21.286 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:10:21.286 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:10:21.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:21.286 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:21.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:21.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:10:21.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:21.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:10:21.289 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:10:21.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:10:21.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:10:21.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:10:21.289 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:10:21.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:10:21.290 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:10:21.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:10:21.774 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:10:22.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:10:22.720 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:10:23.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:10:23.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:10:24.150 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:10:24.631 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:10:25.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:10:25.592 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:10:26.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:10:26.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:10:27.026 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:10:27.504 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:10:27.982 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:10:28.461 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:10:28.942 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:10:29.424 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:10:29.906 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:10:30.386 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:10:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:10:31.342 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:10:31.820 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:10:32.302 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:10:32.782 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:10:33.260 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:10:33.740 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:10:34.211 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:10:34.682 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:10:35.158 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:10:35.635 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:10:36.108 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:10:36.577 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:10:37.046 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:10:37.515 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:10:37.994 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:10:38.474 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:10:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:10:39.418 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:10:39.896 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:10:40.365 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:10:40.837 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:10:41.316 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:10:41.797 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:10:42.278 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:10:42.755 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:10:43.234 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:10:43.712 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:10:44.190 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:10:44.670 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:10:45.150 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:10:45.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:45.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:45.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:45.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:45.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:45.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:45.320 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:10:45.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.321 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.321 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.321 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:45.321 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5138 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:10:50.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:10:50.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:10:50.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:50.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:50.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:50.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:50.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:10:50.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:50.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:50.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:10:50.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:10:50.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:10:50.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:10:50.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:50.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:50.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:10:50.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:10:50.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:10:50.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:10:50.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:10:50.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:10:50.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:50.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:50.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:10:50.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:10:50.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:10:50.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:10:50.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:10:50.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:10:50.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:50.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:10:50.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:10:50.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:10:50.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:10:50.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:10:50.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:10:50.350 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:10:50.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:10:50.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:10:50.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:10:51.310 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:10:51.788 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:10:52.262 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:10:52.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:10:53.205 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:10:53.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:10:54.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:10:54.632 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:10:55.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:10:55.587 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:10:56.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:10:56.550 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:10:57.031 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:10:57.512 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:10:57.994 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:10:58.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:10:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:10:59.429 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:10:59.907 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:11:00.385 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:11:00.862 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:11:01.333 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:11:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:11:02.281 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:11:02.753 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:11:03.226 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:11:03.705 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:11:04.184 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:11:04.665 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:11:05.147 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:11:05.627 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:11:06.107 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:11:06.585 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:11:07.063 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:11:07.542 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:11:08.020 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:11:08.496 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:11:08.965 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:11:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:11:09.913 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:11:10.390 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:11:10.869 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:11:11.346 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:11:11.824 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:11:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:11:12.780 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:11:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:11:13.736 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:11:14.214 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:11:14.693 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:11:15.173 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:11:15.651 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:11:16.129 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:11:16.607 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:11:17.084 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:11:17.562 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:11:18.041 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:11:18.518 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:11:18.996 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:11:19.474 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:11:19.953 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:11:20.432 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:11:20.913 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:11:21.394 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:11:21.872 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:11:22.350 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:11:22.828 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:11:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:11:23.779 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:11:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:11:24.735 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:11:25.213 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:11:25.691 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:11:26.164 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:11:26.634 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:11:27.112 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:11:27.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:27.590 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:11:28.068 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:11:28.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:28.548 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:11:29.027 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:11:29.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:29.508 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:11:29.984 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:11:30.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:30.462 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:11:30.942 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:11:31.423 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:11:31.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:31.904 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:11:32.386 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:11:32.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:32.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:32.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:32.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:11:32.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:11:32.409 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:11:37.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:11:37.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:11:37.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:37.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:37.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:37.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:37.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:37.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:11:37.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:37.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:11:37.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:11:37.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:11:37.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:11:37.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:11:37.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:37.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:37.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:11:37.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:11:37.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:11:37.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:11:37.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:11:37.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:11:37.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:37.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:37.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:11:37.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:11:37.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:11:37.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:11:37.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:11:37.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:11:37.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:37.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:37.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:11:37.433 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:11:37.433 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:11:37.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:11:37.436 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:11:37.436 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:11:37.436 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:37.441 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:11:37.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:11:37.963 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:11:37.965 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:37.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:37.968 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:11:37.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:37.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:38.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:11:38.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:38.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:38.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:38.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:11:38.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:11:38.018 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:38.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:38.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:38.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:38.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:38.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:38.401 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:11:38.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:38.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:38.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:38.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:38.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:11:39.356 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:11:39.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:39.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:39.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:39.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:39.834 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:11:40.311 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:11:40.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:40.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:40.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:40.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:40.789 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:11:41.267 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:11:41.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:41.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:41.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:41.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:41.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:11:41.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:41.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:41.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:41.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:41.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:41.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:41.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:11:41.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:41.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:41.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:41.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:11:41.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:11:41.885 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:41.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:41.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:41.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:41.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:42.220 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:11:42.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:42.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:42.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:42.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:11:43.176 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:11:43.655 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:11:44.133 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:11:44.611 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:11:45.089 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:11:45.568 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:11:45.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:45.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:45.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:45.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:45.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:45.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:45.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:11:45.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:45.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:45.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:45.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:11:45.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:11:45.984 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:45.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:45.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:45.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:45.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:45.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:46.044 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:11:46.522 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:11:46.999 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:11:47.477 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:11:47.955 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:11:48.433 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:11:48.910 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:11:49.388 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:11:49.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:49.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:49.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:49.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:49.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:49.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:49.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:11:49.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:49.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:49.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:49.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:11:49.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:11:49.855 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:49.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:49.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:49.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:49.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:49.865 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:11:50.343 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:11:50.821 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:11:51.299 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:11:51.778 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:11:52.255 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:11:52.733 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:11:53.210 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:11:53.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:53.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:53.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:53.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:53.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:11:53.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:11:53.614 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:11:53.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:53.615 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:11:58.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:11:58.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:11:58.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:58.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:58.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:58.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:58.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:11:58.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:11:58.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:58.630 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:11:58.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:11:58.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:11:58.633 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:11:58.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:11:58.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:58.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:11:58.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:11:58.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:11:58.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:11:58.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:11:58.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:11:58.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:11:58.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:58.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:11:58.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:11:58.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:11:58.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:11:58.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:11:58.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:11:58.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:11:58.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:11:58.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:11:58.640 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:11:58.640 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:11:58.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:11:58.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:11:58.643 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:11:58.644 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:11:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:11:59.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:11:59.170 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:11:59.170 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:59.171 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:11:59.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:59.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:11:59.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:11:59.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:11:59.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:59.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:59.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:59.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:11:59.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:11:59.225 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:11:59.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:11:59.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:11:59.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:11:59.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:59.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:11:59.609 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:11:59.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:11:59.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:11:59.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:11:59.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:00.087 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:12:00.104 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:00.565 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:12:00.590 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:00.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:00.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:00.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:00.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:01.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:12:01.077 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:01.521 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:12:01.564 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:01.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:01.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:01.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:01.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:01.998 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:12:02.051 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:02.476 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:12:02.538 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:02.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:02.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:02.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:02.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:02.954 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:12:03.025 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:03.431 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:12:03.511 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:03.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:03.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:03.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:03.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:12:03.998 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:04.386 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:12:04.485 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:04.865 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:12:04.973 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:05.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:12:05.460 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:05.821 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:12:05.947 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:06.298 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:12:06.434 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:06.776 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:12:06.921 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:07.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:12:07.408 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:07.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:07.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:07.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:07.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:07.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:07.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:07.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:07.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:07.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:07.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:07.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:07.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:07.434 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:07.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:07.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:07.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:07.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:07.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:07.730 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:12:08.134 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:08.207 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:12:08.620 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:08.684 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:12:09.107 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:09.162 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:12:09.594 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:09.640 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:12:10.081 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:12:10.569 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:12:11.056 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:11.074 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:12:11.543 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:11.552 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:12:12.030 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:12.031 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:12:12.508 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:12:12.525 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:12.986 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:12:13.012 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:13.464 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:12:13.499 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:13.942 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:12:13.986 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:14.420 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:12:14.473 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:14.898 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:12:14.960 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:15.376 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:12:15.447 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:15.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:15.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:15.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:15.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:15.456 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=3589 tn=1 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:15.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:15.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:15.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:15.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:15.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:15.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:15.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:15.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:15.516 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:15.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:15.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:15.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:15.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:15.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:15.812 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:15.853 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:12:16.288 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:16.330 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:12:16.766 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:16.808 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:12:17.244 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:17.285 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:12:17.721 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:17.763 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:12:18.199 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:18.241 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:12:18.677 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:18.718 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:12:19.154 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:19.196 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:12:19.632 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:19.674 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:12:20.109 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:20.151 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:12:20.587 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:20.629 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:12:21.065 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:21.106 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:12:21.542 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:21.584 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:12:22.020 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:22.062 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:12:22.497 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:12:22.975 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:22.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:22.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:22.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:22.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:22.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:22.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:22.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:22.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:22.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:22.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:22.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:22.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:23.008 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:23.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:23.017 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:12:23.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:23.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:23.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:23.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:23.407 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:23.493 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:12:23.884 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:23.971 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:12:24.361 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:24.448 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:12:24.839 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:24.927 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:12:25.317 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:25.406 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:12:25.796 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:25.883 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:12:26.273 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:26.362 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:12:26.752 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:26.839 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:12:27.229 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:27.316 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:12:27.707 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:27.794 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:12:28.184 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:28.272 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:12:28.663 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:28.750 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:12:29.140 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:29.227 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:12:29.618 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:29.706 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:12:30.096 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:30.183 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:12:30.573 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:30.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:30.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:30.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:30.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:30.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:30.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:30.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:30.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:30.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:30.582 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:30.582 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:30.582 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:12:35.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:35.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:35.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:35.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:35.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:35.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:35.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:35.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:35.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:35.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:35.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:12:35.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:12:35.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:12:35.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:35.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:35.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:35.599 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:12:35.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:35.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:12:35.602 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:12:35.602 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:12:35.602 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:35.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:35.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:35.603 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:12:35.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:35.603 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:12:35.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:12:35.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:12:35.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:35.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:35.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:35.606 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:12:35.606 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:35.606 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:12:35.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:12:35.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:12:35.610 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:12:35.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:12:36.098 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:12:36.135 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:12:36.136 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:36.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:36.137 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:12:36.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:36.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:36.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:36.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:36.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:36.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:36.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:36.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:36.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:36.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:36.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:36.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:36.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:36.576 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:12:36.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:36.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:36.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:36.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:37.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:12:37.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:12:37.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:37.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:37.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:37.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:38.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:12:38.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:38.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:38.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:38.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:38.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:38.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:38.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:38.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:38.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:38.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:38.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:38.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:38.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:38.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:38.335 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:38.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:38.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:38.484 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:12:38.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:38.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:38.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:38.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:38.963 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:12:39.441 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:12:39.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:39.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:39.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:39.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:39.918 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:12:40.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:12:40.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:40.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:40.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:40.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:40.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:40.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:40.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:40.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:40.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:40.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:40.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:40.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:40.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:40.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:40.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:40.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:40.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:40.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:40.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:40.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:40.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:40.873 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:12:41.351 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:12:41.828 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:12:42.306 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:12:42.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:42.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:42.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:42.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:42.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:42.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:42.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:42.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:42.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:42.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:42.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:42.601 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:12:42.602 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:47.599 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:47.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:47.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:47.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:47.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:47.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:47.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:47.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:47.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:12:47.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:12:47.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:12:47.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:47.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:47.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:47.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:12:47.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:47.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:12:47.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:12:47.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:12:47.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:47.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:47.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:47.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:12:47.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:47.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:12:47.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:12:47.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:12:47.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:47.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:47.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:47.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:12:47.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:47.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:12:47.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:12:47.633 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:12:47.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:47.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:12:48.122 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:12:48.169 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:12:48.172 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:48.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:48.174 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:12:48.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:48.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:48.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:48.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:48.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:48.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:48.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:48.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:48.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:48.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:48.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:48.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:48.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:48.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:12:48.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:48.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:48.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:48.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:49.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:12:49.554 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:12:49.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:49.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:50.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:12:50.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:50.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:50.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:50.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:50.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:50.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:50.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:50.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:50.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:50.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:50.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:50.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:50.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:50.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:50.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:50.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:50.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:50.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:12:50.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:50.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:50.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:50.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:50.987 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:12:51.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:12:51.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:51.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:51.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:51.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:51.943 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:12:52.421 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:12:52.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:52.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:52.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:52.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:52.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:52.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:52.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:52.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:52.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:52.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:52.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:52.477 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:52.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1034 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:12:57.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:12:57.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:12:57.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:57.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:57.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:57.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:57.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:12:57.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:57.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:57.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:12:57.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:12:57.493 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:12:57.494 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:12:57.494 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:57.494 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:57.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:12:57.495 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:12:57.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:12:57.495 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:12:57.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:12:57.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:12:57.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:57.496 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:57.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:12:57.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:12:57.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:12:57.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:12:57.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:12:57.499 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:12:57.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:57.499 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:12:57.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:12:57.499 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:12:57.499 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:12:57.499 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:12:57.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:12:57.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:12:57.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:12:57.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:12:57.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:12:57.502 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:12:57.502 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:12:57.502 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:12:57.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:12:57.507 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:12:57.991 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:12:58.036 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:12:58.038 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:12:58.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:58.040 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:12:58.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:12:58.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:12:58.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:12:58.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:58.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:58.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:58.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:12:58.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:12:58.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:12:58.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:12:58.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:12:58.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:58.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:12:58.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:12:58.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:58.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:58.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:58.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:58.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:12:59.423 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:12:59.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:12:59.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:12:59.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:12:59.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:12:59.901 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:13:00.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:00.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:00.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:00.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:00.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:00.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:00.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:00.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:00.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:00.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:00.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:00.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:00.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:00.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:00.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:00.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:00.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:00.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:13:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:00.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:00.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:00.856 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:13:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:13:01.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:01.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:01.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:01.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:01.812 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:13:02.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:13:02.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:02.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:02.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:02.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:02.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:02.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:02.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:02.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:02.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:02.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:02.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:02.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:02.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:02.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:02.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:02.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:02.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:02.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:02.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:02.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:02.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:02.766 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:13:03.244 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:13:03.722 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:13:04.200 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:13:04.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:04.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:04.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:04.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:04.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:04.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:04.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:04.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:04.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:04.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:04.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:04.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:04.498 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:04.498 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:09.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:09.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:09.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:09.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:09.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:09.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:09.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:09.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:09.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:09.513 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:09.513 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:09.514 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:09.514 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:09.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:09.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:09.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:09.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:09.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:09.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:09.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:09.518 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:09.518 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:09.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:09.518 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:09.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:09.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:09.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:09.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:09.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:09.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:09.522 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:09.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:09.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:10.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:10.050 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:10.052 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:10.054 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:10.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:10.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:10.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:10.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:10.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:10.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:10.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:10.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:10.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:10.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:10.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:10.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:10.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:10.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:10.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:10.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:10.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:10.967 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:11.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:13:11.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:11.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:11.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:13:12.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:12.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:12.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:12.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:12.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:12.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:12.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:12.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:12.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:12.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:12.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:12.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:12.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:12.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:12.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:12.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:12.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:12.400 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:13:12.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:12.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:12.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:12.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:12.879 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:13:13.357 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:13:13.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:13.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:13.835 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:13:14.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:13:14.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:14.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:14.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:14.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:14.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:14.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:14.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:14.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:14.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:14.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:14.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:14.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:14.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:14.450 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:14.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:14.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.451 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.452 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.452 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.452 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.452 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:14.452 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:19.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:19.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:19.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:19.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:19.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:19.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:19.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:19.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:19.461 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:19.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:19.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:19.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:19.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:19.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:19.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:19.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:19.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:19.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:19.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:19.466 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:19.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:19.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:19.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:19.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:19.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:19.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:19.472 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:19.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:19.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:19.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:19.991 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:19.992 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:19.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:19.993 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:20.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:20.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:20.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:20.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:20.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:20.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:20.011 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:20.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:20.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:20.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:20.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:20.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:20.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:20.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:20.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:20.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:20.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:20.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:20.913 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:21.391 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:13:21.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:21.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:21.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:21.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:21.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:13:22.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:22.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:22.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:22.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:22.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:22.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:22.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:22.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:22.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:22.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:22.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:22.263 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.264 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.265 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.265 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.265 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.265 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:22.265 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:27.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:27.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:27.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:27.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:27.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:27.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:27.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:27.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:27.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:27.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:27.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:27.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:27.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:27.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:27.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:27.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:27.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:27.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:27.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:27.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:27.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:27.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:27.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:27.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:27.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:27.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:27.285 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:27.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:27.285 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:27.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:27.286 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:27.286 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:27.286 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:27.290 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:27.290 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:27.290 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:27.295 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:27.779 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:27.826 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:27.828 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:27.830 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:27.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:27.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:27.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:27.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:27.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:27.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:27.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:27.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:27.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:27.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:27.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:27.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:27.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:28.256 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:28.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:28.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:28.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:28.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:29.212 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:13:29.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:29.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:29.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:29.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:29.690 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:13:30.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:30.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:30.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:30.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:30.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:30.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:30.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:30.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:30.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:30.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:30.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:30.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:30.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:30.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:30.098 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:30.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:35.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:35.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:35.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:35.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:35.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:35.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:35.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:35.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:35.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:35.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:35.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:35.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:35.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:35.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:35.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:35.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:35.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:35.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:35.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:35.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:35.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:35.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:35.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:35.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:35.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:35.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:35.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:35.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:35.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:35.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:35.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:35.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:35.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:35.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:35.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:35.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:35.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:35.122 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:35.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:35.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:35.650 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:35.652 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:35.655 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:35.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:35.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:35.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:35.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:35.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:35.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:35.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:35.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:35.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:35.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:35.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:35.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:35.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:35.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:36.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:36.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:36.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:36.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:36.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:36.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:36.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:36.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:36.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:36.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:36.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:36.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:36.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:36.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:36.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:36.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:36.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:36.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:36.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:36.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:36.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:36.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:36.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:36.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:36.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:36.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:36.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:36.565 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:41.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:41.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:41.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:41.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:41.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:41.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:41.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:41.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:41.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:41.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:41.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:41.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:41.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:41.587 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:41.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:41.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:41.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:41.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:41.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:41.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:41.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:41.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:41.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:41.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:41.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:41.594 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:41.594 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:41.594 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:41.599 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:42.083 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:42.118 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:42.121 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:42.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:42.123 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:42.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:42.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:42.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:42.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:42.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:42.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:42.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:42.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:42.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:42.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:42.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:42.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:42.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:42.560 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:42.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:42.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:42.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:42.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:42.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:42.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:42.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:42.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:42.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:42.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:42.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:42.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:42.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:42.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:42.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:42.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:43.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:43.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:43.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:43.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:43.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:43.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:43.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:43.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:43.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:43.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:43.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:43.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:43.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:43.026 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:43.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:43.027 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:48.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:48.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:48.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:48.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:48.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:48.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:48.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:48.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:48.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:48.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:48.040 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:48.043 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:48.043 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:48.043 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:48.044 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:48.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:48.044 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:48.045 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:48.045 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:48.046 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:48.046 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:48.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:48.047 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:48.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:48.047 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:48.047 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:48.047 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:48.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:48.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:48.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:48.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:48.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:48.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:48.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:48.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:48.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:48.052 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:48.057 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:48.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:48.581 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:48.583 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:48.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:48.586 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:48.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:48.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:48.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:48.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:48.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:48.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:48.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:48.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:48.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:48.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:48.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:48.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:48.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.017 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:49.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:49.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:49.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:49.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:49.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:49.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:49.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:49.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:49.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:49.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:49.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:49.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:49.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:49.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:49.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:49.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:49.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:49.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:49.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:49.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:49.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:49.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:49.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:49.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:49.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:49.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:49.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:49.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:49.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:49.551 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:49.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:49.551 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:49.552 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:54.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:54.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:54.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:54.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:54.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:54.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:54.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:54.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:54.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:54.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:13:54.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:13:54.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:13:54.564 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:13:54.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:54.565 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:54.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:54.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:13:54.566 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:13:54.566 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:13:54.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:13:54.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:13:54.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:54.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:54.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:54.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:13:54.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:54.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:13:54.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:13:54.568 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:13:54.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:13:54.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:13:54.570 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:13:54.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:13:54.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:13:55.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:13:55.099 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:13:55.100 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:13:55.102 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:13:55.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:55.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:55.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:55.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:13:55.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:55.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:55.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:55.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:13:55.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:13:55.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:13:55.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:13:55.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:13:55.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:55.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:13:55.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:13:55.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:55.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:55.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:55.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:56.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:13:56.491 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:13:56.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:56.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:56.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:56.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:56.969 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:13:57.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:13:57.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:57.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:57.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:57.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:57.925 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:13:58.404 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:13:58.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:58.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:58.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:58.882 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:13:59.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:13:59.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:13:59.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:13:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:13:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:13:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:13:59.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:13:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:13:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:13:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:13:59.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:13:59.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:13:59.212 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:13:59.212 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:04.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:04.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:04.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:04.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:04.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:04.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:04.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:04.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:04.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:04.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:04.227 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:04.230 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:04.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:04.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:04.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:04.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:04.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:04.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:04.232 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:04.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:04.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:04.233 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:04.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:04.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:04.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:04.235 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:04.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:04.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:04.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:04.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:04.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:04.239 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:04.239 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:04.239 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:04.244 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:04.726 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:04.754 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:04.755 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:04.755 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:04.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:04.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:04.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:04.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:04.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:04.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:04.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:04.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:04.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:04.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:04.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:04.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:04.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:04.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:05.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:05.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:05.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:05.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:05.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:05.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:05.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:05.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:05.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:05.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:05.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:05.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.201 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:05.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:05.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:05.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:05.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:05.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:05.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:05.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:05.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:05.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:05.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:05.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:05.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:05.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:05.320 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:05.320 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=232 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:10.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:10.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:10.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:10.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:10.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:10.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:10.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:10.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:10.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:10.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:10.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:10.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:10.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:10.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:10.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:10.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:10.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:10.338 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:10.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:10.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:10.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:10.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:10.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:10.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:10.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:10.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:10.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:10.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:10.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.345 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:10.345 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:10.345 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:10.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:10.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:10.350 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:10.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:10.873 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:10.875 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:10.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:10.876 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:10.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:10.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:10.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:10.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:10.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:10.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:10.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:10.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:10.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:10.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:10.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:10.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:10.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:11.310 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:11.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:11.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:11.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:11.788 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:14:12.266 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:14:12.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:12.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:12.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:12.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:12.744 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:14:13.221 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:14:13.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:13.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:13.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:13.699 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:14:14.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:14:14.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:14.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:14.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:14.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:14.655 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:14:14.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:14.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:14.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:14.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:14.987 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:19.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:19.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:19.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:19.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:19.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:20.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:20.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:20.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:20.006 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:20.006 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:20.013 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:20.013 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:20.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:20.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:20.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:20.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:20.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:20.014 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:20.017 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:20.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:20.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:20.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:20.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:20.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:20.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:20.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:20.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:20.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:20.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:20.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:20.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:20.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:20.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:20.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:20.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:20.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:20.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:20.027 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:20.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:20.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:20.515 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:20.554 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:20.555 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:20.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:20.555 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:20.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:20.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:20.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:20.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:20.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:20.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:20.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:20.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:20.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:20.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:20.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:20.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:20.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:20.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:21.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:21.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:21.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:21.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:21.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:21.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:21.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:21.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:21.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:21.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:21.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:21.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:21.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:21.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:21.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:21.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:21.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:21.400 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:21.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:21.401 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:26.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:26.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:26.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:26.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:26.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:26.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:26.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:26.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:26.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:26.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:26.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:26.416 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:26.416 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:26.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:26.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:26.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:26.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:26.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:26.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:26.419 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:26.419 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:26.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:26.419 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:26.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:26.420 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:26.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:26.420 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:26.421 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:26.421 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:26.421 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:26.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:26.424 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:26.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:26.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:26.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:26.960 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:26.963 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:26.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:26.965 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:26.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:26.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:26.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:27.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:27.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:27.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:27.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:27.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:27.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:27.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:27.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:27.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:27.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:27.388 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:27.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:27.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:27.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:27.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:27.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:27.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:27.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:27.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:27.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:27.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:27.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:27.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:27.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:27.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:27.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:27.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:27.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:27.790 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:27.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.791 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:27.792 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:32.790 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:32.790 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:32.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:32.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:32.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:32.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:32.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:32.799 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:32.800 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:32.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:32.800 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:32.803 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:32.803 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:32.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:32.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:32.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:32.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:32.805 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:32.805 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:32.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:32.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:32.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:32.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:32.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:32.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:32.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:32.807 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:32.809 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:32.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:32.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:32.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:32.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:32.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:32.810 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:32.810 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:32.812 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:32.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:32.813 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:32.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:32.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:33.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:33.339 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:33.340 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:33.342 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:33.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:33.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:33.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:33.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:33.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:33.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:33.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:33.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:33.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:33.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:33.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:33.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:33.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:33.772 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:33.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:33.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:33.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:33.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:34.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:34.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:34.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:34.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:34.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:34.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:34.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:34.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:34.179 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:34.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:34.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:34.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:34.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:34.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:34.179 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:34.180 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:39.179 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:39.179 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:39.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:39.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:39.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:39.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:39.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:39.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:39.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:39.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:39.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:39.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:39.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:39.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:39.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:39.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:39.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:39.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:39.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:39.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:39.197 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:39.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:39.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:39.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:39.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:39.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:39.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:39.199 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:39.199 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:39.199 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:39.202 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:39.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:39.202 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.203 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:39.203 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:39.203 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:39.203 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:39.208 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:39.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:39.737 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:39.739 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:39.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:39.743 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:39.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:39.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:39.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:39.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:39.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:39.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:39.810 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:39.810 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:39.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:39.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:39.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:39.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:39.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:40.167 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:40.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:40.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:40.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:40.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:14:40.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:40.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:40.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:40.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:40.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:40.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:40.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:40.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:40.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:40.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:40.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:40.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:40.737 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:40.737 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:45.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:45.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:45.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:45.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:45.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:45.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:45.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:45.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:45.743 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:45.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:45.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:45.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:45.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:45.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:45.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:45.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:45.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:45.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:45.747 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:45.747 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:45.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:45.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:45.748 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:45.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:45.748 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:45.748 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:45.748 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:45.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:45.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:45.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:45.752 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.753 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:45.753 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:45.753 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:45.753 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:45.758 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:46.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:46.288 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:46.290 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:46.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:46.293 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:46.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:46.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:46.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:46.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:46.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:46.364 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:46.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:46.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:46.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:46.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:46.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:46.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:46.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:46.720 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:46.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:46.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:46.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:46.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:47.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:47.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:47.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:47.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:47.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:47.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:47.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:47.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:47.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:47.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:47.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:47.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:47.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:47.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:47.129 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:47.130 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:14:52.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:52.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:52.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:52.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:52.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:52.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:52.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:52.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:52.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:52.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:52.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:52.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:52.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:52.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:52.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:52.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:52.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:52.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:52.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:52.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:52.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:52.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:52.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:52.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:52.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:52.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:52.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:52.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:52.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:52.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:52.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:52.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:52.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:52.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:52.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:52.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:52.152 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:52.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:52.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:52.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:52.682 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:52.683 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:52.685 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:52.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:52.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:52.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:52.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:52.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:52.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:52.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:52.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:52.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:52.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:52.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:52.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:52.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:52.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:53.118 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:53.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:53.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:53.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:53.595 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:14:53.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:53.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:53.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:53.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:53.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:53.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:53.663 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:14:58.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:14:58.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:14:58.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:58.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:58.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:58.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:58.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:14:58.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:58.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:58.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:14:58.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:14:58.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:14:58.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:14:58.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:58.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:58.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:14:58.683 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:14:58.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:14:58.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:14:58.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:14:58.686 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:14:58.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:58.686 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:58.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:14:58.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:14:58.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:14:58.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:14:58.688 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:14:58.688 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:14:58.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:58.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:14:58.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:14:58.689 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:14:58.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:14:58.689 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:14:58.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:14:58.693 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:14:58.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:14:58.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:14:59.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:14:59.221 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:14:59.222 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:14:59.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:14:59.224 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:14:59.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:14:59.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:14:59.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:14:59.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:14:59.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:14:59.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:14:59.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:14:59.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:14:59.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:14:59.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:14:59.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:14:59.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:14:59.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:00.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:15:00.615 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:15:00.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:00.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:00.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:00.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:01.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:15:01.571 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:15:01.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:01.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:01.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:01.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:02.049 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:15:02.527 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:15:02.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:02.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:02.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:02.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:03.005 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:15:03.484 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:15:03.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:03.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:03.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:03.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:03.961 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:15:04.439 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:15:04.917 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:15:05.395 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:15:05.872 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:15:06.350 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:15:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:15:07.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:07.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:07.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:07.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:07.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:07.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:07.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:07.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:07.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:07.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:07.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:07.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:07.282 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:15:07.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:07.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:07.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:07.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:07.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:07.283 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:12.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:12.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:12.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:12.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:12.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:12.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:12.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:12.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:12.293 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:12.293 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:12.293 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:15:12.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:15:12.299 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:15:12.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:12.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:12.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:12.299 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:15:12.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:12.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:15:12.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:15:12.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:15:12.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:12.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:12.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:12.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:15:12.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:12.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:12.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:15:12.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:12.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:15:12.311 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:15:12.311 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:15:12.311 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:12.316 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:15:12.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:15:12.836 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:15:12.837 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:15:12.838 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:15:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:15:12.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:12.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:12.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:15:13.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:15:13.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:13.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:13.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:13.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:13.755 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:15:14.234 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:15:14.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:14.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:14.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:14.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:14.712 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:15:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:15:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:15.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:15.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:15.650 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:15:16.131 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:15:16.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:16.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:16.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:16.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:16.610 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:15:17.090 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:15:17.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:17.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:17.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:17.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:17.569 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:15:18.046 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:15:18.526 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:15:18.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:18.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:18.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:18.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:15:18.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:15:19.006 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:15:19.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:15:19.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:19.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:19.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:19.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:19.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:15:19.955 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:15:20.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:15:20.910 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:15:21.387 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:15:21.866 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:15:22.344 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:15:22.823 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:15:23.301 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:15:23.779 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:15:24.257 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:15:24.736 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:15:25.214 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:15:25.692 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:15:26.170 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:15:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:15:27.112 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:15:27.583 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:15:28.057 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:15:28.536 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:15:29.015 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:15:29.493 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:15:29.971 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:15:30.450 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:15:30.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:15:30.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:30.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:30.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:30.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:30.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:30.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:30.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:30.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:30.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:30.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:30.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:30.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:30.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:30.750 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:15:30.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3942 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.752 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.752 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:30.752 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3943 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:35.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:35.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:35.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:35.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:35.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:35.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:35.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:35.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:35.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:35.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:35.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:15:35.775 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:15:35.775 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:15:35.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:35.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:35.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:35.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:15:35.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:35.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:15:35.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:15:35.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:15:35.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:35.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:35.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:35.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:15:35.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:35.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:15:35.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:15:35.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:15:35.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:35.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:35.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:35.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:15:35.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:35.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:15:35.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:15:35.783 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:15:35.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:35.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:15:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:15:36.312 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:15:36.314 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:15:36.315 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:15:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:15:36.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:36.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:36.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:15:36.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:15:36.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:36.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:36.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:36.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:37.211 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:15:37.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:15:37.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:37.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:37.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:37.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:38.170 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:15:38.640 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:15:38.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:38.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:38.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:38.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:39.108 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:15:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:15:39.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:39.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:39.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:39.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:40.062 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:15:40.544 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:15:40.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:40.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:40.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:40.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:41.022 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:15:41.500 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:15:41.980 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:15:42.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:42.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:42.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:42.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:15:42.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:15:42.449 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:15:42.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:15:42.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:42.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:42.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:42.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:42.918 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:15:43.389 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:15:43.867 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:15:44.346 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:15:44.824 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:15:45.296 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:15:45.772 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:15:46.250 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:15:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:15:47.207 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:15:47.685 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:15:47.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:15:47.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:47.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:47.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:47.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:47.857 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:15:47.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:47.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2589 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:15:52.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:15:52.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:15:52.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:52.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:52.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:52.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:52.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:15:52.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:52.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:52.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:15:52.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:15:52.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:15:52.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:15:52.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:52.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:52.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:15:52.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:15:52.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:15:52.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:15:52.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:15:52.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:15:52.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:52.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:52.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:15:52.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:15:52.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:15:52.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:15:52.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:15:52.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:15:52.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:52.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:15:52.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:15:52.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:15:52.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:15:52.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:15:52.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:15:52.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:15:52.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:15:52.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:15:52.895 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:15:52.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:15:52.896 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:15:52.897 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:15:52.901 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:15:53.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:15:53.437 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:15:53.439 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:15:53.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:15:53.441 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:15:53.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:15:53.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:15:53.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:15:53.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:15:53.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:53.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:53.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:53.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:54.326 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:15:54.795 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:15:54.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:54.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:54.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:54.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:55.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:15:55.733 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:15:55.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:55.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:55.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:55.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:56.207 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:15:56.688 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:15:56.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:56.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:56.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:56.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:57.168 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:15:57.645 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:15:57.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:15:57.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:15:57.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:15:57.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:15:58.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:15:58.584 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:15:59.063 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:15:59.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:59.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:59.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:59.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:15:59.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:15:59.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:15:59.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:15:59.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:15:59.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:15:59.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:15:59.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:00.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:16:00.494 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:16:00.974 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:16:01.453 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:16:01.932 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:16:02.410 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:16:02.889 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:16:03.369 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:16:03.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:16:03.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:03.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:16:03.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:16:03.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:03.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:03.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:03.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:03.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:03.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:03.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:03.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:03.521 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:16:03.521 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.521 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.521 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.522 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.522 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.522 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:03.522 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:08.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:08.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:08.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:08.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:08.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:08.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:08.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:08.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:08.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:08.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:08.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:16:08.547 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:16:08.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:16:08.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:08.548 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:08.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:08.548 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:16:08.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:08.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:08.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:16:08.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:08.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:16:08.552 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:16:08.552 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:16:08.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:08.552 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:08.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:08.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:16:08.553 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:08.553 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:16:08.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:16:08.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:16:08.556 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:16:08.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:08.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:16:09.038 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:16:09.085 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:16:09.087 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:16:09.090 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:16:09.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:16:09.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:16:09.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:16:09.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:16:09.517 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:16:09.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:09.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:09.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:09.995 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:16:10.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:16:10.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:10.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:10.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:10.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:10.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:16:11.432 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:16:11.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:11.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:11.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:11.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:11.911 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:16:12.392 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:16:12.563 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:12.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:12.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:12.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:12.872 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:16:13.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:16:13.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:13.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:13.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:13.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:13.829 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:16:14.297 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:16:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:16:15.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:15.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:16:15.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:16:15.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:16:15.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:16:15.246 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:16:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:16:15.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:16:15.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:16:15.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:15.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:15.725 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:16:16.203 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:16:16.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:16:17.161 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:16:17.639 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:16:18.111 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:16:18.582 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:16:19.053 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:16:19.524 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:16:19.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:16:19.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:19.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:16:19.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:16:19.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:19.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:19.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:19.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:19.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:19.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:19.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:19.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:19.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:19.676 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:16:19.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:19.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:24.678 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:24.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:24.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:24.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:24.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:24.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:24.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:24.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:24.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:24.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:24.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:16:24.702 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:16:24.702 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:16:24.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:24.703 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:24.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:24.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:16:24.704 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:24.704 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:16:24.706 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:16:24.706 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:16:24.706 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:24.707 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:24.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:24.707 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:16:24.707 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:24.707 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:16:24.709 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:16:24.709 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:16:24.709 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:24.709 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:24.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:24.709 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:16:24.710 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:24.710 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:16:24.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:16:24.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:16:24.714 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:16:24.714 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:24.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:24.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:16:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:16:25.244 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:16:25.246 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:16:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:16:25.248 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:16:25.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:16:25.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:16:25.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:16:25.683 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:16:25.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:25.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:25.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:25.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:26.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:16:26.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:16:26.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:26.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:26.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:26.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:16:27.579 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:16:27.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:27.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:27.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:27.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:28.050 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:16:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:16:28.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:28.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:28.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:28.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:28.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:16:29.464 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:16:29.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:29.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:29.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:29.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:29.933 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:16:30.402 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:16:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:16:31.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:31.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:16:31.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:16:31.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:16:31.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:16:31.359 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:16:31.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:16:31.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:16:31.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:16:31.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:31.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:31.838 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:16:32.316 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:16:32.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:16:33.274 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:16:33.751 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:16:34.230 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:16:34.708 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:16:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:16:35.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:16:35.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:16:35.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:16:35.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:16:35.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:35.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:35.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:35.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:35.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:35.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:35.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:35.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:35.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:35.337 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:16:35.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:35.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:40.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:40.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:40.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:40.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:40.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:40.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:40.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:40.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:40.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:40.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:40.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:16:40.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:16:40.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:16:40.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:40.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:40.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:40.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:16:40.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:40.352 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:40.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:16:40.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:40.355 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:16:40.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:16:40.358 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:16:40.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:40.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:40.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:40.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:16:40.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:40.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:16:40.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:16:40.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:16:40.362 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:16:40.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:40.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:40.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:16:40.850 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:16:40.897 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:16:40.899 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:16:40.901 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:16:40.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:16:41.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:16:41.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:41.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:41.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:41.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:41.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:16:42.290 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:16:42.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:42.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:42.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:42.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:42.772 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:16:43.253 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:16:43.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:43.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:43.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:43.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:43.731 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:16:44.201 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:16:44.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:44.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:44.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:44.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:44.669 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:16:45.145 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:16:45.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:45.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:45.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:45.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:45.625 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:16:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:16:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:16:47.065 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:16:47.546 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:16:48.026 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:16:48.508 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:16:48.988 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:16:49.467 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:16:49.935 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:16:50.405 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:16:50.880 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:50.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:50.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:50.913 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:50.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:16:55.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:55.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:55.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:55.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:55.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:55.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:55.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:55.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:55.929 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:55.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:16:55.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:16:55.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:16:55.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:16:55.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:55.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:55.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:55.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:16:55.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:16:55.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:16:55.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:16:55.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:16:55.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:55.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:55.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:55.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:16:55.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:16:55.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:55.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:16:55.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:16:55.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:16:55.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:16:55.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:16:55.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:16:55.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:16:55.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:16:55.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:16:55.944 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:16:55.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:16:55.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:16:55.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:16:55.947 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:00.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:00.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:00.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:00.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:00.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:00.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:00.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:00.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:00.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:00.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:00.962 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:00.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:00.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:00.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:00.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:00.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:00.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:00.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:00.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:00.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:00.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:00.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:00.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:00.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:00.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:00.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:00.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:00.969 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:00.969 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:00.969 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:00.971 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:00.972 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:00.972 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:00.972 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.972 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:17:01.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:17:01.509 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:17:01.511 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:17:01.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:17:01.513 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:17:01.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:01.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:01.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:17:01.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:17:01.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:17:01.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:17:01.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:17:01.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:17:01.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:17:01.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:01.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:01.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:01.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:02.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:17:02.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:17:02.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:02.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:02.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:02.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:03.370 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:17:03.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:17:03.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:03.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:03.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:03.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:04.326 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:17:04.804 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:17:04.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:04.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:04.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:04.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:05.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:17:05.758 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:17:05.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:05.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:05.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:05.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:06.236 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:17:06.714 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:17:07.193 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:17:07.670 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:17:08.147 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:17:08.623 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:17:09.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:17:09.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:09.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:09.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:09.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:09.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:09.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:09.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:09.564 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.565 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:09.566 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:14.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:14.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:14.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:14.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:14.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:14.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:14.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:14.579 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:14.579 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:14.579 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:14.579 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:14.581 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:14.581 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:14.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:14.581 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:14.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:14.582 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:14.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:14.582 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:14.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:14.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:14.584 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:14.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:14.584 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:14.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:14.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:14.586 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:14.586 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:14.586 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:14.586 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:14.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:14.587 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:14.587 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:14.587 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:14.589 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.590 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:14.590 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:14.590 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:14.590 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:14.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:14.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:14.592 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:19.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:19.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:19.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:19.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:19.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:19.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:19.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:19.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:19.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:19.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:19.611 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:19.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:19.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:19.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:19.617 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:19.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:19.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:19.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:19.618 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:19.620 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:19.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:19.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:19.621 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:19.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:19.621 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:19.621 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:19.621 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:19.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:19.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:19.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:19.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:19.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:19.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:19.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:19.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:19.627 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:19.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.628 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:19.628 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:19.628 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:19.629 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:19.633 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:17:20.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:17:20.155 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:17:20.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:17:20.156 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:17:20.157 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:17:20.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:20.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:20.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:17:20.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:17:20.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:17:20.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:17:20.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:17:20.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:17:20.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:17:20.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:20.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:20.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:20.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:21.069 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:17:21.546 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:17:21.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:21.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:21.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:21.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:17:22.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:17:22.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:22.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:22.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:22.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:22.980 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:17:23.457 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:17:23.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:23.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:23.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:23.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:23.934 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:17:24.411 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:17:24.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:24.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:24.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:24.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:24.889 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:17:25.367 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:17:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:17:26.323 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:17:26.801 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:17:27.279 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:17:27.756 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:17:28.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:28.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:28.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:28.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:28.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:28.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:28.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:28.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:28.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:28.218 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:28.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:28.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:33.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:33.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:33.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:33.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:33.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:33.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:33.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:33.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:33.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:33.252 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:33.252 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:33.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:33.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:33.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:33.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:33.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:33.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:33.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:33.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:33.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:33.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:33.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:33.257 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:33.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:33.257 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:33.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:33.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:33.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:33.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:33.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:33.260 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:33.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:33.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:33.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:33.264 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:33.264 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:33.264 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:33.264 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:33.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:33.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:33.266 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:38.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:38.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:38.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:38.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:38.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:38.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:38.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:38.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:38.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:38.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:38.307 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:38.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:38.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:38.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:38.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:38.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:38.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:38.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:38.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:38.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:38.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:38.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:38.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:38.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:38.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:38.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:38.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:38.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:38.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:38.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:38.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:38.317 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:38.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:38.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:38.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:38.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:38.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:38.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:38.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:38.321 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:38.322 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:38.327 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:17:38.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:17:38.854 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:17:38.855 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:17:38.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:17:38.857 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:17:38.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:38.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:38.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:17:38.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:17:38.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:17:38.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:17:38.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:17:38.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:17:39.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:17:39.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:39.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:39.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:39.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:39.764 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:17:40.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:17:40.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:40.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:40.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:40.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:40.720 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:17:41.198 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:17:41.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:41.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:41.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:41.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:41.676 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:17:42.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:17:42.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:42.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:42.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:42.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:42.632 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:17:43.109 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:17:43.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:43.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:43.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:43.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:43.587 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:17:44.064 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:17:44.542 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:17:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:17:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:17:45.975 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:17:46.453 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:17:46.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:46.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:46.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:46.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:46.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:46.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:46.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:46.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:46.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:46.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:46.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:46.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:46.913 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.913 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:46.914 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:17:51.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:51.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:51.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:51.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:51.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:51.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:51.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:51.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:51.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:51.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:51.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:51.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:51.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:51.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:51.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:51.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:51.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:51.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:51.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:51.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:51.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:51.937 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:51.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:51.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:51.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.942 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:51.942 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:51.942 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:51.942 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:51.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:51.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:51.944 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:17:56.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:17:56.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:17:56.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:56.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:56.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:56.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:56.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:17:56.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:56.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:56.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:17:56.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:17:56.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:17:56.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:17:56.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:56.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:56.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:17:56.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:17:56.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:17:56.970 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:17:56.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:17:56.972 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:17:56.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:56.972 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:56.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:17:56.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:17:56.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:17:56.973 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:17:56.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:17:56.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:17:56.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:56.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:17:56.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:17:56.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:17:56.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:17:56.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:17:56.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:17:56.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:17:56.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:17:56.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:17:56.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:17:56.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:17:56.979 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:17:56.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:17:56.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:17:57.461 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:17:57.506 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:17:57.509 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:17:57.510 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:17:57.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:17:57.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:17:57.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:17:57.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:17:57.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:17:57.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:17:57.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:17:57.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:17:57.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:17:57.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:17:57.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:57.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:57.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:57.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:58.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:17:58.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:17:58.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:17:59.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:17:59.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:17:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:17:59.368 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:17:59.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:18:00.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:00.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:00.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:00.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:00.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:18:00.801 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:18:01.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:01.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:01.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:01.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:01.279 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:18:01.757 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:18:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:02.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:02.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:02.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:02.235 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:18:02.712 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:18:03.189 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:18:03.667 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:18:04.144 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:18:04.622 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:18:05.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:18:05.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:05.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:05.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:05.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:05.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:05.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:05.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:05.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:05.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:05.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:05.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:05.563 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:05.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:05.563 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:05.563 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:10.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:10.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:10.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:10.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:10.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:10.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:10.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:10.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:10.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:10.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:10.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:10.581 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:10.582 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:10.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:10.582 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:10.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:10.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:10.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:10.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:10.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:10.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:10.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:10.586 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:10.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:10.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:10.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:10.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:10.587 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:10.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:10.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:10.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:10.589 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:10.589 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:10.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:10.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.591 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:10.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:10.592 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:10.592 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:10.594 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:10.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:10.594 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:15.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:15.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:15.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:15.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:15.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:15.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:15.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:15.613 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:15.613 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:15.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:15.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:15.617 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:15.618 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:15.618 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:15.618 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:15.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:15.619 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:15.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:15.620 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:15.622 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:15.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:15.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:15.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:15.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:15.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:15.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:15.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:15.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:15.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:15.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:15.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:15.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:15.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:15.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:15.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:15.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:15.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:15.632 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:15.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:15.637 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:18:16.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:18:16.165 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:18:16.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:18:16.167 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:18:16.170 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:18:16.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:16.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:16.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:18:16.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:18:16.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:18:16.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:18:16.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:18:16.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:18:16.598 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:18:16.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:16.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:16.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:16.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:17.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:18:17.553 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:18:17.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:17.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:17.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:18.031 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:18:18.509 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:18:18.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:18.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:18.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:18.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:18.987 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:18:19.465 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:18:19.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:19.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:19.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:19.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:19.943 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:18:20.420 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:18:20.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:20.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:20.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:20.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:20.898 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:18:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:18:21.853 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:18:22.331 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:18:22.807 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:18:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:18:23.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:18:24.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:18:24.715 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:18:25.193 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:18:25.671 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:18:26.149 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:18:26.627 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:18:27.104 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:18:27.582 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:18:28.060 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:18:28.538 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:18:29.016 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:18:29.494 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:18:29.971 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:18:30.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:30.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:30.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:30.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:30.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:30.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:30.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:30.221 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:30.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:35.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:35.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:35.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:35.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:35.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:35.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:35.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:35.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:35.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:35.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:35.236 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:35.238 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:35.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:35.239 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:35.239 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:35.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:35.239 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:35.239 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:35.239 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:35.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:35.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:35.241 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:35.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:35.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:35.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:35.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:35.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:35.246 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:35.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:35.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:35.248 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:40.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:40.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:40.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:40.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:40.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:40.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:40.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:40.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:40.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:40.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:40.266 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:40.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:40.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:40.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:40.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:40.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:40.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:40.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:40.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:40.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:40.273 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:40.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:40.273 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:40.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:40.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:40.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:40.274 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:40.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:40.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:40.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:40.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:40.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:40.276 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:40.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:40.276 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:40.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:40.279 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:40.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:40.284 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:18:40.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:18:40.811 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:18:40.813 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:18:40.815 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:18:40.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:18:40.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:40.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:40.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:18:40.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:18:40.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:18:40.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:18:40.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:18:40.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:18:41.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:18:41.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:41.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:41.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:41.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:41.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:18:42.201 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:18:42.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:42.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:42.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:42.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:42.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:18:43.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:18:43.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:43.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:43.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:18:44.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:18:44.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:44.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:44.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:44.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:44.590 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:18:45.068 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:18:45.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:45.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:45.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:45.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:45.546 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:18:46.023 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:18:46.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:18:46.978 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:18:47.455 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:18:47.933 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:18:48.410 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:18:48.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:48.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:48.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:48.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:48.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:48.867 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.867 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:48.868 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:18:53.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:53.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:53.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:53.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:53.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:53.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:53.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:53.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:53.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:53.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:53.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:53.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:53.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:53.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:53.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:53.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:53.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:53.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:53.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:53.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:53.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:53.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:53.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:53.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:53.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:53.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:53.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:53.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:53.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:53.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:53.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:53.898 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:53.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:53.900 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:53.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:53.900 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:18:58.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:18:58.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:18:58.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:58.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:58.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:58.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:58.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:18:58.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:58.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:58.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:18:58.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:18:58.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:18:58.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:18:58.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:58.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:58.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:18:58.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:18:58.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:18:58.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:18:58.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:18:58.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:18:58.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:58.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:58.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:18:58.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:18:58.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:18:58.943 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:58.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:18:58.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:18:58.944 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:18:58.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:18:58.947 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:18:58.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:18:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:18:59.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:18:59.477 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:18:59.480 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:18:59.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:18:59.483 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:18:59.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:18:59.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:18:59.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:18:59.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:18:59.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:18:59.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:18:59.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:18:59.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:18:59.913 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:18:59.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:18:59.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:18:59.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:18:59.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:00.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:19:00.868 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:19:00.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:00.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:00.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:00.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:01.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:19:01.824 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:19:01.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:01.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:01.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:01.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:02.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:19:02.780 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:19:02.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:02.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:02.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:02.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:03.257 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:19:03.734 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:19:03.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:03.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:03.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:03.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:04.212 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:19:04.690 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:19:05.168 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:19:05.646 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:19:06.123 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:19:06.601 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:19:07.078 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:19:07.556 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:19:08.032 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:19:08.499 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:19:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:19:09.440 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:19:09.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:19:09.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:19:09.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:09.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:09.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:09.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:09.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:09.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:09.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:09.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:09.531 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:19:14.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:14.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:14.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:14.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:14.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:14.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:14.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:14.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:14.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:14.541 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:14.541 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:14.542 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:19:14.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:14.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:19:14.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:19:14.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:19:14.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:14.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:14.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:14.544 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:19:14.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:14.544 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:19:14.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:19:14.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:19:14.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:14.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:14.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:14.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:19:14.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:14.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:19:14.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:19:14.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:19:14.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:19:14.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:19:14.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:19:14.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:19:14.549 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:19:14.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:14.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:14.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:14.551 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:19:19.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:19.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:19.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:19.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:19.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:19.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:19.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:19.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:19.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:19.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:19.561 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:19:19.561 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:19:19.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:19:19.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:19.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:19.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:19.562 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:19:19.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:19.562 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:19.563 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:19:19.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:19.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:19.564 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:19.564 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:19.564 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:19:19.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:19:19.566 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:19.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:19.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:19:20.054 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:19:20.088 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:19:20.089 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:19:20.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:19:20.090 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:19:20.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:19:20.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:19:20.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:19:20.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:19:20.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:19:20.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:19:20.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:19:20.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:19:20.532 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:19:20.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:20.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:20.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:21.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:19:21.486 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:19:21.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:21.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:21.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:21.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:21.963 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:19:22.441 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:19:22.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:22.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:22.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:22.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:22.919 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:19:23.396 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:19:23.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:23.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:23.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:23.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:19:24.351 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:19:24.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:24.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:24.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:24.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:24.829 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:19:25.306 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:19:25.784 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:19:26.262 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:19:26.740 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:19:27.218 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:19:27.695 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:19:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:19:28.651 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:19:29.128 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:19:29.606 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:19:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:19:30.561 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:19:31.038 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:19:31.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:19:31.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:19:31.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:31.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:31.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:31.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:31.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:31.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:31.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:31.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:31.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:31.108 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:19:31.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:31.108 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:19:36.111 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:36.111 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:36.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:36.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:36.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:36.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:36.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:36.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:36.121 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:36.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:36.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:19:36.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:19:36.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:19:36.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:36.126 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:36.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:36.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:19:36.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:36.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:19:36.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:19:36.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:19:36.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:36.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:36.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:36.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:19:36.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:36.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:36.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:19:36.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:36.133 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:19:36.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:19:36.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:19:36.138 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:19:36.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:36.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:36.141 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:36.141 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:36.141 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:19:41.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:19:41.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:19:41.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:41.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:41.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:41.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:41.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:19:41.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:41.152 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:41.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:19:41.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:19:41.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:19:41.155 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:19:41.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:41.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:41.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:19:41.156 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:19:41.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:19:41.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:19:41.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:19:41.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:19:41.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:41.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:41.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:19:41.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:19:41.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:19:41.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:41.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:19:41.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:19:41.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:19:41.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:19:41.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:19:41.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:19:41.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:19:41.163 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:19:41.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:19:41.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:19:41.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:19:41.689 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:19:41.691 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:19:41.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:19:41.693 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:19:41.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:19:41.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:19:41.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:19:41.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:19:41.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:19:41.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:19:41.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:19:41.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:19:42.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:19:42.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:42.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:42.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:42.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:42.608 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:19:43.086 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:19:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:43.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:43.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:43.564 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:19:44.041 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:19:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:44.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:44.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:19:44.996 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:19:45.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:45.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:45.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:45.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:45.474 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:19:45.952 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:19:46.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:19:46.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:19:46.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:19:46.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:19:46.430 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:19:46.907 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:19:47.385 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:19:47.863 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:19:48.341 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:19:48.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:19:49.296 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:19:49.773 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:19:50.250 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:19:50.728 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:19:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:19:51.683 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:19:52.161 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:19:52.638 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:19:53.116 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:19:53.593 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:19:54.070 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:19:54.545 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:19:55.023 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:19:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:19:55.977 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:19:56.455 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:19:56.933 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:19:57.411 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:19:57.889 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:19:58.365 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:19:58.842 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:19:59.320 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:19:59.798 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:20:00.276 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:20:00.753 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:20:01.231 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:20:01.709 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:20:01.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:20:01.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:20:01.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:01.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:01.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:01.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:01.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:01.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:01.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:01.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:01.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:01.762 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:06.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:06.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:06.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:06.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:06.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:06.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:06.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:06.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:06.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:06.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:06.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:06.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:06.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:06.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:06.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:06.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:06.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:06.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:06.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:06.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:06.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:06.773 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:06.773 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:06.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:06.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:06.774 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:11.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:11.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:11.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:11.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:11.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:11.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:11.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:11.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:11.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:11.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:11.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:11.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:11.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:11.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:11.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:11.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:11.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:11.801 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:11.801 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:11.802 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:11.803 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:11.803 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:11.804 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:11.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:11.804 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:11.805 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:11.805 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:11.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:11.806 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:11.806 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:11.806 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:11.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:11.807 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:11.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:11.807 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:11.811 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:11.811 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:11.811 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:11.816 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:20:12.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:20:12.340 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:20:12.342 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:20:12.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:20:12.346 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:20:12.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:20:12.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:12.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:12.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:12.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:13.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:20:13.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:20:13.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:13.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:13.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:13.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:14.222 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:20:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:20:14.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:14.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:14.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:14.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:15.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:20:15.659 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:20:15.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:15.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:15.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:15.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:16.137 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:20:16.615 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:20:16.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:16.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:16.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:16.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:17.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:20:17.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:20:18.048 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:20:18.529 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:20:19.010 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:20:19.491 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:20:19.972 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:20:20.454 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:20:20.933 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:20:21.411 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:20:21.889 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:20:22.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:22.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:22.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:22.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:22.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:22.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:22.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:22.361 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:22.361 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.361 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.361 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.361 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:22.362 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2246 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:27.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:27.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:27.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:27.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:27.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:27.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:27.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:27.377 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:27.377 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:27.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:27.378 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:27.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:27.383 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:27.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:27.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:27.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:27.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:27.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:27.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:27.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:27.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:27.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:27.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:27.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:27.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:27.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:27.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:27.390 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:27.390 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:27.390 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:27.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:27.394 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:27.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:27.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:27.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:27.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:27.397 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:32.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:32.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:32.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:32.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:32.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:32.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:32.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:32.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:32.413 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:32.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:32.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:32.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:32.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:32.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:32.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:32.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:32.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:32.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:32.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:32.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:32.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:32.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:32.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:32.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:32.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:32.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:32.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:32.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:32.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:32.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:32.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:32.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:32.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:32.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:32.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:32.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:32.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:32.431 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:32.431 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:32.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:20:32.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:20:32.964 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:20:32.966 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:20:32.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:20:32.968 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:20:33.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:20:33.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:33.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:33.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:33.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:33.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:20:34.330 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:20:34.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:34.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:34.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:34.807 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:20:35.289 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:20:35.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:35.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:35.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:20:36.248 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:20:36.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:36.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:36.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:36.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:36.729 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:20:37.210 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:20:37.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:37.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:37.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:37.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:37.690 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:20:38.168 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:20:38.646 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:20:39.124 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:20:39.603 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:20:40.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:20:40.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:20:41.046 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:20:41.524 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:20:42.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:20:42.486 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:20:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:20:43.448 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:20:43.922 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:20:44.401 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:20:44.879 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:20:44.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:44.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:44.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:44.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:44.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:44.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:44.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:44.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:44.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:44.986 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:44.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:44.986 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2677 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:20:49.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:49.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:49.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:49.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:49.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:49.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:49.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:49.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:49.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:49.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:49.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:49.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:49.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:49.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:49.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:49.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:50.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:50.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:50.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:50.002 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:50.002 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:50.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:50.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:50.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:50.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:50.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:50.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:50.004 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:50.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:50.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:50.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:50.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:50.008 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:50.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:50.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:50.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:50.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:50.010 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:20:55.046 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:20:55.046 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:20:55.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:55.046 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:55.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:55.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:55.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:20:55.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:55.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:55.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:20:55.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:20:55.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:20:55.062 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:20:55.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:55.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:55.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:20:55.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:20:55.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:20:55.064 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:20:55.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:20:55.066 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:20:55.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:55.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:55.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:20:55.067 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:20:55.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:20:55.067 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:20:55.068 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:20:55.068 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:20:55.068 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:55.068 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:20:55.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:20:55.069 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:20:55.069 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:20:55.069 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:20:55.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:20:55.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:20:55.073 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:20:55.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:20:55.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:20:55.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:20:55.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:20:55.606 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:20:55.609 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:20:55.609 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:20:55.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:20:55.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:20:55.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:20:55.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:20:55.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:20:55.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:20:55.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:20:55.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:20:56.040 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:20:56.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:56.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:56.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:56.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:20:56.995 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:20:57.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:57.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:57.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:57.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:57.473 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:20:57.951 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:20:58.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:58.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:58.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:58.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:58.429 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:20:58.906 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:20:59.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:20:59.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:20:59.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:20:59.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:20:59.384 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:20:59.862 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:21:00.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:00.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:00.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:00.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:21:00.818 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:21:01.296 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:21:01.774 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:21:02.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:21:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:21:03.207 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:21:03.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:03.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:03.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:03.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:03.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:03.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:03.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:03.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:03.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:03.660 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:03.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:03.660 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:08.663 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:08.663 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:08.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:08.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:08.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:08.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:08.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:08.674 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:08.674 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:08.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:08.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:08.676 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:08.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:08.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:08.677 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:08.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:08.678 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:08.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:08.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:08.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:08.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:08.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:08.681 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:08.681 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:08.681 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:08.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:08.684 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:08.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:08.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:08.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:08.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:08.686 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:13.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:13.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:13.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:13.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:13.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:13.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:13.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:13.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:13.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:13.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:13.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:13.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:13.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:13.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:13.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:13.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:13.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:13.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:13.707 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:13.708 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:13.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:13.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:13.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:13.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:13.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:13.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:13.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:13.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:13.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:13.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.714 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:13.714 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:13.715 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:13.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:13.719 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:21:14.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:21:14.242 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:21:14.244 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:21:14.245 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:21:14.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:21:14.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:14.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:14.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:21:14.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:14.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:14.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:14.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:21:14.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:21:14.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:14.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:14.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:14.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:14.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:21:14.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:14.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:14.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:14.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:15.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:21:15.636 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:21:15.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:15.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:15.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:15.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:16.114 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:21:16.591 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:21:16.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:16.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:16.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:16.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:17.068 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:21:17.546 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:21:17.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:17.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:17.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:17.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:18.023 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:21:18.500 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:21:18.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:18.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:18.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:18.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:18.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:21:19.454 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:21:19.932 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:21:20.409 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:21:20.886 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:21:21.364 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:21:21.841 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:21:22.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:22.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:22.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:22.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:22.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:22.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:22.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:22.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:22.302 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:27.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:27.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:27.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:27.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:27.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:27.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:27.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:27.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:27.315 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:27.315 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:27.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:27.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:27.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:27.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:27.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:27.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:27.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:27.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:27.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:27.324 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:27.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:27.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:27.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:27.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:27.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:27.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:27.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:27.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:27.328 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:27.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:27.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:27.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:27.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:27.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:27.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:27.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:27.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:27.333 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:27.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:27.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:27.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:27.336 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:32.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:32.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:32.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:32.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:32.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:32.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:32.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:32.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:32.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:32.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:32.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:32.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:32.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:32.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:32.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:32.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:32.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:32.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:32.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:32.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:32.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:32.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:32.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:32.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:32.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:32.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:32.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:32.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:32.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:32.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:32.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:32.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:32.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:32.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:32.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:32.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:32.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:32.369 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:32.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:32.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:32.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:21:32.857 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:21:32.898 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:21:32.900 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:21:32.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:21:32.903 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:21:32.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:32.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:32.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:21:32.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:32.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:32.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:32.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:21:32.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:21:32.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:32.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:32.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:32.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:33.334 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:21:33.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:33.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:33.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:33.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:21:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:21:34.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:34.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:34.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:34.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:34.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:21:35.244 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:21:35.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:35.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:35.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:35.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:35.722 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:21:36.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:21:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:36.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:36.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:36.675 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:21:37.151 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:21:37.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:37.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:37.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:37.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:37.628 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:21:38.106 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:21:38.579 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:21:39.055 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:21:39.532 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:21:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:21:40.488 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:21:40.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:40.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:40.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:40.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:40.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:40.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:40.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:40.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:40.957 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:40.957 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:45.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:45.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:45.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:45.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:45.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:45.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:45.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:45.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:45.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:45.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:45.976 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:45.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:45.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:45.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:45.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:45.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:45.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:45.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:45.983 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:45.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:45.986 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:45.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:45.986 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:45.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:45.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:45.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:45.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:45.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:45.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:45.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:45.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:45.996 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:45.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:45.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:45.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:45.998 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:51.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:51.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:51.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:51.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:51.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:51.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:51.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:51.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:51.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:51.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:21:51.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:21:51.016 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:21:51.016 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:21:51.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:51.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:51.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:51.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:21:51.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:21:51.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:21:51.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:21:51.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:21:51.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:51.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:51.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:51.021 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:21:51.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:21:51.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:21:51.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:21:51.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:21:51.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:51.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:21:51.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:51.023 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:21:51.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:21:51.023 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:21:51.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:21:51.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:21:51.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:21:51.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:21:51.026 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:21:51.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:21:51.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:21:51.031 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:21:51.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:21:51.554 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:21:51.555 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:21:51.556 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:21:51.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:21:51.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:51.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:51.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:21:51.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:51.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:51.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:51.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:21:51.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:21:51.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:21:51.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:21:51.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:51.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:21:51.991 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:21:52.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:52.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:52.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:52.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:52.469 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:21:52.946 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:21:53.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:53.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:53.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:53.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:53.424 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:21:53.901 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:21:54.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:54.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:54.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:54.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:54.379 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:21:54.857 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:21:55.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:55.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:55.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:55.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:55.335 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:21:55.812 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:21:56.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:56.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:56.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:56.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:21:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:21:57.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:21:57.724 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:21:58.200 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:21:58.678 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:21:59.156 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:21:59.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:21:59.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:21:59.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:21:59.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:21:59.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:21:59.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:21:59.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:21:59.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:21:59.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:21:59.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:21:59.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:21:59.618 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:21:59.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.620 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.620 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.620 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:21:59.620 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:22:04.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:04.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:04.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:04.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:04.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:04.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:04.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:04.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:04.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:04.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:04.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:04.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:04.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:04.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:04.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:04.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:04.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:04.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:04.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:04.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:04.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:04.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:04.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:04.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:04.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:04.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:04.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:04.637 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:04.637 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:04.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:04.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:04.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:04.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:04.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:04.638 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:04.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:04.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:04.641 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:04.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:04.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:04.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:04.643 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:22:09.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:09.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:09.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:09.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:09.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:09.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:09.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:09.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:09.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:09.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:09.661 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:09.664 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:09.665 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:09.665 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:09.665 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:09.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:09.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:09.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:09.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:09.668 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:09.668 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:09.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:09.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:09.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:09.669 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:09.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:09.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:09.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:09.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:09.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:09.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:09.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:09.673 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:09.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:09.674 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:09.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:09.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:09.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:09.676 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:09.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:09.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:22:10.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:22:10.210 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:22:10.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:22:10.213 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:22:10.215 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:22:10.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:22:10.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:22:10.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:22:10.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:10.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:22:10.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:22:10.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:22:10.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:22:10.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:22:10.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:22:10.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:10.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:10.643 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:22:10.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:10.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:10.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:10.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:11.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:22:11.598 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:22:11.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:11.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:11.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:11.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:12.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:22:12.553 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:22:12.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:12.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:12.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:12.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:13.031 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:22:13.509 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:22:13.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:13.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:13.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:13.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:13.987 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:22:14.465 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:22:14.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:14.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:14.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:14.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:14.943 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:22:15.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:22:15.898 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:22:16.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:22:16.854 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:22:17.332 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:22:17.810 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:22:18.287 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:22:18.765 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:22:19.242 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:22:19.720 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:22:20.197 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:22:20.675 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:22:21.153 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:22:21.631 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:22:22.109 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:22:22.587 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:22:23.065 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:22:23.542 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:22:24.019 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:22:24.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:22:24.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:22:24.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:24.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:24.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:24.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:24.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:24.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:24.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:24.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:24.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:24.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:24.267 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:22:29.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:29.268 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:29.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:29.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:29.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:29.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:29.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:29.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:29.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:29.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:29.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:29.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:29.285 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:29.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:29.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:29.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:29.286 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:29.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:29.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:29.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:29.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:29.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:29.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:29.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:29.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:29.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:29.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:29.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:29.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:29.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:29.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:29.294 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:29.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:29.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:29.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:29.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:29.296 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:22:34.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:34.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:34.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:34.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:34.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:34.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:34.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:34.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:34.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:34.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:34.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:34.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:34.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:34.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:34.321 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:34.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:34.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:34.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:34.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:34.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:34.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:34.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:34.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:34.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:34.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:34.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:34.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:34.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:34.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:34.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:34.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:34.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:34.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:34.332 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:34.332 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:34.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:34.337 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:22:34.821 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:22:34.867 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:22:34.869 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:22:34.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:22:34.870 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:22:34.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:22:34.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:22:34.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:22:34.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:34.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:22:34.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:22:34.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:22:34.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:22:34.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:22:34.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:22:34.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:34.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:35.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:22:35.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:35.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:35.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:35.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:35.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:22:36.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:22:36.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:36.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:36.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:36.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:36.732 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:22:37.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:22:37.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:37.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:37.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:37.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:37.687 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:22:38.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:22:38.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:38.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:38.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:38.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:38.641 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:22:39.119 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:22:39.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:39.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:39.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:39.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:39.597 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:22:40.074 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:22:40.552 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:22:41.029 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:22:41.507 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:22:41.984 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:22:42.462 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:22:42.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:22:42.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:42.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:42.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:42.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:42.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:42.921 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:22:47.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:47.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:47.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:47.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:47.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:47.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:47.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:47.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:47.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:47.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:47.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:47.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:47.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:47.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:47.938 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:47.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:47.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:47.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:47.939 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:47.942 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:47.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:47.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:47.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:47.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:47.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:47.950 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:47.950 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:47.950 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:47.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:47.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:47.952 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:22:52.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:22:52.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:22:52.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:52.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:52.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:52.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:52.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:22:52.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:52.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:52.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:22:52.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:22:52.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:22:52.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:22:52.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:52.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:52.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:22:52.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:22:52.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:22:52.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:22:52.978 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:22:52.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:22:52.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:52.979 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:52.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:22:52.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:22:52.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:22:52.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:22:52.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:22:52.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:22:52.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:52.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:22:52.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:22:52.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:22:52.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:22:52.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:22:52.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:22:52.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:22:52.988 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:22:52.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:22:52.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:22:53.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:22:53.522 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:22:53.524 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:22:53.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:22:53.527 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:22:53.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:22:53.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:22:53.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:22:53.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:22:53.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:22:53.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:22:53.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:22:53.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:22:53.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:22:53.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:53.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:53.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:53.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:54.428 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:22:54.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:22:54.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:54.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:54.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:54.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:55.384 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:22:55.862 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:22:55.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:55.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:55.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:55.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:56.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:22:56.817 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:22:56.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:56.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:56.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:56.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:57.295 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:22:57.772 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:22:57.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:22:57.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:22:57.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:22:57.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:22:58.250 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:22:58.727 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:22:59.205 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:22:59.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:23:00.159 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:23:00.637 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:23:01.114 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:23:01.592 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:23:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:23:02.547 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:23:03.025 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:23:03.503 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:23:03.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:23:03.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:23:03.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:03.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:03.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:03.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:03.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:03.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:03.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:03.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:03.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:03.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:03.576 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:08.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:08.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:08.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:08.584 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:08.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:08.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:08.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:08.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:08.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:08.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:08.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:08.599 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:08.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:08.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:08.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:08.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:08.601 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:08.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:08.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:08.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:08.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:08.603 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:08.603 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:08.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:08.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:08.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:08.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:08.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:08.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:08.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:08.607 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:08.607 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:08.607 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:08.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:08.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:08.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:08.609 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:13.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:13.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:13.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:13.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:13.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:13.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:13.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:13.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:13.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:13.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:13.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:13.634 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:13.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:13.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:13.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:13.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:13.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:13.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:13.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:13.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:13.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:13.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:13.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:13.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:13.639 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:13.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:13.639 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:13.642 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:13.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:13.642 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:13.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:13.647 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:13.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:13.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:23:14.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:23:14.173 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:23:14.176 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:23:14.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:23:14.178 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:23:14.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:23:14.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:23:14.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:23:14.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:23:14.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:23:14.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:23:14.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:23:14.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:23:14.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:23:14.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:23:14.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:23:14.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:23:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:23:14.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:14.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:14.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:14.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:23:15.567 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:23:15.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:15.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:15.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:15.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:16.045 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:23:16.522 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:23:16.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:16.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:16.999 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:23:17.476 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:23:17.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:17.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:17.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:17.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:17.953 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:23:18.429 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:23:18.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:18.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:18.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:18.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:18.907 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:23:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:23:19.864 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:23:20.341 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:23:20.819 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:23:21.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:23:21.774 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:23:22.252 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:23:22.730 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:23:23.207 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:23:23.685 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:23:24.162 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:23:24.640 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:23:25.118 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:23:25.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:23:25.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:23:25.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:25.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:25.232 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:25.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:25.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:25.232 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:25.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:30.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:30.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:30.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:30.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:30.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:30.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:30.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:30.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:30.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:30.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:30.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:30.243 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:30.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:30.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:30.244 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:30.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:30.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:30.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:30.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:30.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:30.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:30.247 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:30.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:30.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:30.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:30.249 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:35.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:35.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:35.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:35.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:35.256 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:35.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:35.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:35.266 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:35.266 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:35.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:35.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:35.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:35.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:35.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:35.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:35.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:35.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:35.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:35.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:35.273 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:35.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:35.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:35.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:35.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:35.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:35.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:35.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:35.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:35.276 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:35.276 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:35.276 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:35.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:35.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:35.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:35.277 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:35.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:35.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:35.280 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:35.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:23:35.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:23:35.816 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:23:35.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:23:35.819 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:23:35.822 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:23:36.238 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:23:36.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:36.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:36.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:36.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:36.707 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:23:37.181 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:23:37.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:37.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:37.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:37.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:37.659 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:23:38.137 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:23:38.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:38.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:38.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:38.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:38.615 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:23:39.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:23:39.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:39.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:39.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:39.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:39.578 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:23:40.059 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:23:40.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:40.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:40.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:40.539 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:23:41.016 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:23:41.494 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:23:41.972 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:23:42.450 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:23:42.932 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:23:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:23:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:23:44.366 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:23:44.844 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:23:45.322 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:23:45.801 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:23:45.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:45.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:45.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:45.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:45.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:45.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:45.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:45.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:45.837 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:45.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2253 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:23:50.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:50.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:50.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:50.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:50.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:50.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:50.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:50.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:50.848 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:50.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:50.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:50.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:50.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:50.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:50.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:50.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:50.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:50.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:50.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:50.855 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:50.855 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:50.855 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:50.855 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:50.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:50.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:50.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:50.856 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:50.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:50.858 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:50.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:50.858 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:50.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:50.858 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:50.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:50.858 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.860 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:50.861 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:50.861 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:50.861 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:50.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:50.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:50.862 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:23:55.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:23:55.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:23:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:55.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:55.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:23:55.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:55.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:55.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:23:55.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:23:55.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:23:55.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:23:55.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:55.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:55.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:23:55.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:23:55.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:23:55.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:23:55.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:23:55.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:23:55.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:55.885 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:55.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:23:55.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:23:55.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:23:55.886 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:23:55.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:23:55.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:23:55.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:55.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:23:55.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:23:55.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:23:55.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:23:55.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:23:55.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:23:55.891 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:23:55.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:23:55.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:23:56.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:23:56.427 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:23:56.430 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:23:56.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:23:56.432 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:23:56.853 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:23:56.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:56.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:56.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:56.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:57.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:23:57.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:23:57.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:57.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:57.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:57.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:58.289 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:23:58.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:23:58.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:58.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:58.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:58.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:23:59.250 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:23:59.731 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:23:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:23:59.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:23:59.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:23:59.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:00.211 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:24:00.690 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:24:00.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:00.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:00.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:00.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:24:01.653 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:24:02.134 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:24:02.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:24:03.096 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:24:03.577 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:24:04.054 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:24:04.535 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:24:05.017 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:24:05.498 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:24:05.979 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:24:06.460 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:24:06.941 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:24:07.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:24:07.903 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:24:08.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:24:08.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:08.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:08.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:08.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:08.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:08.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:08.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:08.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:08.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:08.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:08.449 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2667 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:08.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2668 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:13.450 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:13.450 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:13.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:13.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:13.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:13.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:13.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:13.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:13.462 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:13.462 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:13.462 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:13.465 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:24:13.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:13.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:24:13.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:24:13.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:24:13.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:13.468 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:13.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:13.468 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:24:13.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:13.468 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:13.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:24:13.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:13.470 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:24:13.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:24:13.473 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:24:13.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:13.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:13.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:13.478 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:24:13.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:24:14.002 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:24:14.004 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:24:14.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:14.007 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:24:14.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:14.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:14.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:14.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:14.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:14.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:14.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:14.011 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:14.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:24:14.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:14.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:14.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:14.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:14.917 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:24:15.395 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:24:15.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:15.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:15.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:15.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:15.872 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:24:16.350 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:24:16.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:16.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:16.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:16.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:16.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:24:17.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:24:17.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:17.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:17.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:17.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:17.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:24:18.261 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:24:18.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:18.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:18.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:18.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:18.738 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:24:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:24:19.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:24:20.172 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:24:20.650 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:24:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:24:21.605 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:24:22.083 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:24:22.560 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:24:23.038 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:24:23.515 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:24:23.993 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:24:24.471 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:24:24.949 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:24:25.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:25.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:25.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:25.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:25.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:25.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:25.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:25.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:25.064 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:25.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:25.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:25.065 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:24:25.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:25.065 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:30.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:30.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:30.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:30.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:30.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:30.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:30.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:30.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:30.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:30.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:30.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:24:30.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:24:30.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:24:30.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:30.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:30.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:30.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:24:30.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:30.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:24:30.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:24:30.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:24:30.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:30.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:30.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:30.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:24:30.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:30.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:30.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:24:30.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:30.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:24:30.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:24:30.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:24:30.089 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:24:30.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:24:30.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:24:30.620 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:24:30.622 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:24:30.623 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:24:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:30.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:30.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:30.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:30.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:30.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:30.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:30.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:30.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:31.056 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:24:31.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:31.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:31.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:31.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:31.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:24:32.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:24:32.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:32.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:32.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:32.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:32.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:24:32.972 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:24:33.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:33.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:33.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:33.450 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:24:33.927 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:24:34.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:34.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:34.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:34.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:34.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:24:34.883 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:24:35.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:35.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:35.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:35.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:35.361 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:24:35.838 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:24:36.316 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:24:36.794 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:24:37.271 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:24:37.749 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:24:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:24:38.704 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:24:39.182 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:24:39.660 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:24:40.138 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:24:40.615 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:24:41.092 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:24:41.569 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:24:42.047 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:24:42.525 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:24:43.003 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:24:43.480 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:24:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:24:44.436 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:24:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:24:45.390 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:24:45.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:45.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:45.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:45.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:45.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:45.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:45.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:45.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:45.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:45.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:45.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:45.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:45.679 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:45.679 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:50.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:50.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:50.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:50.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:50.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:50.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:50.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:50.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:50.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:50.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:50.692 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:24:50.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:24:50.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:24:50.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:50.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:50.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:50.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:24:50.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:50.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:24:50.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:24:50.697 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:24:50.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:50.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:50.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:50.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:24:50.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:50.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:24:50.699 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:24:50.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:24:50.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:50.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:50.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:50.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:24:50.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:50.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.703 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:24:50.703 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:24:50.703 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:50.708 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:24:51.192 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:24:51.226 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:24:51.227 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:24:51.228 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:24:51.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:51.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:51.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:51.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:51.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:51.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:51.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:51.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:51.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:51.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:51.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:51.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:51.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:51.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:51.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:51.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:51.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:51.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:51.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:51.296 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:24:51.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:51.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:56.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:56.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:56.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:56.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:56.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:56.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:56.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:56.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:56.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:56.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:24:56.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:24:56.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:24:56.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:24:56.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:56.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:56.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:56.317 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:24:56.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:24:56.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:24:56.319 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:24:56.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:24:56.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:56.320 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:56.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:56.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:24:56.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:24:56.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:24:56.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:24:56.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:24:56.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:56.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:24:56.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:56.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:24:56.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:24:56.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:24:56.326 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:24:56.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:24:56.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:24:56.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:24:56.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:24:56.327 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:24:56.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:24:56.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:24:56.863 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:24:56.865 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:24:56.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:56.866 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:24:56.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:56.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:56.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:56.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:56.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:56.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:56.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:56.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:56.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:56.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:56.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:56.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:56.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:56.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:56.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:56.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:57.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:57.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:24:57.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:57.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:57.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:57.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:57.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:57.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:57.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:57.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:57.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:24:57.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:57.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.714 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:24:57.714 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:24:57.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:24:57.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:24:57.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:57.767 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:24:58.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:24:58.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:24:58.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:24:58.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:24:58.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:24:58.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:24:58.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:24:58.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:24:58.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:24:58.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:24:58.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:24:58.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:24:58.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:24:58.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:24:58.103 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:24:58.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:24:58.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:03.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:25:03.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:25:03.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:03.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:03.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:03.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:03.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:03.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:03.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:03.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:03.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:25:03.125 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:25:03.126 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:25:03.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:03.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:03.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:03.127 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:25:03.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:03.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:25:03.129 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:25:03.129 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:25:03.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:03.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:03.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:03.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:25:03.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:03.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:03.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:25:03.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:03.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:25:03.135 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:25:03.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.136 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:25:03.136 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:25:03.136 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:03.141 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:25:03.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:25:03.671 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:25:03.673 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:25:03.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:03.675 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:25:03.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:03.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:03.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:03.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:03.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:03.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:03.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:03.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:03.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:03.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:03.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:03.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:03.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:03.762 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:03.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:03.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:04.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:25:04.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:04.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:04.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:04.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:04.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:25:05.056 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:25:05.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:05.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:05.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:05.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:25:06.012 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:25:06.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:06.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:06.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:06.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:06.489 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:25:06.967 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:25:07.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:07.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:07.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:07.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:07.445 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:25:07.923 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:25:08.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:08.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:08.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:08.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:08.401 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:25:08.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:08.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:08.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:08.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:08.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:08.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:08.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:08.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:08.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:08.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:08.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:08.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:08.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:08.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:08.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:08.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:08.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:08.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:08.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:08.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:08.877 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:25:09.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:25:09.834 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:25:10.312 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:25:10.790 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:25:11.268 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:25:11.746 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:25:12.223 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:25:12.701 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:25:13.180 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:25:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:25:13.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:13.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:13.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:13.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:13.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:13.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:13.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:13.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:13.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:13.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:13.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:13.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:13.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:13.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:13.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:13.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:13.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:13.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:13.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:14.133 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:25:14.611 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:25:15.089 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:25:15.566 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:25:16.044 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:25:16.522 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:25:17.000 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:25:17.477 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:25:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:25:18.432 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:25:18.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:18.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:18.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:18.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:18.909 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:25:18.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:18.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:18.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:18.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:18.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:18.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:18.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:18.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:18.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:18.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:18.925 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:18.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:18.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:18.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:18.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:18.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:19.378 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:25:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:25:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:25:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:25:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:25:21.764 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:25:22.243 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:25:22.721 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:25:23.199 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:25:23.676 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:25:23.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:23.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:23.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:23.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:23.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:23.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:23.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:23.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:23.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:23.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:23.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:23.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:23.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:25:23.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:25:23.979 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:23.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4453 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:28.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:25:28.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:25:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:28.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:28.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:28.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:28.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:28.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:28.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:25:29.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:25:29.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:25:29.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:29.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:29.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:29.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:25:29.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:29.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:29.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:25:29.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:29.003 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:25:29.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:25:29.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:25:29.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:29.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:29.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:29.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:25:29.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:29.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:25:29.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:25:29.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:25:29.007 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:29.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:29.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:25:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:25:29.534 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:25:29.536 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:25:29.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:29.540 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:25:29.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:29.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:29.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:29.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:29.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:29.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:29.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:29.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:29.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:29.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:29.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:29.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:29.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:29.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:29.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:29.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:29.973 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:25:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:30.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:30.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:30.451 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:25:30.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:25:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:31.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:31.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:31.407 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:25:31.885 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:25:32.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:32.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:32.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:32.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:32.362 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:25:32.839 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:25:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:33.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:33.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:33.317 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:25:33.794 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:25:34.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:34.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:34.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:34.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:34.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:25:34.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:34.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:34.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:34.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:34.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:34.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:34.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:34.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:34.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:34.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:34.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:34.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:34.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:34.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:34.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:34.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:34.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:34.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:34.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:34.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:34.749 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:25:35.228 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:25:35.706 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:25:36.184 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:25:36.661 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:25:37.139 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:25:37.617 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:25:38.096 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:25:38.573 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:25:39.051 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:25:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:25:39.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:39.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:39.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:39.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:39.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:39.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:39.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:39.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:39.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:39.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:39.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:39.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:39.672 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:39.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:39.672 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:39.672 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:39.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:39.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:39.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:39.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:25:40.483 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:25:40.960 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:25:41.437 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:25:41.915 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:25:42.393 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:25:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:25:43.349 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:25:43.827 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:25:44.305 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:25:44.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:44.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:44.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:44.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:44.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:44.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:44.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:44.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:44.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:44.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:44.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:44.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:44.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:44.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:44.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:44.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:44.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:44.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:44.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:44.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:44.782 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:25:45.259 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:25:45.737 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:25:46.215 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:25:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:25:47.171 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:25:47.649 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:25:48.127 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:25:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:25:49.082 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:25:49.556 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:25:49.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:49.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:49.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:49.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:49.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:49.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:49.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:49.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:49.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:49.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:49.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:49.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:25:49.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:25:49.800 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:25:49.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:49.800 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:49.800 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:49.800 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:49.800 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:49.801 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:25:54.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:25:54.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:25:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:54.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:54.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:25:54.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:54.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:54.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:25:54.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:25:54.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:25:54.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:25:54.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:54.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:54.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:25:54.822 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:25:54.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:25:54.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:25:54.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:25:54.825 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:25:54.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:54.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:54.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:25:54.826 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:25:54.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:25:54.827 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:25:54.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:25:54.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:25:54.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:54.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:25:54.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:25:54.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:25:54.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:25:54.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:25:54.832 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:25:54.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:25:54.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:25:54.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:25:54.832 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:25:54.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:25:54.833 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:25:54.838 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:25:55.322 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:25:55.373 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:25:55.375 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:25:55.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:55.376 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:25:55.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:55.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:55.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:55.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:25:55.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:25:55.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:25:55.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:25:55.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:55.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:55.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:55.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:25:55.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:25:55.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:25:55.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:25:55.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:55.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:25:55.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:25:55.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:55.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:55.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:55.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:56.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:25:56.754 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:25:56.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:56.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:56.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:56.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:57.232 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:25:57.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:25:57.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:57.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:57.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:57.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:58.188 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:25:58.666 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:25:58.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:58.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:58.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:58.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:25:59.144 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:25:59.621 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:25:59.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:25:59.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:25:59.845 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:25:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:00.099 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:26:00.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:00.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:00.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:00.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:00.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:00.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:00.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:00.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:00.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:00.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:00.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:00.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:00.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:00.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:00.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:00.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:00.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:00.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:00.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:00.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:00.575 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:26:01.053 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:26:01.532 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:26:02.010 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:26:02.488 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:26:02.965 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:26:03.444 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:26:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:26:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:26:04.878 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:26:05.356 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:26:05.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:05.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:05.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:05.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:05.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:05.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:05.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:05.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:05.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:05.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:05.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:05.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:05.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:05.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:05.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:05.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:05.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:05.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:05.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:05.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:26:06.311 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:26:06.789 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:26:07.267 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:26:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:26:08.222 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:26:08.699 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:26:09.177 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:26:09.655 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:26:10.132 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:26:10.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:10.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:10.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:10.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:10.610 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:26:10.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:10.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:10.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:10.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:10.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:10.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:10.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:10.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:10.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:10.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:10.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:10.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:10.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:10.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:10.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:10.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:11.087 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:26:11.565 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:26:12.044 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:26:12.521 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:26:12.999 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:26:13.477 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:26:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:26:14.433 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:26:14.910 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:26:15.389 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:26:15.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:15.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:15.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:15.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:15.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:15.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:15.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:15.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:15.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:15.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:15.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:15.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:15.675 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:15.675 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:15.675 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:26:15.675 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4450 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:26:15.676 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4450 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:26:20.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:20.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:20.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:20.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:20.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:20.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:20.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:20.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:20.683 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:20.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:20.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:20.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:26:20.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:20.684 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:20.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:26:20.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:20.685 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:20.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:26:20.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:20.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:26:20.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:26:20.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:26:20.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:26:20.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:26:20.689 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:20.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:26:21.177 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:26:21.215 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:26:21.217 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:26:21.219 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:26:21.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:21.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:21.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:21.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:21.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:21.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:21.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:21.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:21.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:21.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:21.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:21.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:21.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:21.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:21.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:21.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:21.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:21.654 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:26:21.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:21.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:21.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:21.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:22.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:26:22.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:26:22.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:22.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:22.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:22.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:23.087 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:26:23.561 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:26:23.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:23.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:23.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:23.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:24.039 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:26:24.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:26:24.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:24.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:24.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:24.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:24.994 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:26:25.472 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:26:25.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:25.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:25.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:25.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:25.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:26:26.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:26.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:26.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:26.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:26.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:26.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:26.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:26.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:26.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:26.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:26.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:26.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:26.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:26.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:26.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:26.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:26.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:26.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:26.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:26.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:26.426 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:26:26.904 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:26:27.382 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:26:27.860 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:26:28.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:26:28.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:26:29.293 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:26:29.771 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:26:30.249 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:26:30.727 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:26:31.205 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:26:31.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:31.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:31.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:31.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:31.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:31.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:31.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:31.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:31.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:31.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:31.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:31.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:31.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:31.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:31.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:31.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:31.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:31.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:31.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:31.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:26:32.170 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:26:32.648 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:26:33.126 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:26:33.604 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:26:34.081 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:26:34.559 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:26:35.036 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:26:35.514 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:26:35.992 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:26:36.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:36.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:36.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:36.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:36.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:36.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:36.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:36.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:36.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:36.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:36.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:36.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:36.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:36.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:36.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:36.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:36.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:36.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:36.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:36.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:36.468 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:26:36.945 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:26:37.423 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:26:37.900 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:26:38.378 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:26:38.855 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:26:39.333 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:26:39.810 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:26:40.288 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:26:40.766 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:26:41.244 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:26:41.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:41.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:41.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:41.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:41.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:41.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:41.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:41.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:41.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:41.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:41.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:41.479 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:26:41.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:46.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:46.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:46.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:46.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:46.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:46.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:46.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:46.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:46.496 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:46.496 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:46.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:26:46.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:26:46.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:26:46.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:46.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:46.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:46.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:26:46.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:46.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:26:46.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:26:46.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:26:46.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:46.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:46.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:46.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:26:46.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:46.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:26:46.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:26:46.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:26:46.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:46.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:46.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:46.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:26:46.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:46.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:26:46.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:26:46.511 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:26:46.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:46.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:46.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:26:46.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:26:47.037 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:26:47.038 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:26:47.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.039 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:26:47.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:47.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:47.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:47.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:47.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.473 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:26:47.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:47.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:47.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:47.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:47.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:47.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:47.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:47.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.786 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:47.786 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:47.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:47.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:47.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:47.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:26:48.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:26:48.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:48.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:48.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:48.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:48.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:48.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:48.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:48.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:48.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:48.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:48.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:48.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:48.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:48.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:48.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:48.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:48.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:48.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:48.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:48.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:48.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:48.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:48.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:48.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:48.900 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:26:49.376 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:26:49.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:49.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:49.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:49.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:49.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:49.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:49.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:49.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:49.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:49.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:49.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:49.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:49.477 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:26:54.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:26:54.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:26:54.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:54.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:54.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:54.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:54.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:26:54.490 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:54.490 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:54.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:26:54.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:26:54.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:26:54.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:26:54.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:54.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:54.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:26:54.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:26:54.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:26:54.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:26:54.501 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:26:54.501 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:26:54.501 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:54.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:54.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:26:54.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:26:54.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:26:54.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:26:54.503 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:26:54.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:26:54.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:54.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:26:54.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:26:54.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:26:54.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:26:54.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:26:54.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:26:54.508 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:26:54.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:26:54.994 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:26:55.041 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:26:55.043 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:26:55.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:55.045 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:26:55.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:55.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:55.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:55.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:26:55.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:26:55.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:26:55.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:26:55.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:55.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:55.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:55.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:26:55.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:26:55.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:26:55.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:26:55.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:55.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:26:55.470 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:26:55.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:55.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:55.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:55.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:55.948 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:26:56.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:26:56.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:56.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:56.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:56.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:56.903 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:26:57.381 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:26:57.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:57.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:57.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:57.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:57.859 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:26:58.337 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:26:58.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:58.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:58.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:58.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:58.815 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:26:59.293 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:26:59.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:26:59.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:26:59.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:26:59.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:26:59.770 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:27:00.248 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:27:00.726 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:27:01.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:27:01.681 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:27:02.158 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:27:02.636 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:27:03.114 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:27:03.592 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:27:04.070 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:27:04.547 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:27:05.025 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:27:05.503 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:27:05.980 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:27:06.458 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:27:06.936 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:27:07.414 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:27:07.892 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:27:08.370 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:27:08.847 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:27:09.325 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:27:09.802 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:27:10.280 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:27:10.758 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:27:11.253 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:27:11.731 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:27:12.209 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:27:12.687 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:27:13.165 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:27:13.643 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:27:14.121 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:27:14.599 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:27:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:27:15.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:15.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:15.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:15.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:15.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:15.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:15.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:15.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:15.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:15.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:15.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:15.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:15.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:15.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:15.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:27:15.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:27:15.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:15.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:15.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:15.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:15.554 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:27:16.032 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:27:16.507 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:27:16.985 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:27:17.463 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:27:17.941 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:27:18.419 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:27:18.897 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:27:19.375 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:27:19.852 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:27:20.331 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:27:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:27:21.287 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:27:21.765 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:27:22.243 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:27:22.722 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:27:23.200 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:27:23.676 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:27:24.155 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:27:24.633 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:27:25.111 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:27:25.590 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:27:26.067 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:27:26.545 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:27:27.023 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:27:27.501 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:27:27.979 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:27:28.457 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:27:28.935 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:27:29.413 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:27:29.891 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:27:30.370 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:27:30.848 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:27:31.326 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:27:31.804 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:27:32.282 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:27:32.759 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:27:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:27:33.715 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:27:34.192 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:27:34.670 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:27:35.148 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:27:35.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:35.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:35.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:35.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:35.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:35.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:35.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:35.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:35.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:35.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:35.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:35.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:35.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:35.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:35.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:27:35.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:27:35.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:35.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:35.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:35.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:35.625 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:27:36.102 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:27:36.579 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:27:37.057 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:27:37.534 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:27:38.012 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:27:38.489 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:27:38.966 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:27:39.444 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:27:39.922 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:27:40.400 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:27:40.878 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:27:41.356 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:27:41.834 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:27:42.312 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:27:42.790 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:27:43.267 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:27:43.744 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:27:44.222 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:27:44.699 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:27:45.176 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:27:45.654 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:27:46.132 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:27:46.609 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:27:47.087 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:27:47.566 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:27:48.044 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:27:48.522 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:27:48.999 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:27:49.477 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:27:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:27:50.432 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:27:50.910 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:27:51.389 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:27:51.866 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:27:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:27:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:27:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:27:53.777 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:27:54.254 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:27:54.732 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:27:55.210 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:27:55.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:55.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:55.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:55.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:55.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:55.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:55.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:55.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:27:55.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:27:55.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:27:55.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:27:55.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:55.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:55.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:55.318 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:27:55.318 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:27:55.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:27:55.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:27:55.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:55.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:27:55.687 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:27:56.166 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:27:56.643 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:27:57.121 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:27:57.600 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:27:58.077 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 02:27:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 02:27:59.032 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 02:27:59.510 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 02:27:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 02:28:00.465 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 02:28:00.942 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 02:28:01.419 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 02:28:01.889 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 02:28:02.358 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 02:28:02.830 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 02:28:03.300 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 02:28:03.772 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 02:28:04.251 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 02:28:04.728 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 02:28:05.206 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 02:28:05.685 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 02:28:06.163 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 02:28:06.641 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 02:28:07.120 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 02:28:07.597 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 02:28:08.075 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 02:28:08.552 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 02:28:09.031 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 02:28:09.509 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 02:28:09.987 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 02:28:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 02:28:10.943 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 02:28:11.421 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 02:28:11.898 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 02:28:12.376 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 02:28:12.854 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 02:28:13.331 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 02:28:13.809 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 02:28:14.288 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 02:28:14.765 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 02:28:15.243 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 02:28:15.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:15.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:15.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:15.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:15.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:15.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:15.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:15.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:15.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:15.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:15.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:15.365 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:28:15.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:20.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:20.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:20.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:20.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:20.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:20.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:20.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:20.378 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:20.378 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:20.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:20.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:28:20.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:28:20.382 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:28:20.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:20.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:20.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:20.383 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:28:20.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:20.383 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:28:20.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:28:20.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:28:20.386 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:20.386 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:20.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:20.386 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:28:20.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:20.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:28:20.388 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:28:20.389 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:28:20.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:20.389 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:20.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:20.389 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:28:20.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:20.389 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:28:20.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:28:20.393 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:28:20.393 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:28:20.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:20.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:20.395 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:20.395 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:28:25.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:25.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:25.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:25.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:25.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:25.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:25.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:25.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:25.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:25.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:25.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:28:25.412 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:28:25.413 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:28:25.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:25.413 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:25.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:25.414 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:28:25.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:25.414 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:28:25.415 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:28:25.415 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:28:25.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:25.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:25.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:25.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:28:25.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:25.416 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:28:25.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:28:25.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:28:25.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:25.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:25.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:25.418 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:28:25.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:25.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:28:25.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:28:25.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:28:25.421 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:28:25.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:25.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:28:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:28:25.953 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:28:25.956 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:28:25.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:25.958 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:28:25.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:25.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:25.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:25.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:25.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:25.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:25.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:26.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:26.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:26.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:26.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:26.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.382 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:28:26.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:26.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:26.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:26.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:26.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:26.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:26.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:26.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:26.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:26.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:26.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:26.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:26.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:26.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:26.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:26.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:26.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:26.857 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:28:27.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:27.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:27.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:27.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.331 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:28:27.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:27.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:27.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:27.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:27.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:27.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:27.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:27.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.805 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:28:27.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:27.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:27.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:27.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:27.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:27.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:27.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:27.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:27.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:27.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:27.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:28.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:28:28.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:28.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:28.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:28.756 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:28:29.233 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:28:29.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:29.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:29.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:29.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:29.711 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:28:30.188 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:28:30.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:30.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:30.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:30.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:30.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:30.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:30.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:30.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:30.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:30.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:30.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:30.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:30.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:30.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:30.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:30.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:30.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:30.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:30.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:30.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:30.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:30.666 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:28:31.143 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:28:31.621 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:28:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:28:32.576 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:28:32.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:32.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:32.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:32.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:32.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:32.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:32.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:32.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:32.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:32.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:32.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:32.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:32.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:32.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:32.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:32.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:32.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:33.053 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:28:33.531 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:28:34.009 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:28:34.487 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:28:34.964 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:28:35.442 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:28:35.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:35.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:35.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:35.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:35.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:35.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:35.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:35.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:35.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:35.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:35.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:35.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:35.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:35.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:35.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:35.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:35.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:35.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:35.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:35.920 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:28:36.398 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:28:36.876 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:28:37.353 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:28:37.832 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:28:38.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:38.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:38.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:38.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:38.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:38.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:38.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:38.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:38.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:38.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:38.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:38.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:38.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:38.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:38.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:38.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:38.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:38.309 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:28:38.786 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:28:39.263 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:28:39.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:28:40.219 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:28:40.696 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:28:40.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:40.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:40.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:40.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:40.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:40.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:40.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:40.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:40.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:40.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:40.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:40.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:40.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:40.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:40.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:40.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:40.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:41.171 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:28:41.649 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:28:42.126 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:28:42.604 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:28:43.082 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:28:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:43.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:43.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:43.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:43.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:43.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:43.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:43.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:43.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:43.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:43.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:43.418 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:28:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:48.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:28:48.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:28:48.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:48.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:48.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:48.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:48.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:28:48.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:48.434 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:48.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:28:48.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:28:48.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:28:48.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:28:48.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:48.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:48.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:28:48.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:28:48.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:28:48.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:28:48.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:28:48.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:28:48.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:48.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:48.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:28:48.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:28:48.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:28:48.444 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:28:48.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:28:48.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:28:48.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:48.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:28:48.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:28:48.448 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:28:48.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:28:48.448 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:28:48.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:28:48.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:28:48.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:28:48.454 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:28:48.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:28:48.942 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:28:48.983 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:28:48.983 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:28:48.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:48.986 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:28:49.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:49.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:49.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:49.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:49.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:49.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:49.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:49.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:49.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:49.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:49.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:49.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:49.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:49.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:49.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:49.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:49.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:28:49.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:49.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:49.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:49.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:49.897 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:28:50.376 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:28:50.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:50.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:50.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:50.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:50.853 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:28:51.331 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:28:51.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:51.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:51.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:51.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:51.809 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:28:52.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:52.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:52.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:52.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:52.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:52.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:52.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:52.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:52.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:52.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:52.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:52.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:52.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:52.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:52.183 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:52.183 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:52.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:52.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:52.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:52.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:52.286 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:28:52.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:52.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:52.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:52.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:52.764 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:28:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:28:53.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:28:53.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:28:53.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:28:53.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:28:53.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:28:54.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:28:54.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:28:55.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:28:55.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:55.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:55.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:55.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:55.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:55.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:55.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:55.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:55.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:55.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:55.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:55.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:55.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:55.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:55.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:55.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:55.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:55.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:55.627 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:28:56.105 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:28:56.579 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:28:57.057 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:28:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:28:58.012 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:28:58.490 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:28:58.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:58.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:58.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:58.620 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:58.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:58.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:58.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:58.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:28:58.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:28:58.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:28:58.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:28:58.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:58.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:58.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:58.647 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:28:58.647 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:28:58.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:28:58.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:28:58.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:58.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:28:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:28:59.442 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:28:59.920 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:29:00.399 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:29:00.876 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:29:01.353 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:29:01.831 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:29:01.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:01.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:01.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:01.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:01.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:01.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:01.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:01.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:01.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:01.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:01.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:01.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:01.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:01.898 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:29:01.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:01.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2871 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:01.900 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:06.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:06.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:06.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:06.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:06.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:06.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:06.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:06.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:06.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:06.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:06.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:29:06.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:29:06.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:29:06.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:06.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:06.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:29:06.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:06.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:29:06.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:29:06.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:29:06.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:06.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:06.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:06.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:29:06.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:06.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:06.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:29:06.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:06.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:29:06.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:29:06.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:29:06.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:29:06.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:06.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:29:07.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:29:07.460 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:29:07.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:07.463 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:29:07.465 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:29:07.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:07.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:07.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:07.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:07.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:07.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:07.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:07.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:07.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:07.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:07.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:07.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:07.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:07.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:07.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:07.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:07.891 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:29:07.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:07.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:07.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:07.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:07.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:07.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:07.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:07.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:07.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:07.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:07.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:07.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:07.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:07.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:07.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:07.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:07.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:07.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:07.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:08.368 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:29:08.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:08.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:08.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:08.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:08.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:08.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:08.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:08.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:08.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:08.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:08.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:08.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:08.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:08.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:08.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:08.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:08.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:08.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:08.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:08.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:08.845 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:29:08.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:08.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:08.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:08.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:09.322 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:29:09.800 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:29:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:09.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:09.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:09.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:10.278 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:29:10.755 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:29:10.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:10.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:10.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:11.233 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:29:11.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:11.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:11.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:11.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:11.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:11.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:11.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:11.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:11.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:11.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:11.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:11.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:11.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:11.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:11.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:11.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:11.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:11.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:11.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:11.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:11.710 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:29:11.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:11.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:11.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:12.188 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:29:12.665 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:29:13.143 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:29:13.621 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:29:14.098 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:29:14.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:14.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:14.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:14.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:14.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:14.427 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:14.427 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:14.427 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:29:19.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:19.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:19.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:19.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:19.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:19.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:19.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:19.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:19.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:19.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:19.440 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:29:19.443 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:29:19.443 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:29:19.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:19.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:19.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:19.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:29:19.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:19.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:19.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:29:19.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:19.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:19.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:29:19.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:19.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:29:19.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:29:19.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:29:19.454 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:29:19.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:19.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:29:19.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:29:19.986 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:29:19.988 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:29:19.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:19.990 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:29:20.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:20.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:20.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:20.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:20.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:20.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:20.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:20.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:20.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:20.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:20.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:20.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:20.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:20.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:20.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:20.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:20.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:29:20.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:20.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:20.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:20.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:20.896 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:29:21.374 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:29:21.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:21.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:21.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:21.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:21.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:21.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:21.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:21.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:21.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:21.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:21.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:21.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:21.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:21.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:21.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:21.429 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:21.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:21.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:21.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:21.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:21.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:21.467 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:21.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:21.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:21.851 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:29:22.329 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:29:22.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:22.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:22.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:22.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:22.807 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:29:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:29:23.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:23.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:23.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:23.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:23.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:23.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:23.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:23.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:23.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:23.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:23.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:23.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:23.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:23.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:23.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:23.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:23.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:23.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:23.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:23.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:23.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:23.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:23.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:23.762 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:29:24.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:29:24.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:24.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:24.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:24.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:24.718 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:29:25.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:29:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:29:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:29:26.630 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:29:27.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:29:27.585 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:29:28.063 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:29:28.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:28.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:28.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:28.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:28.540 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:29:28.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:28.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:28.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:28.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:28.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:28.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:28.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:28.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:28.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:28.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:28.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:28.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:28.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:28.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:28.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:28.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:29.017 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:29:29.495 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:29:29.972 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:29:30.450 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:29:30.927 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:29:31.404 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:29:31.882 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:29:32.360 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:29:32.837 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:29:33.315 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:29:33.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:33.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:33.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:33.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:33.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:33.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:33.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:33.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:33.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:33.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:33.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:33.485 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:33.485 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:29:38.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:38.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:38.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:38.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:38.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:38.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:38.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:38.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:38.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:38.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:38.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:29:38.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:29:38.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:29:38.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:38.510 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:38.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:38.510 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:29:38.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:38.511 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:38.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:29:38.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:38.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:29:38.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:29:38.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:29:38.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:38.515 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:38.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:38.515 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:29:38.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:38.515 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:29:38.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:29:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:29:38.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:29:38.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:29:38.518 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:29:38.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:38.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:29:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:29:39.034 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:29:39.034 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:29:39.035 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:29:39.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:39.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:39.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:39.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:39.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:39.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:39.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:39.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:39.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:39.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:39.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:39.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:39.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:39.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:39.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:29:39.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:39.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:39.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:39.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:39.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:39.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:39.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:39.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:39.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:39.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:39.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:39.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:39.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:39.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:39.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:39.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:39.732 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:39.732 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:39.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:39.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:39.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:39.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:29:40.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:40.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:40.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:40.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:40.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:40.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:40.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:40.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:40.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:40.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:40.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:40.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:40.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:40.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:40.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:40.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:40.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:40.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:40.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:40.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:40.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:40.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:40.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:40.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:40.909 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:29:41.387 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:29:41.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:41.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:41.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:41.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:41.864 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:29:42.342 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:29:42.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:42.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:42.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:42.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:42.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:42.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:42.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:42.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:42.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:42.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:42.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:42.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:42.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:42.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:42.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:42.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:42.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:42.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:42.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:42.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:42.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:42.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:42.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:42.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:29:43.296 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:29:43.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:43.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:43.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:43.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:43.773 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:29:44.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:29:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:29:44.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:44.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:44.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:44.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:44.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:44.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:44.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:44.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:44.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:44.823 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:44.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:44.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:44.823 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:29:49.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:29:49.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:29:49.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:49.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:49.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:49.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:49.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:29:49.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:49.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:49.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:29:49.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:29:49.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:29:49.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:29:49.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:49.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:49.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:29:49.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:29:49.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:29:49.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:29:49.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:29:49.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:29:49.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:49.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:49.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:29:49.840 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:29:49.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:29:49.840 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:29:49.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:29:49.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:29:49.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:49.843 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:29:49.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:29:49.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:29:49.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:29:49.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:29:49.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:29:49.848 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:29:49.848 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:29:49.848 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:29:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:29:50.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:29:50.378 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:29:50.379 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:29:50.380 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:29:50.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:50.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:50.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:50.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:50.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:50.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:50.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:50.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:50.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:50.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:50.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:50.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:50.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:50.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:50.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:50.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:50.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:50.813 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:29:50.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:50.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:50.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:50.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:51.292 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:29:51.770 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:29:51.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:51.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:51.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:51.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:52.248 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:29:52.726 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:29:52.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:52.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:52.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:52.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:52.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:52.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:52.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:52.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:52.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:52.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:52.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:52.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:52.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:52.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:52.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:52.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:52.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:52.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:52.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:52.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:52.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:52.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:52.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:52.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:53.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:29:53.680 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:29:53.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:53.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:53.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:54.158 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:29:54.636 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:29:54.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:29:54.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:29:54.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:29:54.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:29:55.114 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:29:55.593 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:29:55.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:55.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:55.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:55.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:55.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:55.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:55.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:55.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:55.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:55.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:55.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:55.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:55.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:55.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:55.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:55.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:55.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:55.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:55.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:55.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:56.069 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:29:56.547 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:29:57.025 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:29:57.502 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:29:57.980 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:29:58.458 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:29:58.936 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:29:59.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:59.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:59.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:59.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:59.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:59.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:59.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:29:59.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:29:59.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:29:59.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:29:59.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:59.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:59.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:59.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:29:59.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:29:59.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:29:59.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:29:59.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:59.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:29:59.410 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:29:59.888 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:30:00.367 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:30:00.844 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:30:01.322 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:30:01.801 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:30:02.279 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:30:02.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:02.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:02.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:02.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:02.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:02.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:02.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:02.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:02.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:02.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:30:02.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:30:02.609 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:30:02.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:07.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:30:07.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:30:07.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:07.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:07.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:07.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:07.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:07.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:30:07.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:07.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:30:07.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:30:07.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:30:07.625 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:30:07.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:30:07.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:07.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:07.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:30:07.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:30:07.627 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:30:07.630 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:30:07.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:30:07.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:30:07.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:07.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:07.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:30:07.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:30:07.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:30:07.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:30:07.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:30:07.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:30:07.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:07.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:07.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:30:07.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:30:07.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:30:07.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:30:07.638 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:30:07.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:07.643 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:30:08.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:30:08.171 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:30:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.174 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:30:08.176 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:30:08.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:08.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:08.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:08.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:08.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:30:08.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:08.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:08.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:08.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:08.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:08.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:08.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:08.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:08.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:08.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:08.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:08.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:08.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:09.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:30:09.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:09.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:09.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:09.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:09.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:09.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:09.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:09.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:09.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:09.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:09.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:09.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:09.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:09.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:09.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:09.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:09.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:09.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:09.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:09.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:09.552 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:30:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:09.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:09.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:09.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:10.028 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:30:10.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:10.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:10.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:10.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:10.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:10.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:10.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:10.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:10.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:30:10.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:30:10.129 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:30:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:10.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:15.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:30:15.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:30:15.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:15.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:15.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:15.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:15.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:30:15.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:30:15.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:15.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:30:15.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:30:15.147 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:30:15.147 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:30:15.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:30:15.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:15.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:30:15.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:30:15.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:30:15.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:30:15.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:30:15.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:30:15.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:30:15.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:15.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:30:15.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:30:15.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:30:15.150 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:30:15.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:30:15.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:30:15.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:30:15.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:30:15.156 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:30:15.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:30:15.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:30:15.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:30:15.682 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:30:15.684 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:30:15.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:15.687 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:30:15.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:15.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:15.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:15.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:15.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:15.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:15.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:15.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:15.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:15.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:15.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:15.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:15.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:15.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:15.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:15.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:16.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:30:16.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:16.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:16.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:16.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:16.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:30:17.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:30:17.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:17.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:17.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:17.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:17.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:30:18.032 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:30:18.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:18.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:18.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:18.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:18.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:30:18.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:30:19.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:19.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:19.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:19.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:19.466 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:30:19.943 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:30:20.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:30:20.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:30:20.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:30:20.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:30:20.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:30:20.899 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:30:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:30:21.854 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:30:22.331 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:30:22.808 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:30:23.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:30:23.763 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:30:24.241 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:30:24.719 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:30:25.197 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:30:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:30:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:30:26.643 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:30:27.121 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:30:27.599 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:30:28.077 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:30:28.556 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:30:29.033 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:30:29.511 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:30:29.988 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:30:30.466 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:30:30.944 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:30:31.422 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:30:31.900 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:30:32.378 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:30:32.856 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:30:33.333 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:30:33.812 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:30:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:30:34.767 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:30:35.245 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:30:35.723 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:30:36.201 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:30:36.678 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:30:37.157 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:30:37.634 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:30:38.112 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:30:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:30:39.068 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:30:39.546 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:30:40.023 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:30:40.501 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:30:40.979 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:30:41.457 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:30:41.935 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:30:42.413 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:30:42.891 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:30:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:30:43.847 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:30:44.324 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:30:44.802 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:30:45.280 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:30:45.758 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:30:46.236 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:30:46.713 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:30:47.191 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:30:47.669 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:30:48.147 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:30:48.625 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:30:48.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:48.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:48.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:48.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:48.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:48.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:48.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:48.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:30:48.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:30:48.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:30:48.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:30:48.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:48.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:48.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:48.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:30:48.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:30:48.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:30:48.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:30:48.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:48.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:30:49.100 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:30:49.579 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:30:50.057 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:30:50.535 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:30:51.014 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:30:51.492 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:30:51.970 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:30:52.448 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:30:52.927 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:30:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:30:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:30:54.360 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:30:54.838 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:30:55.316 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:30:55.794 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:30:56.272 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:30:56.750 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:30:57.228 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:30:57.706 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:30:58.184 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:30:58.662 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:30:59.140 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:30:59.618 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:31:00.096 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:31:00.574 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:31:01.052 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:31:01.530 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:31:02.008 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:31:02.486 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:31:02.964 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:31:03.442 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:31:03.921 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:31:04.398 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:31:04.876 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:31:05.354 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:31:05.832 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:31:06.310 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:31:06.788 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:31:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:31:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:31:08.222 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:31:08.700 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:31:09.178 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:31:09.655 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:31:10.134 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:31:10.611 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:31:11.090 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:31:11.567 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:31:12.045 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:31:12.523 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:31:13.000 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:31:13.479 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:31:13.957 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:31:14.435 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:31:14.914 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:31:15.392 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:31:15.870 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:31:16.348 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:31:16.826 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:31:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:31:17.782 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:31:18.260 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:31:18.738 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 02:31:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 02:31:19.695 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 02:31:20.173 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 02:31:20.651 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 02:31:21.129 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 02:31:21.606 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 02:31:22.084 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 02:31:22.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:22.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:31:22.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:22.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:22.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:22.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:22.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:31:22.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:22.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:22.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:31:22.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:31:22.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:22.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:31:22.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:31:22.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:31:22.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:31:22.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:31:22.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:31:22.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:22.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:22.561 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 02:31:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 02:31:23.516 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 02:31:23.994 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 02:31:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 02:31:24.950 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 02:31:25.428 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 02:31:25.906 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 02:31:26.383 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 02:31:26.861 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 02:31:27.339 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 02:31:27.816 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 02:31:28.294 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 02:31:28.772 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 02:31:29.250 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 02:31:29.728 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 02:31:30.206 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 02:31:30.683 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 02:31:31.161 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 02:31:31.640 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 02:31:32.117 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 02:31:32.595 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 02:31:33.073 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 02:31:33.551 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 02:31:34.029 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 02:31:34.507 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 02:31:34.985 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 02:31:35.464 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 02:31:35.942 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 02:31:36.419 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 02:31:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 02:31:37.376 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 02:31:37.854 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 02:31:38.332 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 02:31:38.810 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 02:31:39.287 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 02:31:39.765 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 02:31:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 02:31:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 02:31:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 02:31:41.677 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 02:31:42.154 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 02:31:42.631 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 02:31:43.109 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 02:31:43.587 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 02:31:44.065 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 02:31:44.542 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-23 02:31:45.020 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-23 02:31:45.497 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-01-23 02:31:45.975 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-01-23 02:31:46.453 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-01-23 02:31:46.931 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-01-23 02:31:47.408 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-01-23 02:31:47.887 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-01-23 02:31:48.364 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-01-23 02:31:48.842 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-01-23 02:31:49.320 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-01-23 02:31:49.798 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-01-23 02:31:50.276 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-01-23 02:31:50.754 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-01-23 02:31:51.231 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-01-23 02:31:51.709 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-01-23 02:31:52.187 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-01-23 02:31:52.665 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-01-23 02:31:53.143 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-01-23 02:31:53.620 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-01-23 02:31:54.098 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-01-23 02:31:54.576 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-01-23 02:31:55.053 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-01-23 02:31:55.532 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-01-23 02:31:56.009 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-01-23 02:31:56.487 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-01-23 02:31:56.965 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-01-23 02:31:57.443 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-01-23 02:31:57.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:57.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:31:57.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:57.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:57.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:57.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:57.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:31:57.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:31:57.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:31:57.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:31:57.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:31:57.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:57.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:31:57.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:31:57.864 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:31:57.864 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:31:57.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:31:57.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:31:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:57.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:31:57.920 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-01-23 02:31:58.399 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-01-23 02:31:58.877 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-01-23 02:31:59.355 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-01-23 02:31:59.833 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-01-23 02:32:00.310 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-01-23 02:32:00.789 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-01-23 02:32:01.266 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-01-23 02:32:01.745 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-01-23 02:32:02.223 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-01-23 02:32:02.701 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-01-23 02:32:03.179 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-01-23 02:32:03.657 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-01-23 02:32:04.136 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-01-23 02:32:04.613 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-01-23 02:32:05.092 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-01-23 02:32:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-01-23 02:32:06.048 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-01-23 02:32:06.526 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-01-23 02:32:07.003 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-01-23 02:32:07.481 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-01-23 02:32:07.960 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-01-23 02:32:08.437 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-01-23 02:32:08.915 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-01-23 02:32:09.392 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-01-23 02:32:09.870 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-01-23 02:32:10.348 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-01-23 02:32:10.825 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-01-23 02:32:11.304 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-01-23 02:32:11.782 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-01-23 02:32:12.259 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-01-23 02:32:12.738 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-01-23 02:32:13.216 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-01-23 02:32:13.694 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-01-23 02:32:14.171 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-01-23 02:32:14.648 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-01-23 02:32:15.127 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-01-23 02:32:15.606 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-01-23 02:32:16.083 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-01-23 02:32:16.560 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-01-23 02:32:17.039 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-01-23 02:32:17.517 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-01-23 02:32:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-01-23 02:32:18.474 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-01-23 02:32:18.952 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-01-23 02:32:19.430 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-01-23 02:32:19.907 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-01-23 02:32:20.386 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-01-23 02:32:20.865 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-01-23 02:32:21.343 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-01-23 02:32:21.822 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-01-23 02:32:22.300 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-01-23 02:32:22.778 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-01-23 02:32:23.256 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-01-23 02:32:23.733 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-01-23 02:32:24.211 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-01-23 02:32:24.690 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-01-23 02:32:25.168 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-01-23 02:32:25.646 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-01-23 02:32:26.125 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-01-23 02:32:26.603 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-01-23 02:32:27.082 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-01-23 02:32:27.560 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-01-23 02:32:28.037 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-01-23 02:32:28.515 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-01-23 02:32:28.992 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-01-23 02:32:29.470 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-01-23 02:32:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-01-23 02:32:30.427 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-01-23 02:32:30.904 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-01-23 02:32:31.383 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-01-23 02:32:31.860 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-01-23 02:32:32.337 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-01-23 02:32:32.816 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-01-23 02:32:33.294 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-01-23 02:32:33.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:33.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:33.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:33.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:33.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:33.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:33.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:33.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:33.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:33.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:33.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:33.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:32:33.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:32:33.385 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:32:33.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:33.386 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.386 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.386 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.386 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.386 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.387 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.387 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:33.387 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=29499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:38.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:32:38.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:32:38.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:38.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:38.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:38.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:38.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:38.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:32:38.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:38.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:32:38.398 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:32:38.400 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:32:38.400 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:32:38.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:32:38.401 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:38.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:38.401 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:32:38.401 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:32:38.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:32:38.403 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:32:38.403 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:32:38.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:32:38.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:38.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:38.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:32:38.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:32:38.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:32:38.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:32:38.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:32:38.405 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:32:38.407 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:32:38.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:32:38.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:32:38.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:32:38.407 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:32:38.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:32:38.408 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:32:38.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:38.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:32:38.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:32:38.410 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:32:43.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:32:43.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:32:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:43.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:43.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:43.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:43.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:32:43.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:43.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:32:43.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:32:43.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:32:43.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:32:43.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:32:43.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:43.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:43.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:32:43.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:32:43.435 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:32:43.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:32:43.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:32:43.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:32:43.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:43.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:43.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:32:43.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:32:43.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:32:43.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:32:43.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:32:43.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:32:43.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:32:43.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:43.444 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:32:43.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:32:43.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:32:43.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:32:43.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:32:43.450 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:32:43.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:32:43.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:32:43.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:32:43.939 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:32:43.981 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:32:43.982 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:32:43.983 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:32:43.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:44.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:44.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:44.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:44.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:44.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:44.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:44.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:44.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:44.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:44.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:44.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:32:44.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:32:44.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:44.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:44.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:44.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:44.415 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:32:44.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:44.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:44.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:44.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:44.893 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:32:45.371 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:32:45.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:45.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:45.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:45.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:45.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:45.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:45.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:45.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:45.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:45.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:45.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:45.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:45.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:45.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:45.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:45.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:45.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:45.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:45.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:32:45.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:32:45.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:45.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:45.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:45.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:45.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:32:46.325 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:32:46.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:46.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:46.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:46.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:46.803 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:32:47.281 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:32:47.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:47.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:47.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:47.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:47.759 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:32:47.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:47.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:47.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:47.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:47.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:47.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:47.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:47.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:47.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:47.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:47.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:47.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:47.941 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:47.941 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:32:47.941 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:32:47.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:47.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:47.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:47.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:48.235 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:32:48.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:48.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:48.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:48.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:48.712 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:32:49.190 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:32:49.668 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:32:50.146 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:32:50.624 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:32:51.101 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:32:51.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:51.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:51.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:51.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:51.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:51.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:51.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:51.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:51.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:51.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:32:51.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:51.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:51.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:51.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:51.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:32:51.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:32:51.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:32:51.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:32:51.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:51.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:51.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:32:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:32:52.533 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:32:53.010 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:32:53.487 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:32:53.965 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:32:54.444 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:32:54.922 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:32:55.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:32:55.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:32:55.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:32:55.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:32:55.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:32:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:32:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:32:55.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:32:55.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:32:55.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:32:55.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:32:55.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:32:55.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:32:55.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:32:55.016 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:32:55.016 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:33:00.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:33:00.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:33:00.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:33:00.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:33:00.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:33:00.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:33:00.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:33:00.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:33:00.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:33:00.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:33:00.031 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:33:00.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:33:00.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:33:00.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:33:00.034 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:33:00.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:33:00.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:33:00.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:33:00.034 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:33:00.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:33:00.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:33:00.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:33:00.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:33:00.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:33:00.037 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:33:00.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:33:00.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:33:00.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:33:00.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:33:00.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:33:00.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:33:00.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:33:00.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:33:00.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:33:00.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:33:00.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:33:00.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:33:00.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:33:00.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:33:00.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.045 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:33:00.045 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:33:00.045 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:33:00.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:33:00.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:33:00.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:33:00.576 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:33:00.576 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:33:00.578 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:33:00.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:00.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:00.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:00.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:00.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:00.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:00.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:00.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:00.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:00.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:00.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:00.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:33:00.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:33:00.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:00.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:00.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:00.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:01.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:33:01.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:33:01.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:33:01.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:33:01.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:33:01.488 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:33:01.966 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:33:02.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:33:02.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:33:02.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:33:02.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:33:02.444 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:33:02.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:33:03.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:33:03.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:33:03.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:33:03.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:33:03.399 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:33:03.877 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:33:04.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:33:04.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:33:04.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:33:04.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:33:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:33:04.832 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:33:05.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:33:05.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:33:05.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:33:05.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:33:05.310 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:33:05.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:33:06.265 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:33:06.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:33:07.220 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:33:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:33:08.175 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:33:08.653 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:33:09.131 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:33:09.609 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:33:10.087 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:33:10.564 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:33:11.042 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:33:11.520 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:33:11.998 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:33:12.475 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:33:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:33:13.430 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:33:13.908 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:33:14.385 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:33:14.863 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:33:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:33:15.819 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:33:16.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:16.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:16.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:16.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:16.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:16.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:16.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:16.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:16.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:16.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:16.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:16.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:16.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:16.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:16.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:33:16.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:33:16.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:16.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:16.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:16.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:33:16.775 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:33:17.253 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:33:17.731 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:33:18.209 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:33:18.686 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:33:19.164 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:33:19.642 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:33:20.119 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:33:20.597 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:33:21.074 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:33:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:33:22.029 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:33:22.507 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:33:22.985 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:33:23.463 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:33:23.941 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:33:24.420 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:33:24.897 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:33:25.376 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:33:25.853 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:33:26.331 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:33:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:33:27.287 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:33:27.766 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:33:28.244 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:33:28.722 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:33:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:33:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:33:30.156 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:33:30.634 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:33:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:33:31.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:31.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:31.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:31.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:31.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:31.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:31.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:31.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:31.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:31.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:31.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:31.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:31.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:31.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:31.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:33:31.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:33:31.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:31.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:31.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:31.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:31.589 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:33:32.066 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:33:32.546 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:33:33.024 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:33:33.501 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:33:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:33:34.456 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:33:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:33:35.410 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:33:35.888 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:33:36.365 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:33:36.843 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:33:37.321 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:33:37.798 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:33:38.277 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:33:38.754 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:33:39.232 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:33:39.710 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:33:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:33:40.665 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:33:41.143 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:33:41.621 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:33:42.098 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:33:42.577 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:33:43.054 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:33:43.532 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:33:44.010 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:33:44.488 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:33:44.965 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:33:45.443 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:33:45.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:45.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:45.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:45.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:45.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:45.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:45.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:45.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:33:45.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:33:45.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:33:45.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:33:45.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:45.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:45.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:45.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:33:45.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:33:45.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:33:45.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:33:45.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:45.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:33:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:33:46.397 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:33:46.875 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:33:47.354 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:33:47.831 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:33:48.309 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:33:48.786 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:33:49.264 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:33:49.741 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:33:50.219 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:33:50.697 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:33:51.174 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:33:51.652 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:33:52.130 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:33:52.608 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:33:53.085 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:33:53.562 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:33:54.040 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:33:54.518 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:33:54.995 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:33:55.473 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:33:55.951 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:33:56.428 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:33:56.906 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:33:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:33:57.861 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:33:58.329 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:33:58.798 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:33:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:33:59.736 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:34:00.211 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:34:00.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:00.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:00.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:00.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:00.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:00.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:00.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:00.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:00.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:00.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:00.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:00.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:00.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:00.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:00.612 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:34:05.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:05.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:05.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:05.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:05.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:05.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:05.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:05.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:05.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:05.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:05.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:34:05.627 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:34:05.627 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:34:05.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:05.627 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:05.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:05.628 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:34:05.628 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:05.628 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:34:05.630 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:34:05.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:34:05.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:05.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:05.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:05.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:34:05.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:05.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:34:05.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:34:05.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:34:05.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:05.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:05.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:05.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:34:05.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:05.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:34:05.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:34:05.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:34:05.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:34:05.638 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:34:05.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:05.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:05.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:05.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:05.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:05.641 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:34:10.645 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:10.645 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:10.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:10.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:10.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:10.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:10.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:10.658 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:10.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:10.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:10.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:34:10.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:34:10.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:34:10.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:10.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:10.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:10.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:34:10.662 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:10.662 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:34:10.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:34:10.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:34:10.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:10.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:10.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:10.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:34:10.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:10.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:10.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:34:10.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:10.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:34:10.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:34:10.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:34:10.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:34:10.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:34:10.669 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:34:10.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:10.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:34:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:34:11.197 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:34:11.199 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:34:11.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:11.201 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:34:11.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:11.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:11.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:11.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:11.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:11.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:11.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:11.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:11.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:11.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:11.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:11.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:11.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:11.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:11.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:11.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:11.634 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:34:11.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:11.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:11.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:11.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:12.112 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:34:12.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:34:12.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:12.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:12.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:12.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:13.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:34:13.545 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:34:13.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:13.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:13.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:13.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:14.023 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:34:14.501 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:34:14.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:14.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:14.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:14.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:14.979 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:34:15.456 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:34:15.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:15.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:15.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:15.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:15.933 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:34:16.411 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:34:16.889 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:34:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:34:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:34:18.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:34:18.798 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:34:19.276 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:34:19.753 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:34:20.231 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:34:20.709 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:34:21.186 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:34:21.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:21.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:21.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:21.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:21.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:21.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:21.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:21.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:21.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:21.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:21.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:21.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:21.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:21.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:21.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:21.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:21.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:21.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:21.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:34:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:34:22.619 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:34:23.097 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:34:23.574 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:34:24.052 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:34:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:34:25.008 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:34:25.486 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:34:25.964 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:34:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:34:26.920 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:34:27.398 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:34:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:34:28.354 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:34:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:34:29.310 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:34:29.788 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:34:30.266 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:34:30.744 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:34:31.222 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:34:31.701 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:34:31.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:31.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:31.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:31.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:31.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:31.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:31.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:31.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:31.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:31.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:31.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:31.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:31.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:31.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:31.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:31.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:31.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:31.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:31.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:31.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:32.177 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:34:32.655 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:34:33.132 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:34:33.610 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:34:34.088 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:34:34.565 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:34:35.043 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:34:35.520 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:34:35.998 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:34:36.475 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:34:36.953 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:34:37.430 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:34:37.908 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:34:38.385 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:34:38.862 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:34:38.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:38.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:38.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:38.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:38.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:38.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:38.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:38.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:38.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:38.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:38.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:38.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:38.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:38.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:38.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:38.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:38.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:38.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:38.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:38.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:39.338 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:34:39.816 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:34:40.294 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:34:40.772 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:34:41.249 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:34:41.727 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:34:42.204 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:34:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:34:43.160 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:34:43.638 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:34:44.115 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:34:44.593 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:34:45.070 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:34:45.549 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:34:46.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:46.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:46.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:46.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:46.026 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:34:46.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:46.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:46.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:46.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:46.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:46.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:46.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:46.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:46.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:46.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:46.035 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:34:51.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:51.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:51.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:51.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:51.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:51.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:51.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:51.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:51.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:51.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:51.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:34:51.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:34:51.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:34:51.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:51.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:51.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:51.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:34:51.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:51.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:34:51.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:34:51.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:34:51.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:51.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:51.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:51.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:34:51.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:51.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:51.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:34:51.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:51.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:34:51.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:34:51.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:34:51.066 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:34:51.066 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:51.071 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:34:51.554 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:34:51.596 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:34:51.598 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:34:51.600 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:34:51.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:51.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:51.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:51.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:51.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:51.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:51.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:51.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:51.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:51.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:51.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:51.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:51.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:51.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:51.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:51.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:51.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:52.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.031 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:34:52.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:52.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:52.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:52.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:52.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:52.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:52.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:52.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:52.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:52.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:52.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:52.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:52.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:52.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.507 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:34:52.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:52.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:52.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:52.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:52.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:52.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:52.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:52.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:52.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:52.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:52.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:52.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:52.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:34:53.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:53.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:53.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:53.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:53.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:53.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:53.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:53.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:53.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:53.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:53.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:53.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:53.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:53.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:53.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:53.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:53.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:53.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:53.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:53.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:53.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:53.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:53.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:53.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:53.460 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:34:53.938 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:34:54.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:54.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:54.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:54.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:54.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:54.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:54.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:54.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:54.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:34:54.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:34:54.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:34:54.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:34:54.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:54.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:54.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:54.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:54.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:54.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:54.274 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:54.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:34:59.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:34:59.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:34:59.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:59.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:59.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:59.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:59.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:34:59.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:59.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:59.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:34:59.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:34:59.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:34:59.297 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:34:59.297 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:59.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:59.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:34:59.298 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:34:59.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:34:59.299 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:34:59.300 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:34:59.300 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:34:59.300 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:59.300 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:59.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:34:59.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:34:59.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:34:59.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:34:59.303 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:34:59.303 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:34:59.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:59.304 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:34:59.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:34:59.304 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:34:59.304 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:34:59.304 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:34:59.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:34:59.308 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:34:59.308 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:34:59.308 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:34:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:34:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:34:59.313 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:34:59.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:34:59.844 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:34:59.846 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:34:59.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:59.849 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:34:59.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:59.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:59.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:59.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:34:59.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:34:59.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:34:59.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:34:59.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:59.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:59.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:59.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:34:59.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:34:59.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:34:59.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:34:59.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:34:59.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:00.274 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:35:00.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:00.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:00.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:00.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:00.752 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:35:01.230 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:35:01.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:01.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:01.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:01.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:01.708 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:35:02.186 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:35:02.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:02.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:02.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:02.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:02.664 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:35:03.142 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:35:03.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:03.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:03.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:03.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:03.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:03.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:03.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:03.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:03.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:03.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:03.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:03.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:03.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:03.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:03.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:03.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:03.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:03.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:03.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:03.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:03.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:03.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:03.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:03.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:03.620 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:35:04.098 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:35:04.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:04.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:04.576 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:35:05.055 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:35:05.533 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:35:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:35:06.490 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:35:06.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:06.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:06.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:06.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:06.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:06.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:06.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:06.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:06.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:06.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:06.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:06.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:06.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:06.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:06.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:06.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:06.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:06.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:06.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:06.965 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:35:07.442 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:35:07.920 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:35:08.397 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:35:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:35:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:35:09.831 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:35:10.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:10.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:10.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:10.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:10.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:10.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:10.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:10.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:10.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:10.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:10.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:10.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:10.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:10.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:10.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:10.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:10.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:10.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:10.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:10.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:10.307 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:35:10.785 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:35:11.263 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:35:11.740 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:35:12.219 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:35:12.696 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:35:13.175 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:35:13.653 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:35:13.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:13.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:13.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:13.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:13.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:13.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:13.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:13.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:13.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:13.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:13.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:13.985 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:35:13.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:18.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:18.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:18.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:18.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:18.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:18.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:19.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:19.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:19.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:19.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:19.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:35:19.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:35:19.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:35:19.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:19.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:19.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:19.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:35:19.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:19.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:35:19.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:35:19.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:35:19.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:19.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:19.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:19.008 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:35:19.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:19.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:19.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:35:19.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:19.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:35:19.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:35:19.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:35:19.013 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:35:19.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:19.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:35:19.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:35:19.538 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:35:19.539 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:35:19.540 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:35:19.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:19.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:19.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:19.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:19.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:19.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:19.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:19.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:19.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:19.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:19.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:19.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:19.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:19.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:19.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:19.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:19.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:19.979 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:35:20.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:20.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:20.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:20.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:20.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:20.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:20.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:20.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:20.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:20.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:20.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:20.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:20.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:20.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:20.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.456 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:35:20.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:20.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:20.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:20.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:20.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:20.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:20.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:20.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:20.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:20.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:20.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:20.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:20.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:20.933 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:35:21.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:21.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:21.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:21.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:21.412 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:35:21.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:21.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:21.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:21.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:21.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:21.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:21.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:21.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:21.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:21.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:21.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:21.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:21.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:21.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:21.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:21.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:21.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:21.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:21.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:21.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:21.889 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:35:22.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:22.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:22.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:22.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:22.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:35:22.845 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:35:22.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:22.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:22.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:22.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:22.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:22.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:22.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:22.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:22.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:22.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:22.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:22.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:22.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:22.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:22.944 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:35:27.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:27.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:27.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:27.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:27.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:27.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:27.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:27.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:27.957 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:27.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:27.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:35:27.961 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:35:27.961 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:35:27.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:27.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:27.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:27.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:35:27.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:27.962 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:35:27.964 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:35:27.964 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:35:27.964 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:27.964 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:27.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:27.965 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:35:27.965 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:27.965 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:27.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:35:27.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:27.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:35:27.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.970 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:35:27.970 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:35:27.970 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:35:27.970 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.971 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:27.975 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:35:28.460 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:35:28.496 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:35:28.497 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:35:28.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:28.498 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:35:28.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:28.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:28.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:28.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:28.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:28.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:28.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:28.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:28.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:28.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:28.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:28.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:28.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:28.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:28.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:28.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:28.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:35:28.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:28.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:28.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:28.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:29.416 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:35:29.894 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:35:29.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:29.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:29.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:29.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:30.371 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:35:30.850 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:35:30.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:30.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:30.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:30.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:31.327 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:35:31.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:31.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:31.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:31.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:31.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:31.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:31.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:31.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:31.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:31.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:31.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:31.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:31.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:31.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:31.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:31.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:31.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:31.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:31.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:31.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:31.803 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:35:31.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:31.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:31.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:31.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:32.281 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:35:32.759 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:35:32.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:32.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:32.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:32.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:35:33.716 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:35:34.194 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:35:34.672 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:35:35.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:35:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:35:36.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:36.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:36.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:36.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:36.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:36.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:36.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:36.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:36.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:36.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:36.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:36.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:36.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:36.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:36.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:36.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:36.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:36.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:36.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:36.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:36.106 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:35:36.583 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:35:37.061 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:35:37.539 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:35:38.017 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:35:38.495 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:35:38.973 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:35:39.451 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:35:39.929 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:35:40.406 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:35:40.884 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:35:41.362 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:35:41.840 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:35:42.317 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:35:42.795 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:35:42.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:42.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:42.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:42.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:42.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:42.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:42.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:42.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:42.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:42.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:42.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:42.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:42.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:42.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:42.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:42.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:43.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:43.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:43.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:43.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:43.271 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:35:43.750 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:35:44.227 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:35:44.701 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:35:45.179 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:35:45.658 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:35:46.136 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:35:46.614 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:35:47.092 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:35:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:35:48.049 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:35:48.527 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:35:49.004 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:35:49.483 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:35:49.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:49.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:49.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:49.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:49.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:49.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:49.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:49.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:49.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:49.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:49.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:49.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:49.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:49.821 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:35:49.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:49.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:35:54.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:35:54.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:35:54.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:54.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:54.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:54.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:54.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:35:54.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:54.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:54.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:35:54.833 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:35:54.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:35:54.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:35:54.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:54.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:54.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:35:54.838 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:35:54.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:35:54.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:35:54.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:35:54.840 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:35:54.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:54.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:54.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:35:54.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:35:54.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:35:54.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:35:54.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:35:54.843 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:35:54.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:54.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:35:54.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:35:54.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:35:54.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:35:54.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:35:54.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:35:54.848 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:35:54.848 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:35:54.848 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:35:54.853 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:35:55.336 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:35:55.384 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:35:55.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:55.387 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:35:55.389 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:35:55.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:55.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:55.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:55.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:55.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:55.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:55.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:55.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:55.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:55.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:55.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:55.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:55.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:55.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:55.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:55.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:55.813 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:35:55.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:55.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:55.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:55.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:56.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:35:56.768 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:35:56.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:56.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:56.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:56.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:57.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:57.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:57.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:57.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:35:57.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:57.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:57.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:57.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:35:57.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:35:57.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:35:57.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:35:57.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:57.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:57.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:57.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:35:57.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:35:57.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:35:57.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:35:57.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:57.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:35:57.722 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:35:57.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:57.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:57.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:57.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:58.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:35:58.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:35:58.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:58.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:58.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:58.856 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:35:59.157 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:35:59.635 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:35:59.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:35:59.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:35:59.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:35:59.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:00.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:00.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:00.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:00.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:00.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:00.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:00.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:36:00.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:00.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:00.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:36:00.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:00.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:00.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:36:00.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:36:00.069 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:36:00.069 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:36:00.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:36:00.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:36:00.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:00.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:36:00.591 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:36:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:36:01.547 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:36:02.025 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:36:02.503 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:36:02.981 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:36:03.459 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:36:03.936 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:36:04.414 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:36:04.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:04.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:04.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:04.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:04.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:04.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:04.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:36:04.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:04.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:04.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:36:04.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:04.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:04.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:36:04.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:36:04.603 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:36:04.603 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:36:04.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:36:04.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:36:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:04.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:04.890 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:36:05.369 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:36:05.846 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:36:06.325 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:36:06.803 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:36:07.282 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:36:07.759 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:36:08.237 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:36:08.714 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:36:09.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:36:09.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:09.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:36:09.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:36:09.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:09.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:09.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:09.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:09.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:09.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:09.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:09.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:09.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:09.054 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:09.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:09.055 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.055 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.055 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.055 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.055 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3032 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:09.056 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:14.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:14.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:14.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:14.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:14.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:14.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:14.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:14.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:14.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:14.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:14.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:14.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:14.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:14.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:14.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:14.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:14.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:14.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:14.071 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:14.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:14.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:14.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:14.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:14.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:14.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:14.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:14.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:14.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:14.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:14.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:14.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:14.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:14.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:14.079 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:14.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:14.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:14.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:14.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:14.608 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:14.610 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:14.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.614 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:14.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:14.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:15.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:15.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:15.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:15.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:15.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:15.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:15.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:15.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:15.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:15.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:15.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:15.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:15.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:15.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:15.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:15.952 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.952 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:15.953 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:20.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:20.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:20.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:20.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:20.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:20.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:20.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:20.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:20.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:20.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:20.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:20.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:20.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:20.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:20.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:20.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:20.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:20.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:20.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:20.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:20.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:20.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:20.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:20.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:20.978 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:20.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:20.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:20.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:20.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:20.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:20.980 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:20.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:20.980 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:20.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:20.980 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:20.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:20.984 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:20.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:20.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:20.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:20.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:21.472 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:21.517 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:21.519 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:21.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.521 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:21.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:21.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:21.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:21.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:21.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:22.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:22.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:22.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:22.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:22.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:22.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:22.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:22.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:22.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:22.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:22.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:22.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:22.877 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:22.877 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=408 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:27.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:27.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:27.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:27.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:27.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:27.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:27.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:27.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:27.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:27.894 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:27.894 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:27.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:27.899 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:27.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:27.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:27.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:27.900 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:27.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:27.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:27.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:27.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:27.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:27.904 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:27.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:27.904 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:27.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:27.905 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:27.906 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:27.906 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:27.906 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:27.906 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:27.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:27.906 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:27.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:27.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:27.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:27.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:27.911 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:27.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:27.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:28.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:28.433 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:28.435 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:28.437 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:28.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:28.869 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:28.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:28.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:28.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:28.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:29.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:29.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:29.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:29.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:29.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:29.743 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:34.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:34.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:34.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:34.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:34.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:34.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:34.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:34.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:34.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:34.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:34.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:34.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:34.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:34.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:34.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:34.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:34.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:34.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:34.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:34.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:34.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:34.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.773 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:34.773 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:34.774 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:34.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:34.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:34.778 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:35.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:35.300 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:35.302 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:35.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.304 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:35.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:35.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:35.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:35.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:35.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.215 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:36.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:36.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:36.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:36.630 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:36.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:36.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:41.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:41.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:41.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:41.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:41.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:41.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:41.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:41.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:41.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:41.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:41.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:41.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:41.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:41.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:41.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:41.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:41.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:41.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:41.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:41.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:41.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:41.664 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:41.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:41.664 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:41.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:41.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:41.667 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:41.667 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:41.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:41.668 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:41.668 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:41.668 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:41.668 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:41.668 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:41.672 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:41.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:41.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:41.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:41.672 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.673 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:41.673 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:41.674 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:41.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:41.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:41.678 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:42.207 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:42.209 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:42.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.212 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:42.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:42.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:42.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:42.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:42.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:42.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:42.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:42.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.108 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:43.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:43.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:43.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:43.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:43.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:43.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:43.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:43.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:43.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:43.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:43.526 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:43.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:43.526 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.526 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.526 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.527 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:43.528 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:48.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:48.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:48.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:48.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:48.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:48.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:48.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:48.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:48.539 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:48.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:48.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:48.542 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:48.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:48.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:48.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:48.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:48.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:48.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:48.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:48.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:48.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:48.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:48.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:48.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:48.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:48.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:48.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:48.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:48.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:48.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:48.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:48.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:48.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:48.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:48.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.552 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:48.552 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:48.553 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:48.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:48.557 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:49.041 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:49.081 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:49.083 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:49.085 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:49.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:49.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:49.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:49.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:49.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:49.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:49.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:49.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:50.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:50.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:50.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:50.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:50.441 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:50.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:36:55.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:55.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:55.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:55.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:55.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:55.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:55.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:55.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:55.456 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:55.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:36:55.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:36:55.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:36:55.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:36:55.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:55.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:55.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:55.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:36:55.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:36:55.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:55.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:36:55.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:36:55.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:55.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:36:55.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:36:55.463 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.466 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:36:55.466 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:36:55.466 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:36:55.467 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:36:55.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:55.471 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:36:55.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:36:55.993 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:36:55.995 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:36:55.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:55.998 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:36:56.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:36:56.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.430 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:36:56.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:56.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:56.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:56.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:56.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:36:56.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:56.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:36:57.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:36:57.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:36:57.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:36:57.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:36:57.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:36:57.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:36:57.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:36:57.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:36:57.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:36:57.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:36:57.331 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:02.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:02.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:02.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:02.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:02.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:02.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:02.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:02.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:02.349 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:02.352 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:02.352 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:02.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:02.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:02.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:02.353 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:02.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:02.353 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:02.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:02.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:02.354 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:02.356 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:02.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:02.356 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:02.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:02.359 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:02.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:02.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:02.887 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:02.889 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:02.889 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:02.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:02.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:02.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:02.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:02.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:02.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:02.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:02.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:02.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:02.967 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:02.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:02.967 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:07.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:07.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:07.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:07.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:07.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:07.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:07.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:07.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:07.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:07.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:07.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:07.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:07.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:07.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:07.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:07.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:07.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:07.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:07.985 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:07.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:07.986 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:07.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:07.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:07.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:07.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:07.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:07.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:07.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:07.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:07.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:07.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:07.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:07.993 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:07.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:07.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:08.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:08.526 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:08.528 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:08.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.530 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:08.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:08.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:08.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:08.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:08.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:08.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:08.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:08.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:08.648 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:13.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:13.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:13.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:13.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:13.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:13.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:13.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:13.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:13.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:13.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:13.661 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:13.663 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:13.663 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:13.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:13.664 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:13.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:13.664 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:13.664 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:13.664 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:13.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:13.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:13.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:13.667 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:13.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:13.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:13.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:13.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:13.669 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:13.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:13.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:13.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:13.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:13.670 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:13.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:13.670 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:13.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:13.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:13.675 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:13.675 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:14.163 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:14.196 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:14.197 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:14.198 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:14.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:14.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:14.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:14.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:14.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:14.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:14.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:14.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:14.298 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:14.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:14.298 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:19.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:19.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:19.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:19.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:19.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:19.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:19.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:19.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:19.309 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:19.309 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:19.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:19.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:19.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:19.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:19.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:19.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:19.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:19.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:19.310 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:19.311 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:19.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:19.311 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:19.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:19.311 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:19.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:19.311 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:19.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:19.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:19.312 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:19.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:19.314 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:19.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:19.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:19.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:19.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:19.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:19.832 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:19.833 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:19.834 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:19.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:19.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:19.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:19.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:19.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:19.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:19.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:19.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:19.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:19.897 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:19.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:24.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:24.900 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:24.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:24.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:24.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:24.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:24.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:24.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:24.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:24.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:24.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:24.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:24.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:24.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:24.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:24.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:24.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:24.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:24.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:24.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:24.921 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:24.923 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:24.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:24.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:24.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:24.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:24.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:24.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:24.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:25.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:25.447 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:25.449 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:25.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.450 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:25.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:25.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:25.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:25.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:25.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:25.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:25.525 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:30.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:30.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:30.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:30.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:30.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:30.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:30.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:30.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:30.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:30.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:30.543 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:30.548 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:30.548 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:30.548 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:30.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:30.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:30.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:30.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:30.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:30.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:30.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:30.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:30.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:30.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:30.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:30.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:30.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:30.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:30.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:30.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:30.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:30.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:30.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:30.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:30.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:30.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:30.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:30.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:30.558 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:30.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:30.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:30.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:30.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:30.563 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:31.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:31.089 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:31.091 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:31.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.093 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:31.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:31.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:31.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:31.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:31.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:31.216 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:31.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:36.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:36.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:36.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:36.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:36.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:36.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:36.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:36.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:36.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:36.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:36.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:36.237 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:36.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:36.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:36.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:36.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:36.239 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:36.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:36.240 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:36.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:36.242 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:36.243 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:36.243 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:36.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:36.244 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:36.244 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:36.244 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:36.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:36.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:36.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:36.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:36.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:36.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:36.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:36.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.250 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:36.251 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:36.251 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:36.251 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:36.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.256 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:36.740 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:36.774 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:36.775 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:36.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.776 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:36.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:36.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:36.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:36.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:36.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:36.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:36.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:36.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:36.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:36.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:36.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:36.864 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:36.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:41.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:41.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:41.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:41.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:41.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:41.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:41.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:41.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:41.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:41.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:41.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:41.887 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:41.888 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:41.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:41.888 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:41.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:41.889 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:41.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:41.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:41.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:41.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:41.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:41.892 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:41.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:41.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:41.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:41.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:41.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:41.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:41.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:41.897 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:41.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:41.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:41.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:41.897 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:41.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:41.898 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:41.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:41.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:42.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:42.429 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:42.431 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:42.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:42.434 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:42.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:42.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:42.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:37:42.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:42.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:42.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:42.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:37:42.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:37:42.864 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:37:42.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:42.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:42.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:42.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:43.342 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:37:43.820 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:37:43.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:43.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:43.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:44.298 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:37:44.776 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:37:44.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:44.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:44.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:44.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:45.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:37:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:37:45.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:45.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:45.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:45.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:45.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:45.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:45.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:45.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:45.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:45.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:45.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:45.909 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:45.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:50.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:50.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:50.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:50.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:50.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:50.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:50.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:50.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:50.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:50.924 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:50.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:50.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:50.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:50.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:50.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:50.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:50.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:50.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:50.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:50.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:50.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:50.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:50.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:50.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:50.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:50.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:50.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:50.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:50.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:50.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:50.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:50.937 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:50.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:50.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:51.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:51.476 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:51.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:51.479 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:51.482 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:51.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:51.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:51.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:37:51.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:51.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:51.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:51.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:37:51.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:37:51.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:37:51.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:51.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:51.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:51.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:51.904 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:37:51.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:51.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:51.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:51.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:52.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:52.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:52.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:52.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:37:52.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:52.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:52.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:52.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:37:52.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:37:52.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:52.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:52.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:52.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:52.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:52.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:52.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:52.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:52.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:52.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:52.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:52.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:52.053 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:37:52.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:52.054 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:37:57.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:37:57.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:37:57.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:57.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:57.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:57.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:57.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:37:57.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:57.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:57.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:37:57.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:37:57.071 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:37:57.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:37:57.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:57.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:57.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:37:57.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:37:57.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:37:57.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:37:57.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:37:57.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:37:57.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:57.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:57.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:37:57.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:37:57.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:37:57.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:37:57.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:37:57.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:37:57.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:57.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:37:57.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:37:57.080 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:37:57.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:37:57.080 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:37:57.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:37:57.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.084 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:37:57.084 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:37:57.085 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:37:57.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:37:57.089 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:37:57.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:37:57.615 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:37:57.616 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:37:57.616 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:37:57.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:37:57.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:37:57.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:37:57.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:37:57.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:57.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:57.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:57.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:37:57.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:37:57.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:37:57.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:37:57.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:37:57.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:57.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:37:58.050 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:37:58.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:58.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:58.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:58.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:58.528 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:37:59.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:37:59.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:37:59.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:37:59.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:37:59.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:37:59.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:37:59.962 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:38:00.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:00.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:00.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:00.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:38:00.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:00.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:00.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:00.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:00.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:00.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:00.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:00.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:00.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:00.742 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:38:00.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:00.742 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:00.742 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:05.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:05.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:05.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:05.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:05.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:05.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:05.753 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:05.753 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:05.753 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:38:05.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:38:05.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:38:05.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:05.755 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:05.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:05.756 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:38:05.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:05.756 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:38:05.757 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:38:05.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:38:05.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:05.758 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:05.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:05.758 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:38:05.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:05.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:38:05.760 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:38:05.760 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:38:05.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:05.760 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:05.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:05.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:38:05.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:05.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:38:05.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:38:05.765 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:38:05.765 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:05.769 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:38:06.252 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:38:06.288 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:38:06.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:38:06.292 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:38:06.294 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:38:06.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:06.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:06.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:38:06.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:06.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:38:06.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:38:06.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:38:06.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:38:06.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:38:06.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:38:06.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:38:06.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:06.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:06.730 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:38:06.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:06.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:06.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:06.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:38:07.686 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:38:07.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:07.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:07.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:07.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:08.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:38:08.642 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:38:08.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:08.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:08.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:08.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:09.119 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:38:09.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:09.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:09.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:09.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:09.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:09.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:09.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:09.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:09.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:09.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:09.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:09.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:09.420 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:09.420 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:14.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:14.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:14.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:14.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:14.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:14.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:14.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:14.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:14.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:38:14.435 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:38:14.435 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:38:14.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:14.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:14.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:14.437 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:38:14.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:14.437 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:38:14.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:38:14.439 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:38:14.439 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:14.439 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:14.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:14.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:38:14.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:14.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:38:14.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:38:14.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:38:14.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:14.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:14.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:14.442 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:38:14.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:14.442 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:38:14.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:38:14.446 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:38:14.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:14.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:38:14.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:38:14.964 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:38:14.964 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:38:14.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:38:14.965 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:38:14.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:14.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:14.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:38:14.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:14.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:38:14.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:38:14.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:38:14.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:38:14.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:38:14.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:38:14.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:38:14.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:14.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:15.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:38:15.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:15.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:15.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:15.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:15.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:38:16.364 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:38:16.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:16.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:16.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:16.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:16.841 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:38:17.319 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:38:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:17.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:17.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:17.798 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:38:18.275 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:38:18.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:18.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:18.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:18.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:18.753 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:38:18.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:19.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:19.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:19.000 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=973 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:38:19.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:38:19.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:38:19.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:38:19.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:38:19.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:38:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:38:19.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:38:19.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:38:19.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:38:19.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:38:19.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:38:19.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:38:19.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:19.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:19.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:19.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:19.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:19.048 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:38:19.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:19.048 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=983 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:38:24.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:24.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:24.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:24.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:24.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:24.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:24.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:24.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:24.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:24.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:24.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:38:24.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:38:24.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:38:24.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:24.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:24.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:24.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:38:24.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:24.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:24.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:38:24.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:24.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:24.075 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:38:24.075 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:24.075 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:38:24.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:38:24.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:38:24.078 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:38:24.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:24.079 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:24.079 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:38:24.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:29.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:29.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:29.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:29.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:29.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:29.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:29.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:29.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:29.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:38:29.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:38:29.084 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:29.085 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:38:29.085 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:29.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:38:29.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:38:29.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:29.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:38:29.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:38:29.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:38:29.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:38:29.087 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:38:29.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:29.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:29.088 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:38:29.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:33.790 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.28.20:5700'
2026-01-23 02:38:33.790 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.28.20:5802)
2026-01-23 02:38:33.790 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.28.20:5801)
2026-01-23 02:38:33.790 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.28.22:6700'
2026-01-23 02:38:33.790 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.28.22:6802)
2026-01-23 02:38:33.790 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.28.22:6801)
2026-01-23 02:38:33.790 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.28.20:5700/1'
2026-01-23 02:38:33.790 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.28.20:5804)
2026-01-23 02:38:33.790 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.28.20:5803)
2026-01-23 02:38:33.790 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.28.20:5700/2'
2026-01-23 02:38:33.790 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.28.20:5806)
2026-01-23 02:38:33.790 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.28.20:5805)
2026-01-23 02:38:33.790 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.28.20:5700/3'
2026-01-23 02:38:33.790 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.28.20:5808)
2026-01-23 02:38:33.790 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.28.20:5807)
2026-01-23 02:38:33.790 [INFO] fake_trx.py:424 Init complete
2026-01-23 02:38:33.790 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-23 02:38:35.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:35.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:35.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:35.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:35.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:35.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:46.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:46.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:46.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:46.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:51.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:51.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:51.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:51.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:51.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:51.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:51.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:51.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:51.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:51.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:56.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:38:56.500 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:38:56.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:38:56.500 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:56.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:56.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:56.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:38:56.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:38:56.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:38:56.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:01.534 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:01.534 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:01.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:01.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:01.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:01.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:01.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:01.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:01.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:01.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:06.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:06.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:06.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:06.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:06.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:06.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:06.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:06.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:06.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:06.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:11.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:11.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:11.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:11.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:11.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:11.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:11.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:11.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:11.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:11.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:16.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:16.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:16.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:16.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:16.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:16.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:16.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:16.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:16.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:16.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:21.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:21.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:21.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:21.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:21.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:21.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:21.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:21.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:21.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:21.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:26.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:26.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:26.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:26.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:26.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:26.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:26.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:26.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:26.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:31.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:31.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:31.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:31.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:31.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:31.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:31.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:31.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:31.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:31.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:36.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:36.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:36.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:36.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:36.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:36.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 0 -> 1
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 0 -> 1
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 0 -> 1
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:39:36.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:39:36.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 0 -> 1
2026-01-23 02:39:36.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:36.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:36.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:36.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:41.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:41.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:41.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:41.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:41.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:41.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:41.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:41.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:41.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:41.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:46.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:46.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:46.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:46.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:46.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:46.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:46.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:39:46.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:39:46.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:39:46.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:39:46.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:46.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:46.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:46.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:51.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:51.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:51.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:51.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:51.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:51.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:51.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:51.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:51.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:51.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:56.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:39:56.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:39:56.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:56.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:39:56.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:56.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:39:56.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:39:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:39:56.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:01.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:01.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:01.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:01.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:01.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:01.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:01.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:01.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:01.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:01.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:06.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:06.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:06.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:06.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:06.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:06.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:06.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:06.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:06.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:06.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:13.075 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.28.20:5700'
2026-01-23 02:40:13.075 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.28.20:5802)
2026-01-23 02:40:13.075 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.28.20:5801)
2026-01-23 02:40:13.075 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.28.22:6700'
2026-01-23 02:40:13.076 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.28.22:6802)
2026-01-23 02:40:13.076 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.28.22:6801)
2026-01-23 02:40:13.076 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.28.20:5700/1'
2026-01-23 02:40:13.076 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.28.20:5804)
2026-01-23 02:40:13.076 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.28.20:5803)
2026-01-23 02:40:13.076 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.28.20:5700/2'
2026-01-23 02:40:13.076 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.28.20:5806)
2026-01-23 02:40:13.076 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.28.20:5805)
2026-01-23 02:40:13.076 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.28.20:5700/3'
2026-01-23 02:40:13.076 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.28.20:5808)
2026-01-23 02:40:13.076 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.28.20:5807)
2026-01-23 02:40:13.076 [INFO] fake_trx.py:424 Init complete
2026-01-23 02:40:13.076 [INFO] fake_trx.py:455 Setting real time process scheduler to SCHED_RR, priority 30
2026-01-23 02:40:14.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:14.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:14.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:14.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:14.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:17.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:17.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:17.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:17.655 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:17.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 0 -> 1
2026-01-23 02:40:17.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:17.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:17.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:17.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:17.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:17.663 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:17.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:17.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 0 -> 1
2026-01-23 02:40:17.666 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:17.666 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:17.666 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:17.666 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:17.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:17.667 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:17.667 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:17.667 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 0 -> 1
2026-01-23 02:40:17.670 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:17.670 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:17.670 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:17.670 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:17.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:17.671 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:17.671 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:17.671 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 0 -> 1
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:17.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:17.674 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:17.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:17.674 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:17.674 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:17.674 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:17.674 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:17.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:17.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:17.679 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:40:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:40:18.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:18.217 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:40:18.219 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:40:18.221 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:40:18.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:18.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:18.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:18.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:18.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:18.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:18.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:18.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:18.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:18.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:18.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:18.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:18.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:18.633 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:40:18.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:18.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:18.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:18.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:18.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:18.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:18.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:18.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:18.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:18.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:18.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:18.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:18.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:18.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:18.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:18.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:18.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:19.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:40:19.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:19.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:19.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:19.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:19.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:19.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:19.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:19.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:19.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:19.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:19.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:19.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:19.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:19.585 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:40:19.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:19.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:19.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:19.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:19.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:19.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:19.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:20.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:20.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:20.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:20.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:20.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:20.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:20.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:20.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:20.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:20.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:20.057 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:40:20.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:20.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:20.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:20.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:20.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:20.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:20.530 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:40:20.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:20.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:20.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:20.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:20.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:20.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:20.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:20.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:20.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:20.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:20.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:20.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:20.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:20.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:20.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:20.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:21.001 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:40:21.471 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:40:21.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:21.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:21.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:21.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:21.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:21.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:21.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:21.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:21.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:21.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:21.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:21.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:21.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:21.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:21.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:21.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:21.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:21.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:21.740 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:40:21.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:21.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:40:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:40:22.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:22.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:22.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:22.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:22.573 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:22.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:22.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:22.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:22.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:22.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:22.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:22.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:22.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:22.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:22.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:22.701 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:40:22.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:22.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:22.905 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:40:23.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:23.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:23.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:23.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:23.124 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:23.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:23.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:23.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:23.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:23.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:23.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:23.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:23.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:23.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:23.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:23.382 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:40:23.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:23.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:23.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:23.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:23.855 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:40:24.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:24.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:24.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:24.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:24.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:24.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:24.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:24.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:24.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:24.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:24.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:24.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:24.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:24.325 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:40:24.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:24.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:24.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:24.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:24.796 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:40:25.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:25.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:25.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:25.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:25.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:25.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:25.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:25.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:25.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:25.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:25.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:25.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:25.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:25.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:25.268 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:40:25.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:25.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:25.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:25.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:40:26.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:26.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:26.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:26.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:26.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:26.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:26.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:26.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:26.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:26.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:26.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:26.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:26.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:26.225 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:40:26.264 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:26.264 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:40:26.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:26.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:26.703 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:40:27.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.052 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:27.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:27.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:27.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:27.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:27.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:27.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.175 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:40:27.211 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:27.211 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:40:27.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.593 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:27.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:27.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:27.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:27.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:27.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:27.653 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:40:27.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.717 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:27.717 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:27.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.813 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:27.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:27.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:27.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:27.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:27.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:27.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:27.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:27.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:27.925 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:27.925 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:27.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:27.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.128 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:40:28.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:28.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:28.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:28.303 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:28.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:28.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:28.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:28.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:28.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:28.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:28.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:28.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:28.424 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:28.424 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:28.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.606 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:40:28.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:28.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:28.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:28.805 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:28.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:28.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:28.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:28.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:28.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:28.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:28.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:28.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:28.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.080 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:40:29.113 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:29.113 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:29.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.293 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:29.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:29.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:29.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:29.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:29.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.376 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:29.376 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:29.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.473 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:29.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:29.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:29.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:29.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:29.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:29.552 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:40:29.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.611 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:29.612 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:29.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:29.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.963 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:29.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:29.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:29.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:29.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:29.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:29.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:29.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:29.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:30.027 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:40:30.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:30.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:30.091 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:30.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:30.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:30.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:30.460 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:30.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:30.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:30.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:30.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:40:30.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:40:30.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:40:30.476 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:40:30.501 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:40:30.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:30.561 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:40:30.561 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:40:30.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:40:30.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:30.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:30.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:30.949 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:40:30.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:30.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:30.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:30.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:30.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:30.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:30.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:30.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:30.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:30.956 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:40:30.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:30.956 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:35.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:35.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:35.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:35.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:35.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:35.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:35.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:35.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:35.970 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:35.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:35.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:40:35.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:35.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:35.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:35.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:35.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:35.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:35.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:35.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:35.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:35.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:35.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:40:35.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:35.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:35.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:35.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:35.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:35.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:35.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:35.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:35.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:35.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:35.981 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:35.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:35.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:35.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:35.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:40:36.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:40:36.506 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:40:36.507 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:40:36.508 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:40:36.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:36.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:36.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:36.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
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2026-01-23 02:40:36.941 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:40:36.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
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2026-01-23 02:40:36.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:36.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:36.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:36.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:36.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:36.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
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2026-01-23 02:40:37.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-01-23 02:40:37.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-01-23 02:40:37.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:37.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:37.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:37.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:37.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:37.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:37.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:37.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:37.961 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:40:37.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:37.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=428 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:42.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:42.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:42.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:42.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:42.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:42.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:42.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:42.979 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:42.979 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:40:42.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:42.982 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:42.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:42.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:42.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:42.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:42.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:42.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:40:42.987 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:42.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:42.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:42.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:42.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:42.988 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:42.988 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:42.988 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:40:42.990 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:42.991 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:42.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:42.991 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:42.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:42.991 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:42.991 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:42.991 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:40:42.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:42.996 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:42.996 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:42.996 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:42.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:43.001 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:40:43.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:40:43.513 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:40:43.514 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:40:43.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:43.515 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:40:43.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:43.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:43.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:43.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:43.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:43.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:43.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:43.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:43.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:43.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:43.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:43.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:43.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:43.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:43.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:43.569 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:43.570 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:48.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:48.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:48.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:48.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:48.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:48.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:48.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:48.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:48.578 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:48.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:48.578 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:40:48.584 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:48.584 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:48.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:48.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:48.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:48.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:48.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:48.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:40:48.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:48.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:48.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:48.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:48.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:48.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:48.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:48.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:40:48.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:48.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:48.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:48.594 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:48.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:48.594 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:48.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:48.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:48.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:48.598 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:48.598 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:48.598 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:48.603 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:40:49.084 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:40:49.123 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:40:49.124 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:40:49.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:49.125 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:40:49.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:49.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:49.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:49.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:49.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:49.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:49.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:49.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:49.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:49.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:49.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:49.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:49.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:49.161 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:40:49.162 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.162 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.162 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.162 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.160 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:54.160 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:54.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:54.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:54.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:54.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:54.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:54.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:54.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:54.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:54.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:40:54.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:54.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:54.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:54.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:54.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:54.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:54.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:54.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:40:54.182 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:54.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:54.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:54.183 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:54.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:54.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:54.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:54.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:54.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:54.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:54.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:54.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:54.189 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:54.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:54.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:40:54.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:40:54.710 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:40:54.711 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:40:54.712 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:40:54.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:40:54.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:40:54.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:40:54.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:40:54.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:40:54.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:40:54.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:40:54.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:40:54.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:54.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:54.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:54.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:54.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:54.839 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:40:54.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:54.840 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:40:59.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:40:59.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:40:59.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:59.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:59.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:59.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:59.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:40:59.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:59.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:59.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:40:59.856 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:40:59.859 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:40:59.859 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:40:59.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:59.859 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:59.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:40:59.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:40:59.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:40:59.860 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:40:59.862 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:40:59.862 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:40:59.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:59.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:59.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:40:59.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:40:59.863 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:40:59.863 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:40:59.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:40:59.865 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:40:59.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:59.865 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:40:59.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:40:59.865 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:40:59.865 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:40:59.865 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:40:59.867 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:40:59.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:40:59.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:40:59.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:40:59.868 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:40:59.868 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:40:59.868 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:40:59.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:40:59.873 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:41:00.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:41:00.388 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:41:00.389 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:41:00.391 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:41:00.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:00.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:00.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:00.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:00.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:00.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:00.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:00.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:00.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:00.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:00.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:00.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:00.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:00.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:00.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:00.831 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:41:00.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:41:00.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:41:00.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:41:00.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:41:01.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:41:01.786 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:41:01.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:41:01.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:41:01.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:41:01.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:41:02.264 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:41:02.742 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:41:02.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:41:02.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:41:02.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:41:02.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:41:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:41:03.696 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:41:03.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:41:03.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:41:03.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:41:03.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:41:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:41:04.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:04.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:04.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:04.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:04.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:04.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:04.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:04.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:04.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:04.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:04.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:04.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:04.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:04.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:04.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:04.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:04.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:04.650 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:41:04.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:04.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:41:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:41:04.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:41:04.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:41:05.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:41:05.605 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:41:06.083 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:41:06.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:41:07.034 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:41:07.511 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:41:07.988 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:41:08.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:41:08.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:08.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:08.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:08.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:08.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:08.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:08.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:08.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:08.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:08.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:08.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:08.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:08.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:08.943 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:41:08.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:08.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:08.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:08.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:09.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:09.420 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:41:09.898 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:41:10.376 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:41:10.852 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:41:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:41:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:41:12.285 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:41:12.762 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:41:13.240 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:41:13.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:13.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:13.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:13.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:13.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:13.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:13.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:13.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:13.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:13.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:13.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:13.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:13.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:13.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:13.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:13.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:13.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:13.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:13.716 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:41:14.193 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:41:14.671 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:41:15.149 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:41:15.626 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:41:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:41:16.582 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:41:17.059 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:41:17.537 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:41:17.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:17.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:17.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:17.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:17.701 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=3811 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:41:17.710 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:17.710 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:17.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:17.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:17.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:17.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:17.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:17.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:17.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:17.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:17.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:17.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:17.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:18.014 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:41:18.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:18.493 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:41:18.971 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:41:19.449 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:41:19.927 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:41:20.404 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:41:20.881 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:41:21.359 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:41:21.837 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:41:22.315 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:41:22.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:22.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:22.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:22.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:22.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:22.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:22.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:22.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:22.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:22.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:22.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:22.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:22.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:22.414 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:22.414 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:41:22.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:22.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:22.792 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:41:22.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:41:23.747 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:41:24.225 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:41:24.704 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:41:25.182 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:41:25.660 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:41:26.139 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:41:26.615 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:41:26.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:26.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:26.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:26.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:26.812 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:41:26.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:26.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:26.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:26.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:26.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:26.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:26.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:26.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:26.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:26.853 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:26.853 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:41:26.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:26.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:27.093 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:41:27.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:27.570 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:41:28.049 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:41:28.527 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:41:29.005 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:41:29.483 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:41:29.961 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:41:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:41:30.900 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:41:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:31.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:31.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:31.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:31.256 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:41:31.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:31.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:31.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:31.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:31.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:31.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:31.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:31.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:31.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:41:31.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:31.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:31.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:31.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:31.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:31.374 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:41:31.851 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:41:32.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:41:32.806 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:41:33.282 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:41:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:41:34.238 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:41:34.716 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:41:35.194 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:41:35.672 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:41:36.150 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:41:36.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:36.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:36.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:36.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:36.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:36.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:36.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:36.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:36.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:36.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:36.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:36.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:36.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:36.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:36.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:36.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:36.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:36.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:36.627 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:41:37.104 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:41:37.582 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:41:38.060 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:41:38.532 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:41:39.007 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:41:39.482 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:41:39.959 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:41:40.437 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:41:40.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:40.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:40.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:40.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:40.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:40.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:40.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:40.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:40.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:40.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:40.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:40.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:40.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:41:40.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:40.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:40.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:40.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:40.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:40.910 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:41:41.388 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:41:41.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:41.866 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:41:42.344 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:41:42.821 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:41:43.299 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:41:43.777 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:41:44.254 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:41:44.731 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:41:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:41:45.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:45.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:45.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:45.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:45.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:45.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:45.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:45.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:45.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:45.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:45.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:45.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:45.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:45.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:45.438 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:41:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:45.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:45.683 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:41:46.161 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:41:46.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:46.641 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:41:47.114 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:41:47.590 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:41:48.068 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:41:48.546 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:41:49.025 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:41:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:41:49.973 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:41:50.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:50.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:50.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:50.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:50.273 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:41:50.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:50.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:50.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:50.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:50.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:50.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:50.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:50.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:50.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:50.295 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:50.295 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:41:50.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:50.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:50.442 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:41:50.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:50.914 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:41:51.392 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:41:51.869 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:41:52.347 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:41:52.826 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:41:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:41:53.780 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:41:54.258 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:41:54.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:54.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:54.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:54.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:54.696 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:41:54.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:54.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:54.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:54.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:54.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:54.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:54.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:54.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:54.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:54.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:54.728 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:41:54.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:54.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:54.736 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:41:54.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:55.215 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:41:55.693 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:41:56.172 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:41:56.650 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:41:57.129 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:41:57.607 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:41:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:41:58.562 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:41:58.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:58.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:58.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:58.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:58.899 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:41:58.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:41:58.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:41:58.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:41:58.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:58.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:41:58.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:41:58.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:41:58.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:41:58.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:58.936 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:41:58.936 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:41:58.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:58.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:41:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:41:59.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:41:59.512 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:41:59.991 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:42:00.470 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:42:00.948 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:42:01.427 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:42:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:42:02.384 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:42:02.863 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:42:03.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:03.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:03.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:03.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:03.212 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:03.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:03.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:03.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:03.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:03.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:03.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:03.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:03.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:03.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:03.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:03.292 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:03.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:03.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:03.341 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 02:42:03.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:03.819 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 02:42:04.297 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 02:42:04.772 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 02:42:05.249 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 02:42:05.728 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 02:42:06.205 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 02:42:06.684 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 02:42:07.162 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 02:42:07.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:07.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:07.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:07.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:07.540 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:07.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:07.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:07.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:07.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:07.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:07.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:07.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:07.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:07.586 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:07.586 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:07.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:07.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 02:42:07.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 02:42:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 02:42:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 02:42:09.551 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 02:42:10.029 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 02:42:10.507 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 02:42:10.981 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 02:42:11.457 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 02:42:11.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:11.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:11.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:11.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:11.860 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:11.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:11.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:11.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:11.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:11.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:11.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:11.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:11.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:11.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:11.875 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:11.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:11.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:11.933 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 02:42:12.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:12.407 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 02:42:12.876 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 02:42:13.351 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 02:42:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 02:42:14.307 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 02:42:14.785 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 02:42:15.263 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 02:42:15.741 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 02:42:16.219 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 02:42:16.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:16.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:16.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:16.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:16.331 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:16.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:16.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:16.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:16.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:16.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:16.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:16.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:16.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:16.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:16.355 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:16.355 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:16.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:16.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:16.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:16.696 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 02:42:17.174 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 02:42:17.652 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 02:42:18.124 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 02:42:18.597 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 02:42:19.072 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 02:42:19.550 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 02:42:20.027 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 02:42:20.505 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 02:42:20.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:20.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:20.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:20.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:20.634 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:20.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:20.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:20.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:20.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:20.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:20.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:20.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:20.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:20.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:20.698 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:20.698 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:20.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:20.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:20.983 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 02:42:21.461 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 02:42:21.940 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 02:42:22.423 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 02:42:22.902 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 02:42:23.380 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 02:42:23.858 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 02:42:24.336 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 02:42:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 02:42:24.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:24.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:24.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:24.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:24.951 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:24.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:24.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:24.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:24.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:24.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:24.970 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:24.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:24.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:24.994 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:24.994 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:24.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:24.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:25.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:25.286 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 02:42:25.764 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 02:42:26.242 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 02:42:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 02:42:27.196 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 02:42:27.670 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 02:42:28.139 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 02:42:28.613 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 02:42:29.082 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-23 02:42:29.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:29.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:29.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:29.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:29.259 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:29.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:29.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:29.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:29.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:29.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:29.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:29.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:29.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:29.275 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:29.275 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:34.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:34.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:34.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:34.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:34.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:34.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:34.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:34.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:34.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:34.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:34.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:42:34.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:42:34.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:42:34.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:34.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:34.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:34.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:42:34.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:34.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:34.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:42:34.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:34.287 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:42:34.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:42:34.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:42:34.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:34.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:34.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:34.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:42:34.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:34.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:42:34.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:42:34.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:42:34.293 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:42:34.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:34.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:34.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:34.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:34.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:34.295 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:42:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:39.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:39.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:39.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:39.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:39.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:39.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:39.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:39.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:42:39.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:42:39.322 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:42:39.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:39.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:39.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:39.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:42:39.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:39.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:42:39.324 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:42:39.324 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:42:39.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:39.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:39.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:39.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:42:39.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:39.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:42:39.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:42:39.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:42:39.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:39.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:39.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:39.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:42:39.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:39.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:42:39.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:42:39.330 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:42:39.330 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:42:39.330 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:39.335 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:42:39.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:42:39.852 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:42:39.853 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:42:39.854 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:42:39.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:39.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:39.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:39.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:39.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:39.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:39.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:39.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:39.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:39.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:39.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:39.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:39.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:39.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:40.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:40.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:40.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.292 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:42:40.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:40.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:40.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:40.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:40.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:40.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:40.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:40.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:40.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:40.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.740 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:40.740 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:40.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:42:40.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:40.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:40.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:40.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:40.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:41.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:41.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:42:41.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:41.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:41.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:41.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:41.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:41.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:41.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:41.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:41.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:41.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:41.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:41.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:41.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:41.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:41.711 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:42:41.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:41.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:41.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:41.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:41.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:41.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:41.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:41.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:41.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:41.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:41.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:41.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:41.816 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:42:41.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:41.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:42:42.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:42.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:42.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:42.296 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:42.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:42.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:42.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:42.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:42.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:42.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:42.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:42.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:42.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:42.339 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:42:42.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:42.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:42.665 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:42:42.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:42.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:42.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:42.844 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:42.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:42.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:42.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:42.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:42.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:42.863 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:42.863 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:42.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:42.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:42.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:42.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:42.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:42.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:42:43.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:43.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:43.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:43.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:43.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:43.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:43.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:43.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:43.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:43.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:43.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:43.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:43.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:43.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:43.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:43.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:43.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:42:43.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:43.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:43.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:43.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:43.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:43.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:43.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:43.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:43.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:43.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:43.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:43.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:43.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:43.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:43.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:43.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:44.086 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:42:44.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:44.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:44.560 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:42:44.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:44.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:44.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:44.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:44.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:44.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:44.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:44.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:44.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:44.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:44.855 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:44.855 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:44.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:44.903 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:44.904 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:42:44.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:44.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:42:45.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:45.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:45.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:45.311 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:45.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:45.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:45.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:45.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:45.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:45.364 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:45.364 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:45.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:45.412 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:45.413 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:42:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.499 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:42:45.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:45.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:45.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:45.851 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:45.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:45.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:45.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:45.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:45.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:45.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:45.869 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:45.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:45.924 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:45.924 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:45.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:45.970 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:42:46.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:46.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:46.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:46.129 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:46.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:46.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:46.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:46.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:46.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:46.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:46.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:46.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:46.192 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:46.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.449 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:42:46.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:46.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:46.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:46.627 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:46.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:46.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:46.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:46.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:46.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:46.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:46.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:46.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:46.696 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:46.697 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:46.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:46.922 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:42:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.117 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:47.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:47.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:47.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:47.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:47.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:47.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:47.181 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:47.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.400 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:42:47.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.615 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:47.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:47.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:47.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:47.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:47.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:47.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.688 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:47.688 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:47.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.795 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:47.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:47.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:47.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:47.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:47.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:47.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:47.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:47.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:47.864 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:47.864 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:47.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:47.875 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:42:48.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:48.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:48.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:48.286 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:48.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:48.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:48.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:48.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:48.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:48.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:48.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:48.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:48.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:48.349 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:48.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.352 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:42:48.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:48.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:48.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:48.784 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:48.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:48.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:48.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:48.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:48.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:48.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:48.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:48.830 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:42:48.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:48.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:42:48.848 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:42:48.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:48.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:49.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:49.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:49.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:49.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:49.280 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:42:49.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:49.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:49.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:49.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:49.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:49.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:49.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:49.294 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:42:49.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.295 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.296 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.297 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.297 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.297 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.297 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:49.297 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:42:54.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:42:54.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:42:54.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:54.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:54.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:54.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:54.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:42:54.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:54.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:54.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:42:54.307 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:42:54.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:42:54.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:42:54.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:54.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:54.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:42:54.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:42:54.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:42:54.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:42:54.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:42:54.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:42:54.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:54.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:54.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:42:54.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:42:54.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:42:54.314 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:42:54.316 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:42:54.316 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:42:54.316 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:54.316 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:42:54.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:42:54.316 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:42:54.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:42:54.317 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:42:54.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:42:54.321 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:42:54.321 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:42:54.321 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:42:54.326 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:42:54.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:42:54.851 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:42:54.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:54.855 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:42:54.858 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:42:54.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:54.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:54.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:54.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:54.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:54.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:54.890 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:54.890 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:54.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:54.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:54.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:54.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:54.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:55.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:42:55.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:55.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:55.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:55.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:55.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:55.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:55.763 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:42:55.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:55.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:55.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:55.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:55.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:55.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:55.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:55.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:55.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:55.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:55.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:55.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:56.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:56.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:56.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:56.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:56.240 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:42:56.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:56.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:56.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:56.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:56.718 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:42:56.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:56.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:57.196 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:42:57.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:57.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:57.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:57.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:57.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:57.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:57.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:57.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:57.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:57.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:57.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:57.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:57.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:57.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:57.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:57.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:57.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:57.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:57.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:57.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:57.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:57.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:42:58.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:58.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:58.146 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:42:58.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:58.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:58.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:58.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:58.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:58.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:58.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:58.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:58.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:42:58.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:42:58.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:42:58.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:58.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:58.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:58.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:42:58.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:42:58.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:42:58.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:58.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:42:58.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:42:58.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:58.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:42:59.086 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:42:59.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:42:59.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:42:59.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:42:59.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:42:59.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:59.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:42:59.563 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:43:00.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:00.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:00.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:00.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:00.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:00.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:00.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:00.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:00.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:00.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:00.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:00.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:00.040 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:43:00.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:00.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:00.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:00.517 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:43:00.994 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:43:01.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:01.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:01.472 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:43:01.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:01.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:01.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:01.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:01.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:01.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:01.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:01.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:01.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:01.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:01.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:01.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:01.663 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:01.663 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:43:01.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:01.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:01.945 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:43:02.423 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:43:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:02.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:02.901 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:43:03.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:03.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:03.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:03.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:03.120 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:03.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:03.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:03.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:03.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:03.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:03.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:03.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:03.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:03.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:03.188 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:03.188 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:43:03.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:03.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:03.379 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:43:03.858 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:43:04.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:04.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:04.335 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:43:04.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:04.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:04.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:04.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:04.643 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:04.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:04.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:04.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:04.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:04.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:04.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:04.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:04.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:04.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:04.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:04.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:04.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:04.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:04.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:04.813 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:43:05.290 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:43:05.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:05.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:05.769 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:43:06.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:06.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:06.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:06.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:06.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:06.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:06.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:06.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:06.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:06.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:06.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:06.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:06.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:06.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:06.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:06.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:06.245 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:43:06.723 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:43:07.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:07.201 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:43:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:43:07.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:07.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:07.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:07.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:07.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:07.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:07.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:07.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:07.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:07.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:07.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:07.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:07.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:07.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:07.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:07.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:07.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:07.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:08.157 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:43:08.633 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:43:09.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:09.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:09.111 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:43:09.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:09.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:09.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:09.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:09.571 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=3263 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:09.589 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:43:09.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:09.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:09.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:09.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:09.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:09.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:09.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:09.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:09.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:09.641 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:09.641 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:43:09.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:09.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:10.066 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:43:10.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:10.544 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:43:10.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:11.025 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:43:11.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:11.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:11.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:11.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:11.042 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:11.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:11.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:11.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:11.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:11.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:11.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:11.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:11.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:11.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:11.104 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:11.104 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:43:11.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:11.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:11.502 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:43:11.980 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:43:12.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:12.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:12.459 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:43:12.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:12.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:12.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:12.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:12.564 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:12.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:12.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:12.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:12.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:12.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:12.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:12.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:12.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:12.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:12.627 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:12.628 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:12.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:12.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:12.936 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:43:13.415 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:43:13.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:13.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:13.893 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:43:14.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:14.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:14.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:14.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:14.052 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:14.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:14.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:14.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:14.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:14.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:14.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:14.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:14.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:14.112 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:14.113 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:14.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:14.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:14.371 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:43:14.850 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:43:15.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:15.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:15.328 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:43:15.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:15.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:15.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:15.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:15.507 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:15.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:15.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:15.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:15.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:15.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:15.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:15.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:15.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:15.571 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:15.572 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:15.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:15.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:15.806 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:43:16.285 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:43:16.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:16.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:16.763 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:43:16.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:16.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:16.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:16.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:16.960 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:16.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:16.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:16.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:16.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:16.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:16.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:16.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:16.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:17.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:17.020 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:17.020 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:17.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:17.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:17.241 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:43:17.719 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:43:17.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:17.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:18.197 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:43:18.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:18.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:18.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:18.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:18.412 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:18.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:18.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:18.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:18.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:18.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:18.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:18.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:18.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:18.477 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:18.477 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:18.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:18.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:18.676 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:43:19.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:19.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:19.154 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:43:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:19.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:19.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:19.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:19.549 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:19.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:19.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:19.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:19.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:19.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:19.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:19.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:19.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:19.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:19.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:19.612 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:19.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:19.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:19.632 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:43:20.111 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:43:20.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:20.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:20.589 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:43:21.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:21.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:21.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:21.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:21.004 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:21.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:21.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:21.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:21.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:21.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:21.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:21.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:21.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:21.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:21.067 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:43:21.068 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:21.068 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:21.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:21.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:21.546 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:43:21.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:43:22.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:22.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:22.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:22.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:22.456 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:22.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:22.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:22.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:22.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:22.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:22.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:22.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:22.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:22.502 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:43:22.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:22.524 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:22.524 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:43:22.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:22.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:22.981 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:43:23.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:23.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:23.459 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:43:23.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:23.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:23.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:23.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:23.910 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:23.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:23.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:23.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:43:23.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:43:23.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:43:23.916 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:43:23.916 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.916 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.916 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.916 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.916 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:23.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:28.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:43:28.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:43:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:43:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:43:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:43:28.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:43:28.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:43:28.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:43:28.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:43:28.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:43:28.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:43:28.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:43:28.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:43:28.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:43:28.941 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:43:28.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:43:28.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:43:28.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:43:28.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:43:28.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:43:28.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:43:28.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:43:28.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:43:28.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:43:28.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:43:28.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:43:28.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:43:28.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:43:28.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:43:28.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:43:28.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:43:28.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:43:28.948 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:43:28.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:43:28.948 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:43:28.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:43:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:43:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:43:28.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:43:28.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:43:28.951 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:43:28.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:28.956 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:43:29.441 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:43:29.481 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:43:29.483 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:43:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:29.485 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:43:29.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:29.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:29.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:29.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:29.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:29.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:29.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:29.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:29.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:29.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:29.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:29.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:29.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:29.918 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:43:29.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:29.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:29.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:30.395 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:43:30.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:43:30.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:30.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:30.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:30.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:31.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:43:31.829 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:43:31.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:31.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:31.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:31.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:43:32.785 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:43:32.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:32.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:32.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:32.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:43:33.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:33.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:33.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:33.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:33.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:33.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:33.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:33.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:33.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:33.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:33.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:33.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:33.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:33.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:33.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:33.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:33.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:33.740 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:43:33.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:43:33.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:43:33.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:43:33.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:43:34.218 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:43:34.696 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:43:35.174 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:43:35.652 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:43:36.130 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:43:36.607 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:43:37.084 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:43:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:43:37.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:37.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:37.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:37.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:37.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:37.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:37.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:37.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:37.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:37.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:37.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:37.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:37.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:37.852 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:37.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:37.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:37.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:38.039 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:43:38.516 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:43:38.994 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:43:39.472 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:43:39.949 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:43:40.427 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:43:40.905 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:43:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:43:41.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:41.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:41.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:41.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:41.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:41.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:41.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:41.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:41.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:41.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:41.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:41.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:41.860 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:43:41.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:41.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:41.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:41.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:41.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:42.337 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:43:42.815 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:43:43.293 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:43:43.771 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:43:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:43:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:43:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:43:45.683 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:43:46.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:46.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:46.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:46.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:43:46.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:46.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:46.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:46.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:46.163 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:46.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:46.163 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:46.163 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:46.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:46.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:46.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:46.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:46.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:46.637 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:43:47.114 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:43:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:43:48.071 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:43:48.549 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:43:49.026 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:43:49.503 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:43:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:43:50.459 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:43:50.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:50.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:50.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:50.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:50.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:50.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:50.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:50.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:50.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:50.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:50.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:50.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:50.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:50.936 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:50.936 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:43:50.936 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:43:50.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:50.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:51.413 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:43:51.892 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:43:52.370 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:43:52.848 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:43:53.326 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:43:53.802 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:43:54.277 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:43:54.755 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:43:55.233 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:43:55.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:55.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:55.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:55.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:55.314 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:55.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:55.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:55.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:55.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:55.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:55.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:55.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:55.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:55.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:55.384 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:43:55.385 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:43:55.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:55.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:55.710 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:43:56.188 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:43:56.666 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:43:57.143 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:43:57.621 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:43:58.099 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:43:58.577 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:43:59.054 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:43:59.524 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:43:59.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:59.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:59.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:59.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:59.744 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:43:59.744 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=6578 tn=3 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:43:59.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:43:59.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:43:59.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:43:59.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:59.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:59.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:59.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:43:59.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:43:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:43:59.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:43:59.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:43:59.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:43:59.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:59.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:43:59.995 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:44:00.469 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:44:00.942 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:44:01.413 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:44:01.888 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:44:02.367 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:44:02.845 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:44:03.323 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:44:03.801 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:44:04.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:04.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:04.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:04.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:04.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:04.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:04.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:04.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:04.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:04.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:04.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:04.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:04.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:04.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:04.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:04.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:04.279 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:44:04.756 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:44:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:44:05.712 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:44:06.190 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:44:06.664 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:44:07.143 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:44:07.621 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:44:08.097 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:44:08.569 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:44:08.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:08.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:08.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:08.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:08.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:08.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:08.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:08.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:08.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:08.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:08.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:08.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:08.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:44:08.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:08.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:08.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:08.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:08.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:09.041 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:44:09.514 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:44:09.988 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:44:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:44:10.938 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:44:11.417 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:44:11.894 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:44:12.372 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:44:12.850 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:44:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:12.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:12.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:12.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:12.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:12.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:12.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:12.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:12.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:12.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:12.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:12.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:12.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:12.981 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:12.981 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:44:12.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:12.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:13.322 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:44:13.800 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:44:14.278 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:44:14.757 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:44:15.235 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:44:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:44:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:44:16.671 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:44:17.150 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:44:17.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:17.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:17.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:17.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:17.295 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:17.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:17.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:17.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:17.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:17.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:17.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:17.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:17.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:17.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:17.368 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:17.369 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:44:17.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:17.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:17.628 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:44:18.106 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:44:18.584 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:44:19.063 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:44:19.540 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:44:20.018 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:44:20.496 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:44:20.976 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:44:21.454 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:44:21.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:21.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:21.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:21.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:21.744 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:21.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:21.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:21.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:21.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:21.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:21.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:21.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:21.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:21.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:21.813 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:21.813 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:21.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:21.932 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:44:22.410 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:44:22.888 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:44:23.367 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:44:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:44:24.322 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:44:24.800 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:44:25.278 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:44:25.781 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:44:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:25.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:25.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:25.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:25.941 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:25.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:25.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:25.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:25.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:25.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:25.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:25.957 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:25.957 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:25.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:25.985 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:25.985 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:25.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:25.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:26.258 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:44:26.736 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:44:27.215 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:44:27.694 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:44:28.173 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:44:28.650 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:44:29.129 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:44:29.607 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:44:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:44:30.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:30.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:30.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:30.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:30.264 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:30.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:30.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:30.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:30.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:30.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:30.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:30.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:30.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:30.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:30.364 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:30.364 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:30.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:30.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:30.564 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:44:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:44:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:44:31.998 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:44:32.477 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 02:44:32.955 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 02:44:33.433 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 02:44:33.911 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 02:44:34.389 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 02:44:34.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:34.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:34.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:34.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:34.587 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:34.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:34.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:34.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:34.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:34.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:34.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:34.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:34.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:34.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:34.657 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:34.657 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:34.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:34.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:34.867 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 02:44:35.345 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 02:44:35.824 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 02:44:36.302 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 02:44:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 02:44:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 02:44:37.736 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 02:44:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 02:44:38.688 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 02:44:38.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:38.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:38.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:38.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:38.903 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:38.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:38.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:38.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:38.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:38.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:38.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:38.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:38.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:38.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:38.974 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:38.975 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:38.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:38.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:39.164 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 02:44:39.641 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 02:44:40.120 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 02:44:40.599 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 02:44:41.077 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 02:44:41.556 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 02:44:42.034 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 02:44:42.511 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 02:44:42.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:42.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:42.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:42.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:42.907 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:42.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:42.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:42.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:42.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:42.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:42.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:42.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:42.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:42.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:42.988 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 02:44:42.988 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:42.988 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:42.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:42.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:43.466 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 02:44:43.944 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 02:44:44.422 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 02:44:44.895 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 02:44:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 02:44:45.844 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 02:44:46.323 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 02:44:46.801 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 02:44:47.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:47.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:47.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:47.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:47.215 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:47.233 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:47.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:47.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:47.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:47.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:47.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:47.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:47.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:47.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:47.279 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 02:44:47.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:47.284 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:47.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:47.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:47.752 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 02:44:48.230 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 02:44:48.708 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 02:44:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 02:44:49.665 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 02:44:50.143 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 02:44:50.621 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 02:44:51.100 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 02:44:51.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:51.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:51.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:51.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:51.532 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:51.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:51.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:51.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:44:51.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:51.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:44:51.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:44:51.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:44:51.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:44:51.579 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 02:44:51.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:51.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:44:51.597 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:44:51.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:51.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:52.057 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 02:44:52.536 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 02:44:53.015 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 02:44:53.492 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 02:44:53.970 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 02:44:54.449 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 02:44:54.928 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 02:44:55.406 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 02:44:55.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:44:55.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:44:55.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:44:55.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:44:55.857 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:44:55.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:44:55.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:44:55.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:44:55.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:44:55.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:44:55.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:44:55.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:44:55.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:44:55.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:44:55.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:44:55.864 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:44:55.864 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=18563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:45:00.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:45:00.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:45:00.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:45:00.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:45:00.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:45:00.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:45:00.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:45:00.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:45:00.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:00.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:45:00.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:45:00.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:45:00.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:45:00.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:45:00.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:00.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:45:00.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:45:00.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:45:00.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:45:00.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:45:00.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:45:00.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:45:00.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:00.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:45:00.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:45:00.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:45:00.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:45:00.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:45:00.886 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:45:00.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:45:00.886 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:00.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:45:00.886 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:45:00.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:45:00.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:45:00.890 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:45:00.890 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:45:00.890 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:45:00.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:45:00.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:45:00.892 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:45:05.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:45:05.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:45:05.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:45:05.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:45:05.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:45:05.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:45:05.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:45:05.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:45:05.909 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:05.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:45:05.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:45:05.912 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:45:05.912 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:45:05.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:45:05.912 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:05.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:45:05.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:45:05.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:45:05.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:45:05.915 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:45:05.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:45:05.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:45:05.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:45:05.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:45:05.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:45:05.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:45:05.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:45:05.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:45:05.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:45:05.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:45:05.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:45:05.920 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:45:05.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:05.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:45:06.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:45:06.448 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:45:06.450 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:45:06.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:06.452 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:45:06.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:06.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:06.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:06.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:06.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:06.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:06.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:06.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:06.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:06.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:06.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:06.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:06.884 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:45:06.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:45:06.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:45:06.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:45:06.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:45:07.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:45:07.839 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:45:07.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:45:07.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:45:07.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:45:07.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:45:08.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:45:08.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:45:08.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:45:08.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:45:08.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:45:08.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:45:09.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:45:09.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:45:09.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:45:09.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:45:09.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:45:09.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:45:10.226 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:45:10.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:10.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:10.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:10.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:10.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:10.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:10.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:10.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:10.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:10.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:10.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:10.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:10.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:10.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:10.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:10.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:10.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:10.702 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:45:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:45:10.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:45:10.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:45:10.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:45:11.180 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:45:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:45:12.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:45:12.612 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:45:13.090 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:45:13.568 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:45:14.046 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:45:14.524 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:45:14.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:14.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:14.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:14.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:14.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:14.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:14.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:14.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:14.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:14.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:14.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:14.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:14.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:14.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:14.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:14.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:14.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:14.998 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:45:15.476 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:45:15.954 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:45:16.432 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:45:16.910 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:45:17.388 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:45:17.863 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:45:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:45:18.818 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:45:19.295 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:45:19.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:19.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:19.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:19.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:19.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:19.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:19.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:19.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:19.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:19.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:19.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:19.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:19.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:19.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:19.469 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:19.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:19.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:19.770 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:45:20.248 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:45:20.725 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:45:21.202 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:45:21.680 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:45:22.157 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:45:22.635 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:45:23.113 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:45:23.587 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:45:23.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:23.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:23.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:23.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:23.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:23.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:23.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:23.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:23.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:23.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:23.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:23.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:23.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:23.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:23.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:23.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:23.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:24.058 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:45:24.537 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:45:25.014 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:45:25.491 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:45:25.968 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:45:26.446 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:45:26.924 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:45:27.402 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:45:27.879 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:45:28.357 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:45:28.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:28.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:28.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:28.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:28.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:28.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:28.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:28.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:28.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:28.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:28.392 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:28.392 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:28.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:28.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:45:28.442 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:45:28.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:28.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:28.834 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:45:29.313 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:45:29.790 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:45:30.268 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:45:30.746 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:45:31.224 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:45:31.703 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:45:32.181 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:45:32.660 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:45:32.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:32.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:32.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:32.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:32.826 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:45:32.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:32.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:32.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:32.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:32.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:32.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:32.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:32.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:32.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:32.902 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:45:32.902 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:45:32.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:32.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:33.137 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:45:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:45:34.090 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:45:34.568 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:45:35.047 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:45:35.525 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:45:36.003 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:45:36.481 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:45:36.958 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:45:37.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:37.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:37.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:37.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:37.270 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:45:37.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:37.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:37.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:37.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:37.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:37.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:37.291 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:37.291 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:37.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:37.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:37.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:37.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:37.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:37.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:37.435 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:45:37.913 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:45:38.390 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:45:38.866 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:45:39.344 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:45:39.822 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:45:40.299 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:45:40.777 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:45:41.253 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:45:41.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:41.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:41.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:41.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:41.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:41.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:41.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:41.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:41.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:41.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:41.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:41.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:41.730 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:45:41.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:41.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:41.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:41.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:41.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:42.205 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:45:42.683 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:45:43.161 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:45:43.639 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:45:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:45:44.596 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:45:45.074 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:45:45.550 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:45:46.028 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:45:46.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:46.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:46.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:46.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:46.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:46.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:46.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:46.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:46.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:46.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:46.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:46.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:46.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:45:46.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:46.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:46.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:46.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:46.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:46.506 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:45:46.983 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:45:47.462 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:45:47.940 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:45:48.414 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:45:48.892 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:45:49.369 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:45:49.847 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:45:50.325 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:45:50.802 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:45:51.280 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:45:51.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:51.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:51.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:51.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:51.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:51.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:51.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:51.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:51.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:51.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:51.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:51.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:51.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:51.522 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:45:51.522 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:45:51.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:51.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:51.757 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:45:52.237 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:45:52.716 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:45:53.194 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:45:53.667 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:45:54.137 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:45:54.610 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:45:55.089 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:45:55.568 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:45:56.042 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:45:56.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:56.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:56.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:56.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:56.322 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:45:56.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:45:56.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:45:56.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:45:56.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:56.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:45:56.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:45:56.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:45:56.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:45:56.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:45:56.389 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:45:56.389 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:45:56.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:56.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:45:56.511 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:45:56.981 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:45:57.454 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:45:57.932 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:45:58.412 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:45:58.890 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:45:59.368 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:45:59.843 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:46:00.312 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:46:00.782 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:46:01.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:01.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:01.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:01.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:01.213 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:01.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:01.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:01.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:01.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:01.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:01.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:01.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:01.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:01.255 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:46:01.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:01.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:01.277 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:01.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:01.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:01.733 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:46:02.212 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:46:02.690 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:46:03.168 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:46:03.646 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:46:04.125 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:46:04.596 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:46:05.075 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:46:05.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:05.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:05.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:05.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:05.372 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:05.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:05.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:05.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:05.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:05.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:05.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:05.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:05.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:05.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:05.439 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:05.439 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:05.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:05.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:05.551 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:46:06.027 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:46:06.500 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:46:06.970 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:46:07.446 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:46:07.924 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:46:08.401 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:46:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:46:09.354 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 02:46:09.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:09.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:09.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:09.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:09.676 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:09.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:09.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:09.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:09.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:09.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:09.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:09.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:09.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:09.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:09.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:09.744 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:09.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:09.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:09.831 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 02:46:10.309 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 02:46:10.787 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 02:46:11.265 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 02:46:11.744 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 02:46:12.222 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 02:46:12.701 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 02:46:13.179 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 02:46:13.657 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 02:46:13.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:13.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:13.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:13.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:13.984 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:13.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:13.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:13.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:13.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:14.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:14.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:14.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:14.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:14.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:14.048 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:14.048 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:14.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:14.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:14.133 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 02:46:14.612 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 02:46:15.090 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 02:46:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 02:46:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 02:46:16.506 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 02:46:16.983 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 02:46:17.462 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 02:46:17.940 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 02:46:18.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:18.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:18.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:18.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:18.305 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:18.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:18.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:18.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:18.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:18.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:18.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:18.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:18.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:18.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:18.372 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:18.372 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:18.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:18.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:18.416 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 02:46:18.892 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 02:46:19.370 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 02:46:19.839 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 02:46:20.308 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 02:46:20.785 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 02:46:21.278 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 02:46:21.755 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 02:46:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 02:46:22.703 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 02:46:22.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:22.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:22.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:22.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:22.766 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:22.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:22.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:22.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:22.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:22.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:22.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:22.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:22.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:22.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:22.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:22.836 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:22.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:22.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:23.178 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 02:46:23.653 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 02:46:24.131 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 02:46:24.610 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 02:46:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 02:46:25.565 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 02:46:26.043 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 02:46:26.521 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 02:46:26.998 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 02:46:27.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:27.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:27.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:27.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:27.064 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:27.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:27.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:27.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:27.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:27.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:27.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:27.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:27.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:27.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:27.128 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:27.128 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:27.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:27.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:27.475 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 02:46:27.954 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 02:46:28.430 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 02:46:28.908 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 02:46:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 02:46:29.865 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 02:46:30.343 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 02:46:30.822 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 02:46:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 02:46:31.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:31.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:31.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:31.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:31.385 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:31.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:31.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:31.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:31.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:31.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:31.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:31.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:31.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:31.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:31.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:31.456 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:46:31.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:31.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:31.778 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 02:46:32.247 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 02:46:32.724 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 02:46:33.198 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 02:46:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 02:46:34.150 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 02:46:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 02:46:35.106 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-23 02:46:35.585 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-23 02:46:35.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:35.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:35.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:35.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:35.696 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:35.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:35.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:35.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:35.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:35.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:35.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:46:35.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:46:35.712 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:46:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:35.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:35.712 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=19205 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:40.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:46:40.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:46:40.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:40.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:40.713 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:40.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:40.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:40.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:46:40.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:40.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:46:40.721 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:46:40.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:46:40.725 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:46:40.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:46:40.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:40.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:40.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:46:40.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:46:40.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:46:40.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:46:40.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:46:40.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:46:40.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:40.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:40.728 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:46:40.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:46:40.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:46:40.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:46:40.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:46:40.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:46:40.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:46:40.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:46:40.735 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:46:40.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:40.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:46:40.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:46:40.737 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:46:45.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:46:45.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:46:45.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:45.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:45.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:45.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:45.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:46:45.754 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:46:45.754 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:45.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:46:45.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:46:45.758 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:46:45.758 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:46:45.759 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:46:45.759 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:45.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:46:45.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:46:45.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:46:45.760 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:46:45.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:46:45.761 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:46:45.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:46:45.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:45.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:46:45.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:46:45.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:46:45.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:46:45.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:46:45.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:46:45.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.767 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:46:45.767 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:46:45.767 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:46:45.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:45.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:46:46.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:46:46.301 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:46:46.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:46.304 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:46:46.305 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:46:46.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:46.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:46.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:46.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:46.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:46.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:46.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:46.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:46.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:46.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:46.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:46.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:46.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:46.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:46:46.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:46.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:46.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:46.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:47.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:46:47.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:47.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:47.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:47.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:47.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:47.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:47.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:47.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:47.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:47.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:47.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:47.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:47.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:47.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:47.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:47.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:47.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:47.702 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:46:47.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:47.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:47.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:47.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:48.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:46:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:46:48.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:48.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:48.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:48.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:48.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:48.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:48.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:48.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:48.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:48.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:48.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:48.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:48.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:48.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:48.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:48.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:48.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:48.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:48.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:48.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:48.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:49.132 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:46:49.603 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:46:49.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:49.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:49.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:49.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:50.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:50.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:50.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:50.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:50.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:50.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:50.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:50.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:50.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:50.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:50.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:50.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:50.074 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:46:50.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:50.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:50.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:50.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:50.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:50.545 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:46:50.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:46:50.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:46:50.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:46:50.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:46:51.020 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:46:51.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:51.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:51.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:51.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:51.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:51.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:51.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:51.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:51.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:51.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:51.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:51.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:51.497 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:46:51.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:51.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:51.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:51.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:51.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:51.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:46:52.451 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:46:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:46:53.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:53.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:53.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:53.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:53.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:53.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:53.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:53.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:53.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:53.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:53.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:53.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:53.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:53.128 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:53.128 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:46:53.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:53.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:46:53.878 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:46:54.355 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:46:54.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:54.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:54.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:54.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:54.574 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:54.574 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:46:54.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:54.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:54.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:54.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:54.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:54.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:54.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:54.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:54.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:54.644 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:46:54.644 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:46:54.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:54.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:54.832 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:46:55.309 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:46:55.787 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:46:56.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:56.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:56.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:56.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:56.095 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:46:56.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:56.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:56.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:56.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:56.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:56.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:56.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:56.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:56.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:56.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:56.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:56.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:56.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:56.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:56.262 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:46:56.736 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:46:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:46:57.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:57.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:57.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:57.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:57.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:57.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:57.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:57.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:57.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:57.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:57.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:57.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:57.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:57.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:46:57.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:57.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:57.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:57.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:58.168 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:46:58.642 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:46:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:46:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:59.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:59.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:59.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:59.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:46:59.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:46:59.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:46:59.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:59.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:59.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:59.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:46:59.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:46:59.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:46:59.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:46:59.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:46:59.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:46:59.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:59.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:46:59.585 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:47:00.062 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:47:00.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:00.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:00.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:00.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:00.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:00.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:00.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:00.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:00.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:00.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:00.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:00.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:00.539 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:47:00.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:00.592 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:00.592 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:47:00.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:00.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:01.017 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:47:01.495 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:47:01.967 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:47:01.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:01.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:01.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:01.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:01.974 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:01.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:01.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:01.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:01.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:01.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:01.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:01.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:01.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:02.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:02.044 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:02.045 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:47:02.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:02.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:02.438 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:47:02.908 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:47:03.382 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:47:03.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:03.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:03.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:03.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:03.473 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:03.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:03.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:03.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:03.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:03.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:03.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:03.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:03.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:03.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:03.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:03.540 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:03.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:03.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:03.860 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:47:04.339 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:47:04.818 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:47:04.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:04.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:04.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:04.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:04.978 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:04.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:04.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:04.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:04.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:04.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:04.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:04.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:04.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:05.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:05.040 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:05.040 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:05.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:05.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:05.295 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:47:05.773 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:47:06.252 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:47:06.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:06.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:06.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:06.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:06.430 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:06.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:06.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:06.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:06.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:06.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:06.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:06.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:06.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:06.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:06.494 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:06.494 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:06.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:06.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:06.727 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:47:07.206 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:47:07.683 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:47:07.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:07.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:07.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:07.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:07.881 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:07.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:07.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:07.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:07.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:07.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:07.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:07.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:07.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:07.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:07.956 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:07.956 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:07.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:07.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:08.160 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:47:08.632 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:47:09.108 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:47:09.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:09.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:09.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:09.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:09.323 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:09.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:09.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:09.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:09.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:09.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:09.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:09.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:09.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:09.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:09.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:09.396 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:09.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:09.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:09.580 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:47:10.052 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:47:10.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:10.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:10.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:10.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:10.444 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:10.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:10.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:10.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:10.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:10.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:10.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:10.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:10.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:10.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:10.516 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:10.517 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:10.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:10.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:10.526 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:47:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:47:11.468 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:47:11.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:11.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:11.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:11.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:11.881 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:11.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:11.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:11.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:11.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:11.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:11.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:11.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:11.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:11.945 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:47:11.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:11.948 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:11.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:11.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:12.423 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:47:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:47:13.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:13.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:13.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:13.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:13.335 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:13.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:13.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:13.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:13.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:13.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:13.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:13.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:13.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:13.380 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:47:13.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:13.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:13.397 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:13.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:13.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:13.858 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:47:14.336 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:47:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:14.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:14.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:14.787 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:14.787 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:14.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:14.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:14.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:14.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:14.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:14.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:14.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:14.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:14.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:47:14.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:47:14.804 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:47:14.804 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.804 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6222 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.805 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:14.806 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6223 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:19.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:47:19.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:47:19.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:19.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:19.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:19.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:19.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:19.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:47:19.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:19.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:47:19.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:47:19.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:47:19.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:47:19.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:47:19.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:19.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:19.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:47:19.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:47:19.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:47:19.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:47:19.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:47:19.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:47:19.825 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:19.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:19.825 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:47:19.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:47:19.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:47:19.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:47:19.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:47:19.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:47:19.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:47:19.831 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:47:19.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:19.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:47:20.316 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:47:20.356 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:47:20.358 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:47:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:20.360 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:47:20.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:20.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:20.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:20.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:20.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:20.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:20.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:20.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:20.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:20.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:20.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:20.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:20.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:20.793 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:47:20.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:20.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:20.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:20.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:21.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:47:21.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:47:21.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:21.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:21.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:21.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:22.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:47:22.705 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:47:22.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:22.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:22.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:22.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:23.183 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:47:23.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:23.660 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:47:23.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:23.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:23.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:23.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:24.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:47:24.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:24.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:24.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:24.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:24.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:24.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:24.216 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:24.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:24.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:24.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:24.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:24.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:24.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:24.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:24.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:24.616 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:47:24.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:24.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:24.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:24.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:25.094 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:47:25.572 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:47:26.051 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:47:26.528 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:47:27.006 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:47:27.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:47:27.962 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:47:28.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:28.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:28.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:28.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:28.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:28.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:28.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:28.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:28.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:28.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:28.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:28.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:28.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:28.180 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:28.180 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:47:28.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:28.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:28.439 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:47:28.918 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:47:29.395 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:47:29.873 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:47:30.351 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:47:30.830 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:47:31.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:31.302 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:47:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:31.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:31.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:31.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:31.756 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:31.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:31.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:31.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:31.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:31.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:31.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:31.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:31.773 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:47:31.774 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:31.774 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:47:31.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:31.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:32.248 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:47:32.727 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:47:33.206 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:47:33.685 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:47:34.164 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:47:34.641 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:47:34.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:35.119 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:47:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:47:35.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:35.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:35.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:35.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:35.656 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:35.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:35.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:35.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:35.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:35.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:35.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:35.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:35.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:35.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:35.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:35.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:35.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:36.075 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:47:36.553 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:47:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:47:37.509 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:47:37.986 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:47:38.459 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:47:38.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:38.935 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:47:39.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:39.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:39.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:39.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:39.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:39.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:39.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:39.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:39.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:39.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:39.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:39.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:39.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:39.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:39.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:39.413 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:47:39.890 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:47:40.366 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:47:40.844 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:47:41.318 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:47:41.795 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:47:42.273 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:47:42.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:42.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:42.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:42.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:42.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:42.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:42.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:42.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:42.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:42.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:42.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:42.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:42.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:42.751 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:47:42.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:42.788 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:42.788 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:42.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:42.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:43.226 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:47:43.704 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:47:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:47:44.661 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:47:45.139 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:47:45.617 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:47:45.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:46.096 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:47:46.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:46.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:46.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:46.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:46.491 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:46.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:46.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:46.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:46.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:46.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:46.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:46.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:46.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:47:46.518 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:47:46.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:46.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:46.573 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:47:47.052 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:47:47.530 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:47:48.009 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:47:48.488 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:47:48.966 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:47:49.445 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:47:49.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:49.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:49.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:49.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:49.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:49.841 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:47:49.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:49.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:49.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:49.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:49.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:49.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:49.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:47:49.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:47:49.854 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:49.854 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:47:54.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:47:54.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:47:54.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:54.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:54.857 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:54.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:47:54.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:47:54.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:54.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:47:54.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:47:54.866 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:47:54.866 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:47:54.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:47:54.866 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:54.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:47:54.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:47:54.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:47:54.867 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:47:54.869 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:47:54.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:47:54.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:47:54.872 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:47:54.872 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:47:54.872 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:47:54.873 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:47:54.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:47:54.873 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:47:54.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:47:54.873 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:47:54.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:47:54.876 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:47:54.876 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:47:54.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:47:54.881 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:47:55.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:47:55.398 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:47:55.399 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:47:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:55.401 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:47:55.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:55.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:55.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:55.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:55.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:55.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:55.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:55.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:55.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:55.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:55.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:55.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:55.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:55.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:47:55.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:55.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:55.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:55.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:56.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:47:56.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:47:56.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:56.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:56.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:56.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:57.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:47:57.752 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:47:57.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:57.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:57.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:57.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:58.230 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:47:58.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:58.707 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:47:58.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:58.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:58.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:58.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:47:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:47:59.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:47:59.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:59.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:47:59.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:47:59.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:47:59.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:59.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:59.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:59.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:47:59.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:47:59.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:47:59.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:47:59.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:47:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:47:59.662 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:47:59.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:47:59.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:47:59.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:47:59.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:00.140 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:48:00.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:48:01.095 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:48:01.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:48:02.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:48:02.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:02.527 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:48:03.005 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:48:03.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:03.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:03.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:03.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:03.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:03.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:03.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:03.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:03.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:03.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:03.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:03.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:03.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:03.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:03.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:03.483 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:48:03.961 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:48:04.439 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:48:04.917 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:48:05.394 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:48:05.871 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:48:06.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:06.349 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:48:06.827 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:48:07.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:07.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:07.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:07.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:07.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:07.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:07.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:07.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:07.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:07.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:07.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:07.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:07.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:07.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:07.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:07.304 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:48:07.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:07.782 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:48:08.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:08.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:08.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:08.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:08.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:08.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:08.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:08.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:08.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:08.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:08.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:08.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:08.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:08.095 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:08.095 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:48:08.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:08.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:08.260 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:48:08.734 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:48:09.213 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:48:09.691 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:48:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:48:10.648 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:48:11.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:11.121 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:48:11.591 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:48:11.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:11.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:11.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:11.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:11.666 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:11.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:11.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:11.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:11.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:11.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:11.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:11.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:11.684 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:11.684 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:48:11.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:11.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:12.062 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:48:12.537 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:48:13.015 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:48:13.494 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:48:13.972 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:48:14.450 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:48:14.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:14.922 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:48:15.394 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:48:15.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:15.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:15.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:15.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:15.543 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:15.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:15.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:15.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:15.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:15.546 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:15.546 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:15.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:15.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:15.579 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:48:15.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:15.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:15.871 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:48:16.348 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:48:16.821 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:48:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:48:17.765 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:48:18.243 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:48:18.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:18.722 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:48:19.200 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:48:19.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:19.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:19.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:19.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:19.424 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:19.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:19.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:19.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:19.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:19.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:19.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:19.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:19.437 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:19.437 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:48:19.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:19.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:19.676 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:48:19.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:20.154 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:48:20.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:20.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:20.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:20.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:20.396 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:20.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:20.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:20.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:20.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:20.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:20.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:20.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:20.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:20.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:20.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:20.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:20.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:20.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:20.625 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:48:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:48:21.569 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:48:22.044 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:48:22.513 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:48:22.986 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:48:23.458 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:48:23.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:23.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:23.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:23.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:23.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:23.899 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=6217 tn=7 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:23.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:23.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:23.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:23.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:23.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:23.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:23.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:23.930 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:48:23.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:23.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:23.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:23.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:48:24.873 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:48:25.345 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:48:25.820 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:48:26.295 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:48:26.770 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:48:26.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:27.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:27.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:27.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:27.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:27.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:27.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:27.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:27.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:27.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:27.241 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:48:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:48:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:48:28.658 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:48:29.132 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:48:29.608 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:48:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:48:30.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:30.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:30.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:30.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:30.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:30.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:30.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:30.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:30.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:30.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:30.558 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:48:31.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:31.028 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:48:31.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:31.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:31.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:31.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:31.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:31.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:31.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:31.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:31.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:31.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:31.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:31.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:31.502 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:48:31.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:31.519 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:31.519 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:48:31.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:31.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:31.970 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:48:32.440 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:48:32.912 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:48:33.385 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:48:33.853 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:48:34.329 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:48:34.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:34.805 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:48:35.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:35.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:35.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:35.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:35.192 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:35.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:35.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:35.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:35.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:35.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:35.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:35.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:35.223 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:35.223 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:48:35.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:35.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:35.276 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:48:35.748 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:48:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:48:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:48:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:48:37.642 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:48:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:48:38.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:38.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:38.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:38.502 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:38.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:38.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:38.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:38.529 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:38.529 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:48:38.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:38.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:48:39.060 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:48:39.534 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:48:40.003 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:48:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:48:40.948 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:48:41.424 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:48:41.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:41.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:41.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:41.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:41.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:41.816 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:41.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:41.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:41.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:41.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:41.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:41.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:41.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:48:41.846 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:48:41.846 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:48:41.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:41.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:41.897 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:48:42.366 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:48:42.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:42.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:42.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:42.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:42.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:42.755 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:48:42.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:48:42.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:48:42.761 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:48:42.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:48:47.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:48:47.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:48:47.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:48:47.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:48:47.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:48:47.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:48:47.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:48:47.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:48:47.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:48:47.776 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:48:47.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:48:47.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:48:47.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:48:47.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:48:47.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:48:47.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:48:47.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:48:47.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:48:47.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:48:47.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:48:47.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:48:47.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:48:47.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:48:47.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:48:47.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:48:47.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:48:47.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:48:47.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:48:47.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:48:47.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:48:47.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:48:47.784 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:48:47.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:48:47.789 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:48:48.259 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:48:48.303 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:48:48.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:48:48.306 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:48:48.307 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:48:48.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:48.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:48.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:48:48.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:48:48.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:48:48.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:48:48.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:48:48.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:48:48.727 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:48:48.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:48.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:48.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:48.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:49.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:48:49.663 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:48:49.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:49.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:49.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:49.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:50.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:48:50.601 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:48:50.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:50.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:50.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:50.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:51.075 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:48:51.544 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:48:51.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:51.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:51.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:52.012 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:48:52.481 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:48:52.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:52.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:52.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:52.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:52.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:48:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:48:53.885 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:48:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:48:54.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:48:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:48:55.756 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:48:56.224 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:48:56.692 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:48:57.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:48:57.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:48:57.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:48:57.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:48:57.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:48:57.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:48:57.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:48:57.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:48:57.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:48:57.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:48:57.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:48:57.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:48:57.053 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:48:57.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:02.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:02.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:02.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:02.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:02.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:02.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:02.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:02.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:02.074 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:02.074 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:02.074 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:49:02.079 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:49:02.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:49:02.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:02.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:02.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:02.080 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:49:02.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:02.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:49:02.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:49:02.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:49:02.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:02.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:02.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:02.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:49:02.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:02.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:49:02.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:49:02.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:49:02.085 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:02.085 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:02.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:02.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:49:02.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:02.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:49:02.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:49:02.090 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:49:02.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:02.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:02.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:49:02.575 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:49:02.619 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:02.622 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:49:02.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:02.624 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:49:02.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:02.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:02.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:02.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:02.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:02.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:02.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:02.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:03.048 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:49:03.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:03.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:03.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:03.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:03.518 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:49:03.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:49:04.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:04.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:04.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:04.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:04.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:49:04.936 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:49:05.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:05.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:05.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:05.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:05.410 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:49:05.880 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:49:06.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:06.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:06.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:06.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:06.350 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:49:06.823 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:49:07.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:07.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:07.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:07.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:07.294 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:49:07.768 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:49:08.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:49:08.722 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:49:09.194 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:49:09.662 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:49:10.132 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:49:10.604 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:49:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:49:11.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:11.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:11.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:11.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:11.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:11.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:11.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:11.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:11.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:11.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:11.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:11.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:11.424 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:49:11.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:11.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:16.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:16.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:16.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:16.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:16.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:16.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:16.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:16.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:16.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:16.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:16.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:16.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:49:16.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:16.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:16.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:49:16.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:16.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:16.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:49:16.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:16.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:49:16.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:49:16.433 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:49:16.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:16.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:16.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:49:16.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:49:16.943 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:16.944 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:49:16.944 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:49:16.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:16.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:16.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:16.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:17.378 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:49:17.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:17.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:17.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:17.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:17.847 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:49:17.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:17.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:17.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:17.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:17.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:18.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:49:18.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:18.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:18.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:18.784 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:49:19.254 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:49:19.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:19.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:19.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:19.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:19.728 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:49:20.200 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:49:20.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:20.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:20.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:20.671 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:49:21.141 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:49:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:21.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:21.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:21.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:21.610 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:49:22.080 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:49:22.549 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:49:23.020 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:49:23.491 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:49:23.962 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:49:24.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:49:24.903 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:49:25.374 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:49:25.843 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:49:26.316 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:49:26.788 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:49:27.257 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:49:27.730 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:49:28.208 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:49:28.685 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:49:29.157 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:49:29.628 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:49:29.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:29.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:29.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:29.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:29.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:29.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:29.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:29.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:29.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:29.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:29.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:29.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:29.741 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:29.741 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:34.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:34.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:34.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:34.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:34.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:34.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:34.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:34.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:34.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:34.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:34.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:49:34.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:49:34.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:49:34.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:34.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:34.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:34.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:49:34.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:34.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:49:34.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:49:34.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:49:34.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:34.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:34.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:34.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:49:34.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:34.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:49:34.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:49:34.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:49:34.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:34.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:34.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:34.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:49:34.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:34.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:49:34.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:49:34.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:49:34.762 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:49:34.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:34.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:49:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:49:35.295 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:35.297 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:49:35.299 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:49:35.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:35.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:35.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:35.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:35.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:35.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:35.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:35.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:35.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:35.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:49:35.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:35.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:35.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:35.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:36.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:49:36.332 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:36.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:49:36.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:36.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:36.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:36.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:36.860 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:37.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:49:37.380 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:37.606 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:49:37.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:37.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:37.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:37.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:38.077 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:49:38.547 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:49:38.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:38.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:38.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:38.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:49:39.396 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:39.489 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:49:39.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:39.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:39.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:39.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:39.925 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:39.960 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:49:40.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:49:40.441 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:40.905 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:49:40.964 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:41.380 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:49:41.853 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:49:42.326 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:49:42.796 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:49:42.970 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:43.265 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:49:43.736 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:49:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:49:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:49:45.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:45.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:45.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:45.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:45.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:45.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:45.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:45.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:45.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:45.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:45.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:45.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:45.020 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:45.020 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2216 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:50.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:50.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:50.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:50.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:50.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:50.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:50.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:50.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:50.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:49:50.031 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:49:50.032 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:49:50.032 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:50.032 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:50.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:50.033 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:49:50.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:50.033 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:49:50.035 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:49:50.035 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:49:50.035 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:50.035 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:50.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:50.036 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:49:50.036 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:50.036 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:49:50.038 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:49:50.039 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:49:50.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:50.039 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:50.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:50.039 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:49:50.039 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:50.039 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.043 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:49:50.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:49:50.044 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:49:50.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:50.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:49:50.526 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:49:50.577 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:50.577 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:49:50.578 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:49:50.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:50.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:50.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:50.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:50.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:50.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:50.584 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:50.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:50.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:50.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:50.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:50.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:50.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:50.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:50.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:50.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:50.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:50.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:50.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:50.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:50.718 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:50.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:50.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:50.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:50.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:50.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:50.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:50.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:50.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:50.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:50.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:50.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:50.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:50.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:50.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:50.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:50.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:50.996 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:49:50.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:51.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:51.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:51.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:51.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:49:51.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.562 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:51.562 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:49:51.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.566 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:51.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.615 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:51.615 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:49:51.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.626 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:51.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:51.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:51.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:51.815 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:49:51.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.836 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:51.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.898 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:51.898 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:49:51.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:51.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.924 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:51.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:51.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:51.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:51.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:51.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:51.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:51.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:51.944 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:49:51.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:51.998 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:51.998 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.012 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:52.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:52.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:52.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:52.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:52.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:52.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:52.032 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:52.032 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:52.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:52.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:52.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:52.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:52.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.267 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:52.267 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=480 tn=4 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:52.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:52.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:52.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:52.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:52.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:52.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:52.324 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:52.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.417 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:49:52.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.529 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:52.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:52.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:52.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:52.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:52.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:52.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:52.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:52.604 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:52.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.774 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:52.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:52.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:52.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:52.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:52.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:52.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:52.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:52.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:52.840 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:52.840 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:52.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:52.893 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:49:53.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.035 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:53.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:53.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:53.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:53.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:53.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:53.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:53.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:53.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:53.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:53.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:53.082 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:53.082 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:53.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.290 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:53.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:53.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:53.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:53.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:53.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:53.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:53.311 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:53.311 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:53.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.365 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:49:53.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.552 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:53.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:53.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:53.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:53.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:53.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:53.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:53.601 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:49:53.601 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:49:53.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:53.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:53.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:53.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:53.798 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:49:53.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:49:53.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:53.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:53.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:53.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:53.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:53.812 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:49:53.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:53.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:53.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:49:58.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:49:58.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:49:58.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:58.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:58.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:58.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:58.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:49:58.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:58.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:58.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:49:58.823 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:49:58.826 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:49:58.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:49:58.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:58.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:58.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:49:58.828 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:49:58.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:49:58.828 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:49:58.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:49:58.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:49:58.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:58.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:58.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:49:58.831 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:49:58.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:49:58.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:58.832 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:49:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:49:58.832 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:49:58.834 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:49:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:49:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:49:58.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:49:58.835 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:49:58.835 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:49:58.835 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.835 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:49:58.840 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:49:59.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:49:59.367 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:49:59.370 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:49:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:59.372 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:49:59.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:49:59.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:49:59.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:49:59.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:59.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:59.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:59.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:49:59.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:49:59.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 02:49:59.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:49:59.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:49:59.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:59.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:49:59.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:49:59.791 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:49:59.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:49:59.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:49:59.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:49:59.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:00.266 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:50:00.739 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:50:00.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:00.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:00.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:00.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:50:01.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:50:01.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:50:01.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:01.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:01.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:01.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:01.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:01.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:01.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:01.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:01.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:01.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:01.463 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:01.463 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:06.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:06.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:06.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:06.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:06.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:06.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:06.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:06.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:06.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:06.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:06.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:06.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:06.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:06.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:06.471 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:06.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:06.472 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:06.472 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:06.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:06.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:06.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:06.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:06.473 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:06.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:06.473 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:06.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:06.474 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:06.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:06.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:06.476 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:06.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:11.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:11.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:11.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:11.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:11.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:11.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:11.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:11.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:11.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:11.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:11.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:11.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:11.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:11.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:11.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:11.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:11.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:11.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:11.484 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:11.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:11.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:11.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:11.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:11.486 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:11.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:11.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:50:11.963 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:50:12.017 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:50:12.019 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:50:12.021 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:50:12.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:50:12.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:50:12.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:12.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:12.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:12.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:50:13.377 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:50:13.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:13.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:13.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:13.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:13.852 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:50:14.320 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:50:14.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:14.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:14.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:14.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:14.790 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:50:15.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:50:15.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:15.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:15.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:15.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:15.728 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:50:16.196 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:50:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:16.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:16.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:16.665 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:50:17.132 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:50:17.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:17.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:17.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:17.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:17.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:17.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:17.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:17.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:17.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:17.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:17.511 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:17.511 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1308 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:22.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:22.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:22.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:22.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:22.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:22.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:22.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:22.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:22.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:22.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:22.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:22.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:22.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:22.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:22.528 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:22.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:22.528 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:22.528 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:22.528 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:22.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:22.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:22.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:22.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:22.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:22.532 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:22.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:22.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:22.535 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:22.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:22.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:50:23.016 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:50:23.051 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:50:23.052 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:50:23.052 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:50:23.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:50:23.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:50:23.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:23.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:23.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:23.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:23.965 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:50:24.437 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:50:24.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:24.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:24.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:24.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:24.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:50:25.384 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:50:25.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:25.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:25.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:25.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:25.853 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:50:26.321 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:50:26.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:26.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:26.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:26.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:26.790 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:50:27.260 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:50:27.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:27.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:27.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:27.730 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:50:28.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:28.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:28.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:28.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:28.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:28.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:28.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:28.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:28.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:28.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:28.067 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:28.067 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:33.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:33.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:33.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:33.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:33.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:33.066 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:33.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:33.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:33.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:33.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:33.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:33.069 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:33.069 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:33.070 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:33.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:33.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:33.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:33.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:33.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:33.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:33.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:33.072 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:33.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:33.072 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:33.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:33.073 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:33.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:33.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:33.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:33.074 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:38.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:38.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:38.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:38.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:38.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:38.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:38.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:38.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:38.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:38.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:38.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:38.104 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:38.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:38.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:38.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:38.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:38.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:38.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:38.105 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:38.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:38.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:38.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:38.108 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:38.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:38.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:38.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:38.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:38.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:38.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:38.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:38.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:38.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:38.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:38.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:38.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:38.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:38.116 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:38.116 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:38.116 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:38.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:38.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:50:38.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:50:38.677 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:50:38.678 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:50:38.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:50:38.680 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:50:38.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:50:38.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:50:38.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:50:39.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:50:39.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:39.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:39.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:39.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:39.548 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:50:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:50:39.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:50:39.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:50:39.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:50:39.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:50:40.020 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:50:40.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:40.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:40.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:40.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:40.490 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:50:40.964 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:50:41.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:41.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:41.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:41.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:41.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:50:41.914 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:50:42.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:42.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:42.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:42.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:42.386 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:50:42.858 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:50:43.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:43.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:43.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:43.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:43.329 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:50:43.799 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:50:44.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:50:44.737 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:50:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:50:45.677 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:50:46.146 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:50:46.616 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:50:47.086 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:50:47.557 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:50:48.028 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:50:48.496 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:50:48.963 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:50:49.434 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:50:49.901 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:50:50.368 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:50:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:50:51.303 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:50:51.771 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:50:52.239 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:50:52.710 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:50:53.177 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:50:53.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:50:53.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:50:53.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:53.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:53.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:53.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:53.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:53.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:53.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:53.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:53.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:53.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:53.464 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:53.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3328 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:50:58.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:50:58.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:50:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:58.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:58.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:58.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:50:58.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:58.469 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:58.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:50:58.469 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:58.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:50:58.470 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:50:58.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:58.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:50:58.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:50:58.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:50:58.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:50:58.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:58.472 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:50:58.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:50:58.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:50:58.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:50:58.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:50:58.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:50:58.473 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:50:58.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:50:58.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:50:58.478 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:50:58.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:50:58.985 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:50:58.985 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:50:58.985 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:50:58.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:50:58.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:50:58.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:50:58.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:50:58.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:50:58.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:50:58.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:50:58.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:50:58.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:50:59.038 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:50:59.039 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:50:59.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:50:59.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:50:59.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:50:59.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:50:59.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:50:59.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:50:59.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:50:59.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:50:59.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:50:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:50:59.890 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:00.360 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:51:00.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:00.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:00.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:00.828 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:51:01.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:51:01.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:01.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:01.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:01.764 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:51:02.231 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:51:02.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:02.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:02.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:02.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:02.702 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:51:03.173 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:51:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:03.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:03.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:03.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:03.644 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:51:04.116 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:51:04.587 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:51:05.057 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:51:05.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:51:05.999 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:51:06.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:51:06.938 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:51:07.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:07.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:07.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:07.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:07.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:07.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:07.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:07.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:07.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:07.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:07.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:07.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:07.047 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:07.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:07.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:12.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:12.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:12.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:12.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:12.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:12.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:12.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:12.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:12.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:12.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:12.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:51:12.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:51:12.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:51:12.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:12.059 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:12.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:12.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:51:12.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:12.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:12.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:51:12.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:12.061 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:12.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:51:12.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:12.063 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.066 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:51:12.066 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:51:12.067 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:51:12.067 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:12.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:12.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:12.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:12.071 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:51:12.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:51:12.587 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:12.588 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:12.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:12.589 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:51:12.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:12.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:12.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:12.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:12.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:12.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:12.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:12.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:12.632 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:12.634 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:12.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:12.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:12.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:12.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:12.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:13.013 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:51:13.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:13.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:13.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:13.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:13.485 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:51:14.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:14.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:14.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:14.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:14.427 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:51:14.898 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:51:15.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:15.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:15.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:15.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:15.368 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:51:15.839 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:51:16.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:16.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:16.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:16.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:16.310 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:51:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:51:17.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:17.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:17.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:17.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:17.251 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:51:17.722 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:51:18.193 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:51:18.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:51:19.135 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:51:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:51:20.076 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:51:20.547 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:51:20.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:20.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:20.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:20.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:20.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:20.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:20.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:20.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:20.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:20.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:20.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:20.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:20.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:20.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:20.650 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:20.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:20.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:20.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:20.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:25.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:25.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:25.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:25.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:25.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:25.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:25.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:25.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:25.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:25.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:25.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:25.661 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:51:25.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:25.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:25.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:51:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:25.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:51:25.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:51:25.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:51:25.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:25.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:25.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:25.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:51:25.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:25.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:51:25.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:51:25.669 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:51:25.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:51:26.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:51:26.193 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:26.194 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:26.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:26.195 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:51:26.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:26.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:26.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:26.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:26.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:26.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:26.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:26.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:26.235 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:26.236 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:26.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:26.243 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:51:26.243 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:51:26.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:26.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:26.615 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:51:26.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:26.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:26.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:26.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:27.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:27.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:27.279 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:51:27.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:27.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:27.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:27.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:27.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:27.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:27.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:27.281 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:27.281 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:27.282 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:32.282 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:32.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:32.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:32.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:32.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:32.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:32.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:32.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:32.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:32.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:32.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:51:32.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:51:32.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:51:32.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:32.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:32.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:32.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:51:32.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:32.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:51:32.294 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:51:32.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:51:32.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:32.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:32.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:32.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:51:32.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:32.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:32.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:51:32.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:32.297 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:51:32.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:51:32.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:51:32.301 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:32.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:32.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:51:32.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:51:32.825 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:32.826 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:32.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:32.827 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:51:32.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:32.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:32.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:32.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:32.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:32.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:32.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:32.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:32.866 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:32.867 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:32.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:32.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:51:32.875 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:51:32.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:32.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:33.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:51:33.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:33.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:33.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:33.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:33.718 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:33.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:33.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:33.915 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:51:33.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:33.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:33.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:33.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:33.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:33.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:33.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:33.917 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:33.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:38.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:38.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:38.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:38.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:38.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:38.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:38.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:38.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:38.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:38.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:38.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:51:38.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:51:38.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:51:38.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:38.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:38.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:38.928 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:51:38.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:38.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:51:38.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:51:38.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:51:38.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:38.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:38.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:38.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:51:38.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:38.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:38.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:51:38.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:38.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:51:38.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:51:38.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:51:38.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:51:38.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:51:38.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:51:38.937 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:51:38.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:38.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:38.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:51:39.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:51:39.460 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:39.460 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:39.462 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:51:39.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:39.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:39.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:39.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:39.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:39.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:39.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:39.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:39.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:39.502 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:39.504 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:39.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:39.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:51:39.511 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:51:39.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:39.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:39.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:51:39.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:39.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:39.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:39.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:40.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:40.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:40.547 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:51:40.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:40.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:40.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:40.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:40.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:40.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:40.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:40.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:40.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:40.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:40.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:40.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:45.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:45.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:45.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:45.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:45.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:45.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:45.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:45.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:45.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:45.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:51:45.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:51:45.560 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:51:45.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:51:45.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:45.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:45.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:45.561 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:51:45.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:51:45.561 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:51:45.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:51:45.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:51:45.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:45.563 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:45.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:45.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:51:45.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:51:45.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:45.565 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:51:45.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:51:45.565 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:51:45.568 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:51:45.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:51:45.569 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:51:45.569 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:51:45.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:51:45.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:51:46.044 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:51:46.091 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:46.093 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:46.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:46.093 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:51:46.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:46.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:46.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:46.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:46.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:46.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:46.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:46.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:46.134 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:46.136 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:46.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:46.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:46.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:46.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:46.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:46.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:51:46.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:46.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:46.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:46.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:46.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:51:47.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:51:47.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:47.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:47.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:47.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:47.929 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:51:48.399 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:51:48.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:48.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:48.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:48.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:48.870 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:51:49.341 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:51:49.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:49.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:49.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:49.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:49.812 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:51:50.282 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:51:50.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:50.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:50.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:50.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:50.753 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:51:51.224 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:51:51.695 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:51:52.165 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:51:52.636 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:51:53.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:51:53.578 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:51:54.048 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:51:54.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:54.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:54.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:54.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:54.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:54.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:54.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:51:54.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:54.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:51:54.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:51:54.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:51:54.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:51:54.184 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:51:54.186 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:51:54.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:51:54.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:51:54.193 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:51:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:51:54.520 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:51:54.990 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:51:55.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:51:55.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:51:55.224 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:51:55.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:51:55.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:51:55.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:51:55.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:51:55.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:51:55.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:51:55.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:51:55.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:51:55.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:51:55.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:51:55.226 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:51:55.226 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2093 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:55.226 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2093 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:55.226 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2093 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:55.226 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2093 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:51:55.226 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2093 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:00.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:00.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:00.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:00.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:00.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:00.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:00.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:00.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:00.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:00.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:00.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:52:00.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:52:00.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:52:00.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:00.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:00.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:00.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:52:00.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:00.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:52:00.246 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:52:00.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:52:00.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:00.247 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:00.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:00.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:52:00.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:00.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:00.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:52:00.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:00.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:52:00.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:52:00.253 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:52:00.253 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:00.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:52:00.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:52:00.778 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:00.778 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:00.780 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:52:00.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:00.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:00.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:00.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:00.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:00.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:00.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:00.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:00.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:00.834 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:00.837 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:00.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:00.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:52:00.850 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:52:00.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:00.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:01.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:52:01.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:01.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:01.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:01.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:01.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:52:01.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:01.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:01.885 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:52:01.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:01.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:01.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:01.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:01.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:01.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:01.890 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:52:01.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:01.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:06.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:06.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:06.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:06.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:06.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:06.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:06.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:06.892 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:06.893 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:06.893 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:06.893 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:52:06.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:52:06.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:52:06.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:06.894 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:06.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:06.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:52:06.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:06.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:06.895 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:06.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:06.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:06.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:52:06.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:06.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.898 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:52:06.898 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:52:06.898 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:52:06.898 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:06.903 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:52:07.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:52:07.410 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:07.411 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:07.411 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:52:07.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:07.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:07.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:07.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:07.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:07.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:07.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:07.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:07.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:07.464 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:07.464 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:07.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:07.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:07.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:07.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:07.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:07.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:52:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:07.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:07.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:08.312 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:52:08.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:52:08.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:08.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:08.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:08.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:09.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:52:09.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:52:09.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:09.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:09.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:09.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:10.185 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:52:10.653 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:52:10.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:10.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:10.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:10.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:11.123 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:52:11.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:52:11.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:11.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:11.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:11.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:12.058 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:52:12.526 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:52:12.994 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:52:13.461 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:52:13.929 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:52:14.397 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:52:14.866 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:52:15.337 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:52:15.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:15.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:15.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:15.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:15.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:15.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:15.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:15.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:15.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:15.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:15.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:15.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:15.518 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:15.519 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:15.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:15.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:15.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:15.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:15.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:15.808 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:52:16.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:52:16.749 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:52:17.220 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:52:17.690 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:52:18.161 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:52:18.635 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:52:19.108 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:52:19.586 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:52:20.064 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:52:20.541 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:52:21.018 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:52:21.496 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:52:21.974 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:52:22.452 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:52:22.930 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:52:23.407 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:52:23.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:23.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:23.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:23.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:23.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:23.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:23.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:23.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:23.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:23.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:23.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:23.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:23.592 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:23.595 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:23.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:23.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:23.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:23.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:23.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:23.885 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:52:24.362 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:52:24.840 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:52:25.318 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:52:25.796 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:52:26.274 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:52:26.751 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:52:27.227 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:52:27.705 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:52:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:52:28.661 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:52:29.138 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:52:29.616 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:52:30.092 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:52:30.570 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:52:31.047 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:52:31.525 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:52:31.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:31.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:31.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:31.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:31.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:31.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:31.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:31.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:31.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:31.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:31.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:31.663 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:31.668 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:31.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:31.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:31.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:31.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:31.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:32.002 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:52:32.479 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:52:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:52:33.435 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:52:33.913 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:52:34.390 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:52:34.868 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:52:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:52:35.824 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:52:36.302 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:52:36.780 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:52:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:52:37.736 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:52:38.214 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:52:38.690 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:52:39.167 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:52:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:52:39.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:39.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:39.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:39.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:39.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:39.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:39.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:39.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:39.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:39.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:39.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:39.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:39.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:39.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:39.700 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:39.700 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:44.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:44.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:44.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:44.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:44.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:44.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:44.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:44.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:44.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:44.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:44.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:52:44.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:52:44.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:52:44.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:44.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:44.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:44.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:52:44.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:44.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:52:44.710 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:52:44.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:52:44.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:44.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:44.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:44.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:52:44.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:44.711 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:44.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:52:44.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:44.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:52:44.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:52:44.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:52:44.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:52:44.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:52:44.716 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:52:44.716 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:52:44.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:44.721 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:52:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:52:45.245 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:45.248 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:45.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:45.250 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:52:45.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:45.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:45.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:45.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:45.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:45.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:45.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:45.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:45.296 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:45.299 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:45.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:45.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:52:45.306 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:52:45.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:45.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:52:45.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:45.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:45.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:45.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:52:46.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:52:46.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:46.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:46.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:46.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:47.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:52:47.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:52:47.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:47.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:47.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:47.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:47.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:47.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:47.824 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:52:47.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:47.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:47.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:47.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:47.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:47.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:47.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:47.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:47.831 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=664 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:47.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:52.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:52.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:52.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:52.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:52.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:52.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:52.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:52.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:52.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:52.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:52.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:52:52.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:52:52.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:52:52.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:52.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:52.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:52.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:52:52.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:52.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:52:52.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:52:52.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:52:52.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:52.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:52.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:52.854 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:52:52.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:52.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:52:52.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:52:52.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:52:52.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:52.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:52.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:52.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:52:52.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:52.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:52:52.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:52:52.859 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:52:52.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:52.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:52:53.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:52:53.388 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:53.390 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:53.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:53.392 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:52:53.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:53.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:53.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:52:53.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:53.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:52:53.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:52:53.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:52:53.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:52:53.440 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:52:53.444 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:52:53.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:52:53.456 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:52:53.457 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:52:53.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:53.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:52:53.817 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:52:53.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:53.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:53.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:53.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:54.287 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:52:54.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:52:54.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:52:54.486 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:52:54.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:52:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:52:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:52:54.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:52:54.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:54.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:54.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:54.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:54.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:54.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:54.494 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (TRX2@172.18.28.20:5700/2) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:54.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:52:59.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:52:59.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:52:59.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:59.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:59.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:59.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:59.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:52:59.510 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:59.510 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:59.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:52:59.511 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:52:59.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:52:59.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:52:59.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:59.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:59.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:52:59.516 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:52:59.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:52:59.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:52:59.519 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:52:59.519 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:52:59.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:59.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:59.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:52:59.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:52:59.520 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:52:59.520 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:52:59.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:52:59.522 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:52:59.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:59.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:52:59.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:52:59.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:52:59.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:52:59.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:52:59.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:52:59.525 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:52:59.526 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:52:59.530 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:53:00.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:53:00.058 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:53:00.060 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:53:00.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:00.062 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:53:00.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:00.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:00.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:53:00.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:00.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:00.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:00.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:53:00.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:53:00.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:00.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:00.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:00.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:00.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:00.487 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:53:00.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:00.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:00.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:00.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:00.978 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:53:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:53:01.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:01.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:01.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:01.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:01.934 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:53:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:53:02.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:02.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:02.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:02.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:02.890 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:53:03.368 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:53:03.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:03.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:03.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:03.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:03.846 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:53:04.324 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:53:04.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:04.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:04.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:04.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:04.801 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:53:05.279 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:53:05.757 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:53:06.235 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:53:06.713 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:53:07.191 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:53:07.669 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:53:08.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:08.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:08.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:08.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:08.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:08.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:08.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:08.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:08.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:08.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:08.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:08.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:08.144 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:53:13.143 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:13.143 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:13.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:13.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:13.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:13.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:13.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:13.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:13.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:13.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:13.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:53:13.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:53:13.160 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:53:13.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:13.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:13.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:13.162 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:53:13.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:13.162 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:53:13.164 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:53:13.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:53:13.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:13.165 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:13.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:13.165 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:53:13.165 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:13.166 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:53:13.167 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:53:13.168 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:53:13.168 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:13.168 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:13.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:13.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:53:13.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:13.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:53:13.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:53:13.172 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:53:13.172 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:53:13.172 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:13.177 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:53:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:53:13.702 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:53:13.704 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:53:13.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:13.706 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:53:13.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:13.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:13.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:53:13.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:13.737 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:13.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:13.737 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:53:13.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:53:13.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:13.763 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:53:13.763 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:53:13.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:13.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:14.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:53:14.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:14.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:14.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:14.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:53:15.094 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:53:15.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:15.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:15.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:15.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:15.569 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:53:16.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:53:16.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:16.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:16.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:16.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:16.508 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:53:16.978 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:53:17.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:17.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:17.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:17.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:17.456 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:53:17.929 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:53:18.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:18.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:18.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:18.398 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:53:18.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:53:19.340 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:53:19.813 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:53:20.282 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:53:20.752 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:53:21.223 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:53:21.694 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:53:21.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:21.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:21.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:21.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:21.773 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:53:21.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:21.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:21.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:21.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:21.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:21.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:21.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:21.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:21.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:21.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:21.780 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:53:26.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:26.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:26.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:26.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:26.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:26.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:26.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:26.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:26.797 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:26.797 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:26.797 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:53:26.801 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:53:26.801 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:53:26.802 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:26.802 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:26.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:26.802 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:53:26.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:26.803 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:53:26.805 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:53:26.806 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:53:26.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:26.806 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:26.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:26.806 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:53:26.806 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:26.806 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:26.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:53:26.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:26.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:53:26.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:53:26.813 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:53:26.813 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:53:26.813 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:26.818 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:53:27.301 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:53:27.340 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:53:27.341 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:53:27.342 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:53:27.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:27.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:27.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:27.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:53:27.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:27.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:27.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:27.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:53:27.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:53:27.778 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:53:27.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:27.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:27.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:27.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:28.256 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:53:28.734 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:53:28.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:28.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:28.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:28.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:29.211 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:53:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:53:29.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:29.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:29.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:29.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:30.166 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:53:30.644 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:53:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:30.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:30.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:30.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:31.122 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:53:31.600 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:53:31.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:31.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:32.077 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:53:32.555 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:53:33.033 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:53:33.511 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:53:33.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:33.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:33.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:33.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:33.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:33.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:33.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:33.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:33.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:33.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:33.858 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:33.858 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:53:38.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:38.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:38.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:38.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:38.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:38.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:38.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:38.872 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:38.872 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:38.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:38.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:53:38.876 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:53:38.876 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:53:38.876 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:38.877 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:38.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:38.877 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:53:38.877 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:38.877 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:53:38.879 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:53:38.880 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:53:38.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:38.880 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:38.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:38.880 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:53:38.880 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:38.880 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:53:38.882 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:53:38.882 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:53:38.882 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:38.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:38.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:38.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:53:38.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:38.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:53:38.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:53:38.886 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:53:38.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:38.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:53:39.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:53:39.417 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:53:39.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:39.419 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:53:39.420 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:53:39.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:39.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:39.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:53:39.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:39.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:39.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:39.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:53:39.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:53:39.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:53:39.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:39.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:39.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:39.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:40.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:53:40.807 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:53:40.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:40.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:40.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:40.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:41.285 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:53:41.762 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:53:41.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:41.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:41.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:41.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:42.240 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:53:42.718 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:53:42.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:42.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:42.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:42.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:43.196 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:53:43.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:53:43.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:43.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:43.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:43.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:43.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:43.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:43.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:43.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:43.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:43.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:43.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:43.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:43.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:43.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:44.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:53:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:53:45.126 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:53:45.612 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:53:46.099 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:53:46.586 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:53:47.072 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:53:47.558 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:53:48.045 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:53:48.531 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:53:48.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:48.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:48.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:48.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:48.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:48.937 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:53:48.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:48.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:48.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:48.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:48.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:48.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:48.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:48.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:48.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:53:48.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:48.945 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:48.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:53:48.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:48.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:48.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:53:48.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:48.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:53:48.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:53:48.949 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:53:48.949 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:53:48.949 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:48.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:48.950 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:48.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:53:53.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:53:53.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:53.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:53.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:53.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:53.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:53:53.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:53.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:53.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:53:53.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:53:53.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:53:53.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:53:53.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:53.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:53.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:53:53.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:53:53.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:53:53.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:53:53.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:53:53.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:53:53.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:53.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:53.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:53:53.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:53:53.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:53:53.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:53.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:53:53.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:53:53.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:53:53.980 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:53:53.981 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:53:53.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:53:53.985 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:53:54.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:53:54.509 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:53:54.512 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:53:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:53:54.514 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:53:54.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:53:54.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:53:54.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:53:54.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:53:54.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:53:54.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:53:54.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:53:54.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:53:54.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:53:54.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:54.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:54.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:54.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:55.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:53:55.897 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:53:55.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:55.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:55.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:55.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:56.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:53:56.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:53:56.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:56.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:56.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:56.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:57.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:53:57.798 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:53:57.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:57.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:57.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:57.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:58.274 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:53:58.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:53:58.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:53:58.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:53:58.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:53:58.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:53:59.230 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:53:59.708 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:54:00.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:00.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:54:00.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:54:01.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:01.141 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:54:01.619 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:54:02.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:02.096 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:54:02.573 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:54:03.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:03.051 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:54:03.529 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:54:04.007 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:54:04.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:04.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:04.484 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:54:04.962 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:54:05.442 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:54:05.922 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:54:06.401 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:54:06.882 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:54:07.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:07.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:54:07.865 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:54:08.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:08.344 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:54:08.821 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:54:09.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:09.298 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:54:09.776 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:54:10.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:10.254 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:54:10.732 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:54:11.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:11.209 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:54:11.687 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:54:12.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:12.165 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:54:12.642 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:54:13.120 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:54:13.597 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:54:14.074 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:54:14.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:14.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:14.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:14.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:14.189 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:54:19.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:19.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:19.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:19.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:19.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:19.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:19.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:19.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:19.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:19.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:19.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:54:19.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:54:19.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:54:19.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:19.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:19.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:19.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:54:19.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:19.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:54:19.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:54:19.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:54:19.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:19.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:19.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:19.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:54:19.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:19.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:19.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:54:19.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:19.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:54:19.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:54:19.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:54:19.221 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:54:19.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:19.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:54:19.708 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:54:19.748 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:54:19.750 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:54:19.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:19.752 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:54:19.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:19.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:19.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:54:19.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:19.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:19.786 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:19.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:54:19.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:54:19.801 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:54:19.803 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:54:19.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:54:19.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:19.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:19.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:19.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:19.838 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.852 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.866 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.880 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.894 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.908 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.922 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.935 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.949 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.963 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.977 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:19.991 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.018 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.032 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.046 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.060 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.074 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.088 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.102 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.116 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.129 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.143 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.157 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.171 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.182 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:54:20.199 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.213 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:20.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:20.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:20.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:20.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:20.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:54:21.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:54:21.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:21.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:21.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:21.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:21.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:21.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:21.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:21.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:21.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:21.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:21.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:21.116 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:54:26.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:26.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:26.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:26.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:26.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:26.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:26.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:26.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:26.131 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:26.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:26.131 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:54:26.134 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:54:26.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:54:26.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:26.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:26.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:26.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:54:26.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:26.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:54:26.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:54:26.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:54:26.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:26.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:26.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:26.138 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:54:26.138 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:26.138 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:26.140 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:54:26.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:26.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:54:26.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:54:26.143 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:54:26.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:26.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:54:26.631 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:54:26.670 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:54:26.671 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:54:26.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:26.672 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:54:26.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:26.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:26.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:54:26.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:26.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:26.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:26.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:54:26.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:54:26.723 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:54:26.727 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:54:26.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:54:26.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:26.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:26.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:26.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:26.761 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.775 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.789 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.803 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.817 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.831 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.844 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.858 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.872 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.886 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.900 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.914 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.941 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.955 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.969 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.983 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:26.997 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.011 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.024 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.038 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.052 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.066 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.080 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.094 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:54:27.129 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.143 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2026-01-23 02:54:27.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:27.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:27.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:27.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:27.588 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:54:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 02:54:28.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:28.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:28.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:28.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:28.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:28.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:28.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:28.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:28.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:28.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:28.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:28.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:28.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:28.049 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:54:28.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.050 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.051 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:28.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:54:33.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:54:33.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:54:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:33.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:33.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:54:33.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:33.060 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:33.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:54:33.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:54:33.064 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:54:33.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:54:33.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:33.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:33.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:54:33.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:54:33.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:54:33.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:54:33.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:54:33.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:54:33.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:33.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:33.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:54:33.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:54:33.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:54:33.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:54:33.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:54:33.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:54:33.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:33.072 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:54:33.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:54:33.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:54:33.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:54:33.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:54:33.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:54:33.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:54:33.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.076 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:54:33.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:54:33.076 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:54:33.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:54:33.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:54:33.605 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:54:33.607 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:54:33.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:33.610 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:54:33.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:33.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:33.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:54:33.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:33.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:33.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:33.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:54:33.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:54:33.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:33.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:33.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:33.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:33.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:34.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:54:34.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:34.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:34.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:34.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:34.521 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:54:34.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:54:35.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:35.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:35.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:35.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:35.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:54:35.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:54:36.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:36.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:36.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:36.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:36.433 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:54:36.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:54:37.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:37.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:37.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:37.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:37.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:54:37.866 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:54:38.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:54:38.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:54:38.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:54:38.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:54:38.343 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:54:38.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:54:39.298 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:54:39.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:54:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:54:40.732 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:54:41.209 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:54:41.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:54:42.165 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:54:42.643 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:54:43.121 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:54:43.598 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:54:44.076 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:54:44.554 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:54:45.032 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:54:45.510 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:54:45.988 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:54:46.465 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:54:46.943 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:54:47.421 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:54:47.899 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:54:48.378 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:54:48.856 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:54:49.334 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:54:49.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:49.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:49.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:49.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:49.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:54:49.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:54:49.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:54:49.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:49.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:54:49.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:54:49.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:54:49.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:54:49.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:54:49.717 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:54:49.717 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 02:54:49.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:49.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:54:49.811 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:54:50.289 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:54:50.767 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:54:51.246 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:54:51.725 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:54:52.203 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:54:52.681 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:54:53.160 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:54:53.635 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:54:54.113 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:54:54.591 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:54:55.070 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:54:55.548 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:54:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:54:56.504 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:54:56.983 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:54:57.461 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:54:57.940 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:54:58.418 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:54:58.896 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 02:54:59.374 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 02:54:59.852 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 02:55:00.330 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 02:55:00.809 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 02:55:01.287 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 02:55:01.765 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 02:55:02.244 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 02:55:02.722 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 02:55:03.200 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 02:55:03.669 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 02:55:04.139 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 02:55:04.608 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 02:55:05.077 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 02:55:05.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:05.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:05.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:05.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:05.265 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:55:05.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:05.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:05.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:55:05.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:05.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:55:05.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:55:05.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:55:05.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:55:05.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:05.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:55:05.308 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 02:55:05.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:05.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:05.547 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 02:55:06.015 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 02:55:06.484 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 02:55:06.958 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 02:55:07.433 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 02:55:07.907 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 02:55:08.381 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 02:55:08.850 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 02:55:09.319 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 02:55:09.788 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 02:55:10.257 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 02:55:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 02:55:11.195 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 02:55:11.669 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 02:55:12.145 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 02:55:12.617 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 02:55:13.086 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 02:55:13.554 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 02:55:14.023 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 02:55:14.500 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 02:55:14.975 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 02:55:15.454 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 02:55:15.928 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 02:55:16.397 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 02:55:16.865 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 02:55:17.339 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 02:55:17.812 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 02:55:18.280 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 02:55:18.750 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 02:55:19.218 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 02:55:19.692 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 02:55:20.165 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 02:55:20.634 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 02:55:20.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:20.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:20.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:20.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:20.708 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:55:20.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:20.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:20.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:55:20.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:20.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:55:20.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:55:20.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:55:20.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:55:20.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:20.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:20.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:55:20.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:55:20.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:20.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:21.104 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 02:55:21.575 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 02:55:22.052 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 02:55:22.528 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 02:55:23.006 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 02:55:23.481 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 02:55:23.958 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 02:55:24.436 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 02:55:24.909 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 02:55:25.388 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 02:55:25.863 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 02:55:26.341 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 02:55:26.816 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 02:55:27.292 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 02:55:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 02:55:28.244 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 02:55:28.722 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 02:55:29.200 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 02:55:29.678 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 02:55:30.156 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 02:55:30.634 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 02:55:31.107 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 02:55:31.584 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 02:55:32.057 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 02:55:32.534 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 02:55:33.005 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 02:55:33.483 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 02:55:33.960 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 02:55:34.437 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 02:55:34.914 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 02:55:35.390 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 02:55:35.868 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 02:55:36.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:36.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:36.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:36.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:36.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:36.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:36.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:36.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:36.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:36.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:36.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:36.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:36.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:55:36.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:55:36.316 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:55:36.317 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.317 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.317 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.318 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.318 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.318 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:36.318 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:55:41.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:55:41.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:55:41.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:41.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:41.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:41.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:41.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:55:41.322 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:41.322 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:55:41.322 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:55:41.325 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:55:41.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:55:41.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:55:41.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:41.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:41.326 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:55:41.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:55:41.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:55:41.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:55:41.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:55:41.328 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:55:41.330 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:55:41.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:55:41.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:55:41.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:41.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:41.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:55:41.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:55:41.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:55:41.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:55:41.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:55:41.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:55:41.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:55:41.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:55:41.334 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:55:41.334 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:55:41.334 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:41.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:55:41.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:55:41.336 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:55:46.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:55:46.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:55:46.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:46.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:46.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:46.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:46.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:46.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:55:46.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:46.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:55:46.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:55:46.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:55:46.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:55:46.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:55:46.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:46.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:46.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:55:46.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:55:46.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:55:46.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:55:46.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:55:46.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:55:46.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:46.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:46.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:55:46.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:55:46.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:55:46.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:55:46.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:55:46.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:55:46.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:55:46.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:46.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:55:46.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:55:46.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:55:46.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:55:46.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:55:46.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:55:46.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:55:46.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:55:46.369 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:55:46.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:55:46.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:55:46.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:55:46.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:55:46.889 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:55:46.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:46.890 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:55:46.891 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:55:46.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:46.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:46.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:55:46.900 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:55:46.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:46.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:55:46.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:55:46.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:55:46.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:55:46.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:46.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:55:46.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:55:46.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:46.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:47.330 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:55:47.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:47.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:47.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:47.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:55:48.285 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:55:48.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:48.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:48.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:48.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:48.761 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:55:49.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:55:49.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:49.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:49.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:49.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:49.709 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:55:50.182 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:55:50.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:50.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:50.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:50.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:50.660 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:55:51.138 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:55:51.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:51.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:51.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:51.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:51.616 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:55:52.094 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:55:52.572 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:55:53.049 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:55:53.526 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:55:54.003 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:55:54.481 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:55:54.959 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:55:55.437 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:55:55.915 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:55:56.393 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:55:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:55:57.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:55:57.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:55:57.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:55:57.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:55:57.348 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:55:57.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:55:57.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:55:57.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:55:57.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:55:57.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:55:57.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:55:57.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:55:57.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:55:57.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:55:57.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:55:57.356 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:56:02.357 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:02.357 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:02.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:02.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:02.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:02.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:02.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:02.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:02.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:02.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:02.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:56:02.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:56:02.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:56:02.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:02.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:02.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:56:02.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:02.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:56:02.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:56:02.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:56:02.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:02.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:02.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:02.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:56:02.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:02.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:02.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:56:02.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:02.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.378 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:56:02.378 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:56:02.378 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:56:02.378 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:02.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:02.383 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:56:02.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:56:02.911 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:56:02.913 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:02.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:02.914 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:56:02.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:02.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:02.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:56:02.935 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:02.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:02.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:02.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:02.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:56:02.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:56:02.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:02.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:02.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:02.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:02.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:03.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:56:03.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:03.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:03.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:03.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:03.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:56:04.281 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:56:04.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:04.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:04.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:04.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:04.759 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:56:05.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:56:05.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:05.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:05.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:05.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:05.713 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:56:06.190 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:56:06.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:06.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:06.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:06.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:06.668 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:56:07.146 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:56:07.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:07.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:07.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:07.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:07.623 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:56:08.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:56:08.575 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:56:09.053 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:56:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:56:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:56:10.485 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:56:10.963 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:56:11.440 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:56:11.918 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:56:12.396 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:56:12.874 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:56:13.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:13.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:13.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:13.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:13.351 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:56:13.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:13.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:13.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:13.353 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:56:13.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:18.356 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:18.356 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:18.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:18.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:18.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:18.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:18.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:18.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:18.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:18.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:18.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:56:18.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:56:18.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:56:18.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:18.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:18.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:56:18.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:18.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:56:18.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:56:18.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:56:18.377 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:18.377 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:18.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:18.377 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:56:18.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:18.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:56:18.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:56:18.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:56:18.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:18.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:18.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:18.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:56:18.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:18.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:56:18.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:56:18.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:56:18.383 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:56:18.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:18.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:56:18.869 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:56:18.906 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:56:18.907 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:18.908 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:56:18.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:18.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:18.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:18.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:56:18.930 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:18.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:18.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:18.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:18.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:56:18.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:56:18.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:18.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:18.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:18.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:18.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:19.347 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:56:19.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:19.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:19.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:19.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:19.825 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:56:19.841 [DEBUG] fake_trx.py:264 (MS@172.18.28.22:6700) Recv SETTA cmd
2026-01-23 02:56:20.303 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:56:20.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:20.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:20.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:20.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:20.782 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:56:21.260 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:56:21.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:21.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:21.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:21.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:21.737 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:56:22.216 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:56:22.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:22.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:22.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:22.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:22.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:56:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:56:23.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:23.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:23.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:23.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:23.646 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:56:24.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:56:24.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:56:25.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:56:25.557 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:56:26.035 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:56:26.512 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:56:26.990 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:56:27.468 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:56:27.946 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:56:28.424 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:56:28.901 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:56:29.379 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:56:29.857 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:56:30.335 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:56:30.812 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:56:31.290 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:56:31.768 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:56:32.246 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:56:32.723 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:56:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:56:33.679 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:56:34.157 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:56:34.635 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:56:35.113 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:56:35.591 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:56:36.069 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:56:36.547 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:56:37.025 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:56:37.503 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:56:37.980 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:56:38.457 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:56:38.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:38.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:38.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:38.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:38.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:38.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:38.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:38.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:38.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:38.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:38.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:38.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:38.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:38.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:38.572 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:56:38.572 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:38.572 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:38.572 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:38.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:38.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:38.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:56:43.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:43.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:43.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:43.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:43.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:43.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:43.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:43.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:43.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:43.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:43.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:56:43.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:56:43.588 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:56:43.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:43.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:43.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:43.589 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:56:43.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:43.589 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:43.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:56:43.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:43.591 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:43.593 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:56:43.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:43.593 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:56:43.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:56:43.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:56:43.596 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:56:43.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:56:44.085 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:56:44.121 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:56:44.122 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:44.123 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:56:44.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:44.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:44.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:44.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:56:44.150 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:56:44.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:44.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:44.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:44.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:56:44.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:56:44.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:44.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:56:44.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:56:44.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:44.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:44.560 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:56:44.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:44.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:44.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:44.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:45.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:56:45.513 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:56:45.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:45.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:45.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:45.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:45.988 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:56:46.465 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:56:46.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:46.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:46.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:46.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:46.939 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:56:47.416 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:56:47.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:47.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:47.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:47.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:47.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:56:48.372 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:56:48.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:48.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:48.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:48.850 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:56:49.327 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:56:49.805 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:56:50.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:56:50.761 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:56:51.239 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:56:51.717 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:56:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:56:52.673 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:56:53.150 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:56:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:56:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:56:54.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:56:54.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:56:54.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:56:54.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:56:54.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:54.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:54.572 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:56:54.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:59.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:56:59.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:56:59.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:59.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:59.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:59.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:59.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:56:59.589 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:59.590 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:59.590 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:56:59.590 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:56:59.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:56:59.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:56:59.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:59.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:59.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:56:59.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:56:59.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:56:59.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:56:59.600 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:56:59.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:56:59.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:59.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:59.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:56:59.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:56:59.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:56:59.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:56:59.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:56:59.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:56:59.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:59.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:56:59.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:56:59.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:56:59.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:56:59.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:56:59.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:56:59.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:56:59.608 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:56:59.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:56:59.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:56:59.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:57:00.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:57:00.134 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:00.136 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:00.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:00.138 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:57:00.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:00.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:00.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:00.177 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:00.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:00.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:00.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:00.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:00.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:00.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:00.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:00.189 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:00.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:00.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:57:00.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:00.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:00.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:00.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:01.043 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:57:01.060 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:01.520 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:57:01.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:01.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:01.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:01.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:01.998 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:57:02.476 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:57:02.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:02.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:02.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:02.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:02.953 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:57:03.431 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:57:03.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:03.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:03.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:03.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:03.909 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:57:04.387 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:57:04.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:04.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:04.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:04.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:04.864 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:57:05.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:57:05.820 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:57:06.297 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:57:06.775 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:57:06.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:06.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:06.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:06.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:06.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:06.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:06.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:06.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:06.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:06.917 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:57:06.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.917 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.918 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.918 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.918 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.918 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:06.918 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:11.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:11.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:11.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:11.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:11.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:11.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:11.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:11.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:11.931 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:11.931 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:11.931 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:57:11.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:57:11.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:57:11.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:11.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:11.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:11.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:57:11.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:11.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:11.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:57:11.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:11.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:11.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:57:11.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:11.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:57:11.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:57:11.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:57:11.941 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:11.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:57:12.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:57:12.468 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:12.470 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:12.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:12.472 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:57:12.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:12.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:12.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:12.514 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:12.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:12.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:12.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:12.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:12.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:12.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:12.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:12.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:12.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:12.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:12.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:57:12.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:12.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:12.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:12.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:13.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:57:13.860 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:57:13.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:13.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:13.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:13.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:14.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:57:14.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:57:14.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:14.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:14.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:15.293 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:57:15.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:57:15.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:15.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:15.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:16.240 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:57:16.717 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:57:16.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:16.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:16.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:16.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:17.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:57:17.669 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:57:18.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:57:18.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:57:19.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:57:19.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:57:20.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:57:20.527 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:57:21.005 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:57:21.483 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:57:21.959 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:57:22.437 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:57:22.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:22.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:22.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:22.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:22.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:22.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:22.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:22.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:22.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:22.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:22.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:22.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:22.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:22.596 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:57:22.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:22.596 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2280 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:27.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:27.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:27.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:27.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:27.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:27.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:27.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:27.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:27.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:57:27.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:57:27.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:57:27.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:27.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:27.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:27.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:57:27.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:27.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:57:27.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:57:27.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:57:27.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:27.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:27.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:27.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:57:27.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:27.627 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:57:27.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:57:27.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:57:27.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:27.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:27.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:27.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:57:27.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:27.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:57:27.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:57:27.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:57:27.633 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:57:27.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:27.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:57:28.122 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:57:28.167 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:28.169 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:28.171 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:57:28.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:28.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:28.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:28.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:28.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:28.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:28.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:28.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:28.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:28.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:28.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:28.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:57:28.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:28.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:28.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:28.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:28.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:28.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:28.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:28.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:28.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:28.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:28.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:28.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:28.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:28.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:28.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:28.650 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:57:28.650 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:57:28.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:28.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:57:29.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:29.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:29.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:29.339 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:57:29.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:29.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:29.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:29.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:29.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:29.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:29.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:29.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:29.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:29.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:29.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:29.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:29.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:29.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:29.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:29.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:29.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:29.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:29.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:29.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:29.545 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:57:29.545 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:57:29.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.553 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:57:29.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:29.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:29.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:29.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:29.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:29.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:29.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:29.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:29.948 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:57:29.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:29.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:29.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:29.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:29.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:29.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:29.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:29.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:29.961 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:57:29.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.964 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:29.964 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:57:34.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:34.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:34.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:34.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:34.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:34.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:34.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:34.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:34.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:34.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:34.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:57:34.973 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:57:34.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:57:34.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:34.974 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:34.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:34.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:57:34.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:34.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:57:34.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:57:34.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:57:34.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:34.977 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:34.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:34.977 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:57:34.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:34.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:57:34.979 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:57:34.979 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:57:34.979 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:34.979 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:34.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:34.980 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:57:34.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:34.980 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:57:34.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:57:34.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:57:34.983 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:57:34.983 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:34.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:57:35.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:57:35.509 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:35.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:35.511 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:35.513 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:57:35.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:35.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:35.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:35.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:35.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:35.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:35.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:35.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:35.563 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:35.568 [DEBUG] fake_trx.py:264 (MS@172.18.28.22:6700) Recv SETTA cmd
2026-01-23 02:57:35.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:35.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:35.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:35.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:35.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:35.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:57:35.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:35.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:35.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:35.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:36.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:57:36.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:36.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:36.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:36.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:36.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:36.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:36.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:36.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:36.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:36.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:36.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:36.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:36.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:36.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:36.459 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:57:41.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:41.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:41.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:41.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:41.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:41.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:41.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:41.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:41.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:57:41.485 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:57:41.485 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:57:41.485 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:41.485 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:41.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:41.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:57:41.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:41.486 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:57:41.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:57:41.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:57:41.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:41.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:41.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:41.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:57:41.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:41.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:41.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:57:41.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:41.492 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:57:41.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:57:41.495 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:57:41.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:41.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:57:41.983 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:57:42.018 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:57:42.019 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:57:42.020 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:57:42.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:42.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:42.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:42.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:42.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:42.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:42.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:42.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:42.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:42.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:42.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:42.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:42.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:42.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:42.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:42.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:57:42.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:42.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:42.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:42.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:42.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:57:43.416 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:57:43.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:43.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:43.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:43.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:43.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:57:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:57:44.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:44.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:44.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:44.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:44.851 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:57:45.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:45.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:45.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:45.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:45.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:45.233 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:45.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:45.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:45.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:45.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:45.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:45.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:45.282 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:57:45.282 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 02:57:45.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:45.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:45.329 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:57:45.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:45.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:45.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:45.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:45.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:45.807 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:57:46.285 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:57:46.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:46.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:46.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:46.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:46.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:57:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:57:47.719 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:57:48.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:57:48.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:48.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:48.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:48.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:48.463 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:57:48.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:48.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:48.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:48.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:48.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:48.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:48.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:48.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:48.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:48.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:48.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:48.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:48.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:48.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:48.674 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:57:49.152 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:57:49.630 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:57:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:57:50.585 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:57:51.062 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:57:51.540 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:57:51.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:51.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:51.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:51.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:51.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:51.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:51.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:57:51.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:51.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:57:51.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:57:51.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:57:51.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:57:51.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:51.733 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:57:51.734 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:57:51.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:51.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:51.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:52.017 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:57:52.496 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:57:53.000 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:57:53.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:57:53.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:57:54.432 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:57:54.911 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:57:54.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:57:54.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:57:54.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:57:54.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:57:54.940 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:57:54.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:57:54.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:57:54.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:57:54.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:57:54.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:54.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:54.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:54.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:54.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:54.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:54.945 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:57:59.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:57:59.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:57:59.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:59.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:59.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:59.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:59.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:57:59.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:59.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:59.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:57:59.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:57:59.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:57:59.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:57:59.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:59.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:59.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:57:59.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:57:59.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:57:59.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:57:59.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:57:59.978 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:57:59.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:59.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:59.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:57:59.978 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:57:59.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:57:59.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:57:59.980 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:57:59.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:57:59.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:59.980 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:57:59.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:57:59.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:57:59.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:57:59.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:57:59.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:57:59.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:57:59.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:57:59.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:57:59.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:57:59.984 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:57:59.984 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:57:59.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:57:59.989 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:58:00.473 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:58:00.515 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:58:00.517 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:58:00.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:58:00.520 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:58:00.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:00.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:00.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:58:00.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:00.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:58:00.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:58:00.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:58:00.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:58:00.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:58:00.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:00.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:00.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:00.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:01.429 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:58:01.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:58:01.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:01.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:01.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:01.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:02.385 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:58:02.862 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:58:02.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:02.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:02.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:02.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:03.340 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:58:03.818 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:58:03.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:03.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:03.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:03.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:04.296 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:58:04.774 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:58:04.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:04.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:04.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:04.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:05.251 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:58:05.729 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:58:06.207 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:58:06.684 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:58:07.162 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:58:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:58:08.118 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:58:08.591 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:58:09.068 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:58:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:58:10.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:58:10.501 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:58:10.978 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:58:11.455 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:58:11.933 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:58:12.410 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:58:12.888 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:58:13.366 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:58:13.843 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:58:14.321 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:58:14.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:14.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:14.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:14.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:14.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:14.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:14.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:14.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:14.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:58:14.619 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:58:14.619 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:14.619 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 02:58:19.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:58:19.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:58:19.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:19.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:19.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:19.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:19.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:19.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:58:19.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:19.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:58:19.628 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:58:19.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:58:19.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:58:19.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:58:19.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:19.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:19.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:58:19.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:58:19.631 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:58:19.632 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:58:19.632 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:58:19.632 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:58:19.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:58:19.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:58:19.634 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:58:19.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:58:19.638 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:58:19.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:19.643 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:58:20.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:58:20.168 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:58:20.170 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:58:20.172 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:58:20.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:58:20.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:20.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:20.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:58:20.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:20.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:58:20.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:58:20.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:58:20.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:58:20.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:58:20.228 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 02:58:20.228 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 02:58:20.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:20.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:20.603 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:58:20.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:20.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:20.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:20.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:21.082 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:58:21.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:58:21.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:21.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:21.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:21.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:22.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:58:22.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:22.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:22.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:22.229 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 02:58:22.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:58:22.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:22.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:58:22.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:58:22.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:58:22.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:58:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:58:22.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:22.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:22.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:22.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:22.994 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:58:23.470 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:58:23.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:23.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:23.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:23.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:23.948 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:58:24.426 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:58:24.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:24.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:24.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:24.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:24.904 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:58:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:58:25.859 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:58:26.336 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:58:26.814 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:58:27.292 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:58:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:58:28.247 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:58:28.724 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:58:29.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:58:29.699 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:58:30.177 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:58:30.655 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:58:31.132 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:58:31.610 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:58:32.088 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:58:32.566 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:58:33.043 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:58:33.521 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:58:33.999 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:58:34.477 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:58:34.955 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:58:35.433 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:58:35.910 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:58:36.388 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:58:36.866 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:58:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:58:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:58:38.296 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:58:38.773 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:58:39.250 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:58:39.736 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:58:40.214 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:58:40.692 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:58:41.169 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:58:41.646 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:58:42.124 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 02:58:42.602 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 02:58:43.080 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 02:58:43.558 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 02:58:44.036 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 02:58:44.513 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 02:58:44.991 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 02:58:45.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:58:45.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:45.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:45.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:45.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:45.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:45.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:45.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:45.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:58:45.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:58:45.272 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:58:45.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:50.275 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:58:50.275 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:58:50.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:50.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:50.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:50.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:50.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:58:50.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:58:50.289 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:50.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:58:50.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:58:50.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:58:50.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:58:50.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:58:50.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:50.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:58:50.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:58:50.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:58:50.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:58:50.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:58:50.297 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:58:50.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:58:50.297 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:50.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:58:50.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:58:50.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:58:50.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:58:50.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:58:50.299 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:58:50.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:58:50.299 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:58:50.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:58:50.299 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:58:50.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:58:50.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:58:50.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:58:50.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:58:50.303 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:58:50.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:58:50.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:58:50.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:58:50.831 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:58:50.833 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:58:50.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:58:50.835 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:58:50.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:58:50.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:58:50.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:58:50.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:58:50.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:58:50.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:58:50.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:58:50.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:58:51.268 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:58:51.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:51.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:51.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:51.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:51.746 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:58:52.224 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:58:52.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:52.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:52.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:52.701 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:58:53.179 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:58:53.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:53.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:53.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:53.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:53.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:58:54.127 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:58:54.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:54.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:54.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:54.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:54.600 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:58:55.078 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:58:55.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:58:55.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:58:55.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:58:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:58:55.553 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:58:56.031 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:58:56.508 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:58:56.986 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:58:57.463 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:58:57.941 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:58:58.419 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:58:58.897 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:58:59.375 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:58:59.852 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:59:00.329 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:59:00.801 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:59:01.276 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:59:01.754 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:59:02.232 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:59:02.707 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:59:03.184 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:59:03.662 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:59:04.140 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:59:04.618 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:59:05.095 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:59:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:59:06.048 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:59:06.523 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:59:07.001 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:59:07.479 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:59:07.956 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:59:08.433 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:59:08.911 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:59:09.389 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:59:09.866 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:59:10.344 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:59:10.821 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:59:11.299 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:59:11.777 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:59:12.251 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:59:12.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:59:12.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:59:12.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:12.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:12.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:59:12.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:59:12.328 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:59:17.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:59:17.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:59:17.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:17.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:17.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:17.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:17.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:17.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:59:17.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:17.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:59:17.342 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:59:17.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:59:17.344 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:59:17.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:59:17.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:17.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:17.345 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:59:17.345 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:59:17.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:59:17.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:59:17.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:59:17.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:59:17.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:17.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:17.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:59:17.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:59:17.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:59:17.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:59:17.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:59:17.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:59:17.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:17.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:17.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:59:17.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:59:17.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:59:17.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:59:17.352 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:59:17.352 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:17.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:59:17.840 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:59:17.882 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:59:17.884 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:59:17.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:59:17.886 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:59:17.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:59:17.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:59:17.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:59:17.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:59:17.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:59:17.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:59:17.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:59:17.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:59:18.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:59:18.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:18.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:18.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:18.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:18.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:59:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:59:19.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:19.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:19.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:19.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:19.750 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:59:20.227 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:59:20.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:20.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:20.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:20.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:20.705 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:59:21.183 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:59:21.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:21.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:21.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:21.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:21.660 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:59:22.138 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:59:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:22.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:22.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:22.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:22.616 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:59:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:59:23.567 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:59:24.046 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:59:24.524 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:59:25.001 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:59:25.479 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:59:25.955 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:59:26.433 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:59:26.910 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:59:27.387 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:59:27.865 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:59:28.342 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:59:28.819 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:59:29.296 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:59:29.773 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:59:30.250 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:59:30.728 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:59:31.203 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:59:31.681 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:59:32.158 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:59:32.631 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 02:59:33.102 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 02:59:33.579 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 02:59:34.058 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 02:59:34.535 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 02:59:35.012 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 02:59:35.490 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 02:59:35.967 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 02:59:36.445 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 02:59:36.922 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 02:59:37.399 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 02:59:37.877 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 02:59:38.355 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 02:59:38.829 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 02:59:39.299 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 02:59:39.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:59:39.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:59:39.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:39.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:39.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:39.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:39.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:39.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:39.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:39.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:39.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:59:39.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:59:39.379 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 02:59:44.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 02:59:44.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 02:59:44.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:44.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:44.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:44.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:44.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 02:59:44.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:59:44.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:44.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 02:59:44.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 02:59:44.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 02:59:44.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 02:59:44.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:59:44.399 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 02:59:44.400 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 02:59:44.400 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 02:59:44.401 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 02:59:44.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 02:59:44.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 02:59:44.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:59:44.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:44.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 02:59:44.404 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 02:59:44.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 02:59:44.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 02:59:44.405 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 02:59:44.405 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 02:59:44.405 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:59:44.405 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 02:59:44.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 02:59:44.406 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 02:59:44.406 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 02:59:44.406 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 02:59:44.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 02:59:44.408 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 02:59:44.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 02:59:44.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 02:59:44.894 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 02:59:44.933 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 02:59:44.934 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 02:59:44.935 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 02:59:44.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 02:59:44.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 02:59:44.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 02:59:44.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 02:59:44.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 02:59:44.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 02:59:44.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 02:59:44.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 02:59:44.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 02:59:45.364 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 02:59:45.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:45.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:45.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:45.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:45.834 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 02:59:46.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 02:59:46.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:46.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:46.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:46.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 02:59:47.262 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 02:59:47.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:47.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:47.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:47.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 02:59:48.215 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 02:59:48.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:48.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:48.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:48.692 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 02:59:49.169 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 02:59:49.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 02:59:49.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 02:59:49.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 02:59:49.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 02:59:49.643 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 02:59:50.117 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 02:59:50.595 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 02:59:51.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 02:59:51.551 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 02:59:52.028 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 02:59:52.506 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 02:59:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 02:59:53.461 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 02:59:53.938 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 02:59:54.416 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 02:59:54.894 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 02:59:55.372 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 02:59:55.844 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 02:59:56.322 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 02:59:56.795 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 02:59:57.266 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 02:59:57.738 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 02:59:58.216 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 02:59:58.693 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 02:59:59.170 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 02:59:59.648 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:00:00.125 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:00:00.603 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:00:01.081 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:00:01.558 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:00:02.036 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:00:02.513 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:00:02.990 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:00:03.468 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:00:03.945 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:00:04.423 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:00:04.897 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:00:05.375 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:00:05.852 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:00:06.327 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:00:06.800 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:00:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:00:07.750 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:00:08.228 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:00:08.704 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:00:09.181 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:00:09.653 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:00:10.124 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:00:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:00:11.071 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:00:11.548 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:00:12.026 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:00:12.503 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:00:12.982 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:00:13.459 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:00:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:00:14.411 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:00:14.882 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:00:15.354 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:00:15.831 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:00:16.309 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:00:16.777 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:00:17.250 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:00:17.728 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:00:18.205 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:00:18.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:00:18.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:00:18.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:18.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:18.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:00:18.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:00:18.433 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:00:18.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:18.434 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:23.436 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:00:23.436 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:00:23.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:23.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:23.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:23.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:23.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:23.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:00:23.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:23.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:00:23.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:00:23.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:00:23.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:00:23.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:00:23.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:23.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:23.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:00:23.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:00:23.454 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:00:23.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:00:23.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:00:23.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:00:23.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:23.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:23.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:00:23.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:00:23.457 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:00:23.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:00:23.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:00:23.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:00:23.462 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:00:23.462 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:00:23.462 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:23.466 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:00:23.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:00:23.987 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:00:23.989 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:00:23.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:00:23.991 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:00:23.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:00:23.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:00:23.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:00:23.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:00:23.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:00:23.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:00:23.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:00:23.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:00:24.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:00:24.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:24.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:24.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:24.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:24.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:00:25.385 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:00:25.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:25.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:25.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:25.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:25.862 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:00:26.340 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:00:26.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:26.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:26.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:26.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:26.818 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:00:27.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:00:27.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:27.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:27.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:27.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:27.773 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:00:28.251 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:00:28.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:28.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:28.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:28.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:28.727 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:00:29.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:00:29.682 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:00:30.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:00:30.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:00:31.115 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:00:31.593 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:00:32.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:00:32.547 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:00:33.025 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:00:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:00:33.979 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:00:34.457 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:00:34.934 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:00:35.412 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:00:35.890 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:00:36.367 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:00:36.845 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:00:37.323 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:00:37.800 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:00:38.278 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:00:38.752 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:00:39.230 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:00:39.707 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:00:40.185 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:00:40.662 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:00:41.140 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:00:41.617 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:00:42.094 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:00:42.572 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:00:43.044 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:00:43.515 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:00:43.987 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:00:44.465 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:00:44.943 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:00:45.421 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:00:45.898 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:00:46.375 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:00:46.853 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:00:47.330 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:00:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:00:48.285 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:00:48.763 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:00:49.240 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:00:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:00:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:00:50.674 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:00:51.151 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:00:51.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:00:51.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:00:51.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:51.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:51.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:51.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:51.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:51.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:51.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:00:51.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:00:51.489 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:51.489 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:56.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:00:56.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:00:56.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:56.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:56.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:56.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:56.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:00:56.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:56.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:00:56.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:00:56.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:00:56.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:00:56.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:00:56.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:56.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:56.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:00:56.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:00:56.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:00:56.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:00:56.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:00:56.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:00:56.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:56.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:56.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:00:56.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:00:56.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:00:56.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:00:56.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:00:56.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:00:56.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:00:56.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:56.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:00:56.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:00:56.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:00:56.510 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:00:56.510 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:00:56.510 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:00:56.515 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:00:56.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:00:57.042 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:00:57.044 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:00:57.046 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:00:57.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:00:57.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:00:57.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:00:57.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:00:57.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:00:57.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:00:57.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:00:57.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:00:57.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:00:57.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:00:57.063 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:00:57.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.063 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.064 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:00:57.064 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.064 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:02.064 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:02.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:02.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:02.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:02.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:02.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:02.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:02.075 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:02.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:02.075 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:02.077 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:02.077 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:02.077 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:02.077 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:02.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:02.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:02.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:02.078 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:02.079 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:02.080 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:02.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:02.080 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:02.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:02.080 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:02.080 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:02.080 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:02.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:02.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:02.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:02.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:02.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:02.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:02.085 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:02.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:02.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:02.611 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:02.613 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:02.615 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:02.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:02.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:02.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:02.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:02.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:02.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:02.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:02.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:02.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:02.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:02.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:02.629 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:02.630 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:07.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:07.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:07.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:07.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:07.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:07.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:07.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:07.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:07.644 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:07.644 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:07.644 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:07.648 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:07.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:07.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:07.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:07.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:07.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:07.653 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:07.653 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:07.653 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:07.653 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:07.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:07.653 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:07.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:07.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:07.656 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:07.657 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:07.661 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:08.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:08.178 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:08.180 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:08.182 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:08.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:08.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:08.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:08.197 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:08.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.197 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:08.198 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:13.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:13.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:13.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:13.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:13.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:13.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:13.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:13.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:13.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:13.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:13.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:13.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:13.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:13.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:13.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:13.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:13.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:13.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:13.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:13.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:13.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:13.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:13.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:13.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:13.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:13.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:13.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:13.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:13.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:13.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:13.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:13.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:13.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:13.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:13.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:13.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:13.222 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:13.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:13.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:13.747 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:13.748 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:13.748 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:13.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:13.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:13.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:13.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:01:13.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:01:13.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:01:13.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:01:13.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:01:13.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:01:14.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:01:14.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:14.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:14.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:14.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:14.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:01:15.144 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:01:15.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:15.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:15.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:15.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:15.621 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:01:16.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:01:16.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:16.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:16.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:16.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:16.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:01:17.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:01:17.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:17.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:17.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:17.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:01:18.012 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:01:18.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:18.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:18.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:18.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:18.489 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:01:18.967 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:01:19.444 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:01:19.922 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:01:20.400 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:01:20.877 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:01:21.355 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:01:21.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:21.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:21.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:21.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:21.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:21.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:21.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:21.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:21.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:21.813 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.813 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:21.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:26.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:26.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:26.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:26.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:26.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:26.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:26.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:26.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:26.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:26.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:26.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:26.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:26.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:26.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:26.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:26.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:26.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:26.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:26.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:26.831 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:26.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:26.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:26.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:26.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:26.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:26.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:26.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:26.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:26.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:26.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:26.835 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:26.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:26.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:26.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:26.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:26.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.840 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:26.840 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:26.840 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:26.841 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.841 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:26.846 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:27.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:27.378 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:27.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:27.381 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:27.384 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:27.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:27.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:27.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:01:27.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:01:27.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:01:27.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:01:27.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:01:27.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:01:27.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:01:27.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:27.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:27.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:27.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:28.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:01:28.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:01:28.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:28.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:28.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:28.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:29.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:01:29.716 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:01:29.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:29.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:29.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:30.194 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:01:30.668 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:01:30.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:30.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:30.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:30.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:31.142 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:01:31.620 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:01:31.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:31.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:31.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:31.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:32.094 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:01:32.565 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:01:33.036 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:01:33.512 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:01:33.989 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:01:34.467 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:01:34.944 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:01:35.422 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:01:35.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:35.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:35.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:35.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:35.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:35.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:35.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:35.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:35.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:35.432 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:35.432 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:35.432 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:01:35.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:35.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:40.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:40.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:40.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:40.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:40.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:40.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:40.447 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:40.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:40.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:40.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:40.449 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:40.453 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:40.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:40.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:40.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:40.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:40.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:40.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:40.454 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:40.456 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:40.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:40.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:40.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:40.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:40.457 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:40.457 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:40.457 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:40.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:40.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:40.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:40.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:40.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:40.463 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:40.463 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:40.467 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:40.993 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:40.995 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:40.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:40.998 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:41.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:41.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:41.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:01:41.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:01:41.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:01:41.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:01:41.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:01:41.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:01:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:01:41.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:41.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:41.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:41.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:41.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:01:42.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:01:42.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:42.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:42.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:42.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:42.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:01:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:01:43.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:43.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:43.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:43.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:43.815 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:01:44.292 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:01:44.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:44.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:44.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:44.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:01:45.247 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:01:45.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:45.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:45.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:45.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:45.725 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:01:46.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:01:46.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:01:47.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:01:47.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:01:48.114 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:01:48.592 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:01:49.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:49.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:49.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:49.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:49.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:49.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:49.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:49.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:49.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:49.052 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:01:49.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:49.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:49.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:49.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:49.052 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:01:54.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:01:54.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:01:54.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:54.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:54.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:54.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:54.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:01:54.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:54.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:54.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:01:54.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:01:54.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:01:54.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:01:54.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:54.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:54.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:01:54.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:01:54.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:01:54.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:01:54.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:01:54.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:01:54.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:54.071 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:54.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:01:54.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:01:54.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:01:54.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:01:54.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:01:54.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:01:54.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:54.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:01:54.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:01:54.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:01:54.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:01:54.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:01:54.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:01:54.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:01:54.077 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:01:54.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:01:54.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:01:54.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:01:54.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:01:54.601 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:01:54.602 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:01:54.603 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:01:54.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:01:54.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:01:54.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:01:54.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:01:55.038 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:01:55.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:55.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:55.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:55.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:01:55.990 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:01:56.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:56.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:56.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:56.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:56.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:01:56.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:01:57.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:57.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:57.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:57.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:57.424 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:01:57.901 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:01:58.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:58.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:58.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:58.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:01:58.856 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:01:59.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:01:59.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:01:59.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:01:59.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:01:59.334 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:01:59.812 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:02:00.290 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:02:00.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:02:01.245 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:02:01.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:02:02.198 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:02:02.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:02.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:02.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:02.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:02.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:02.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:02.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:02.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:02.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:02.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:02.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:02.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:02.615 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:02.616 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:07.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:07.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:07.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:07.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:07.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:07.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:07.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:07.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:07.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:07.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:07.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:07.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:02:07.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:07.626 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:07.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:02:07.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:07.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:07.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:02:07.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:07.631 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:02:07.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:02:07.636 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:02:07.636 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.636 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:02:07.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:07.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:07.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:02:08.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:02:08.173 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:02:08.174 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:02:08.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:02:08.175 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:02:08.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:08.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:08.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:02:08.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:02:08.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:02:08.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:02:08.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:02:08.178 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:02:08.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:02:08.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:08.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:08.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:09.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:02:09.528 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:02:09.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:09.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:09.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:09.999 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:02:10.469 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:02:10.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:10.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:10.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:10.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:10.940 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:02:11.411 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:02:11.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:11.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:11.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:11.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:11.882 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:02:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:02:12.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:12.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:12.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:12.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:12.824 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:02:13.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:02:13.779 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:02:14.257 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:02:14.735 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:02:15.212 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:02:15.690 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:02:16.167 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:02:16.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:16.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:16.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:16.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:16.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:16.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:16.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:16.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:16.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:16.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:16.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:16.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:16.220 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:02:16.220 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.221 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.221 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.221 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.221 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.221 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.223 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.223 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:16.223 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:21.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:21.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:21.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:21.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:21.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:21.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:21.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:21.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:02:21.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:02:21.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:02:21.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:21.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:21.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:21.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:02:21.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:21.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:02:21.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:02:21.236 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:02:21.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:21.237 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:21.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:21.237 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:02:21.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:21.237 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:02:21.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:02:21.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:02:21.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:21.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:21.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:21.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:02:21.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:21.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:02:21.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:02:21.244 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:21.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:02:21.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:02:21.772 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:02:21.774 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:02:21.776 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:02:21.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:02:21.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:21.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:21.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:02:21.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:02:21.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:02:21.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:02:21.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:02:21.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:02:22.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:02:22.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:22.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:22.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:22.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:22.686 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:02:23.163 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:02:23.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:23.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:23.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:23.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:23.641 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:02:24.119 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:02:24.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:24.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:24.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:24.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:24.597 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:02:25.074 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:02:25.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:25.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:25.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:25.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:25.551 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:02:26.029 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:02:26.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:26.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:26.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:26.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:26.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:02:26.984 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:02:27.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:02:27.938 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:02:28.416 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:02:28.893 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:02:29.371 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:02:29.848 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:02:30.326 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:02:30.803 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:02:31.281 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:02:31.758 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:02:32.236 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:02:32.713 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:02:33.191 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:02:33.668 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:02:34.146 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:02:34.624 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:02:35.101 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:02:35.579 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:02:36.056 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:02:36.534 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:02:37.012 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:02:37.489 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:02:37.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:37.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:37.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:37.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:37.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:37.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:37.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:37.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:37.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:37.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:37.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:37.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:37.837 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:02:37.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:37.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:42.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:42.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:42.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:42.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:42.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:42.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:42.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:42.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:42.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:42.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:42.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:02:42.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:02:42.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:02:42.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:42.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:42.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:42.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:02:42.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:42.859 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:42.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:02:42.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:42.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:42.863 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:02:42.863 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:42.863 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:02:42.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:02:42.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:02:42.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:02:42.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:02:42.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:02:42.866 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:02:42.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:02:43.355 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:02:43.389 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:02:43.390 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:02:43.391 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:02:43.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:02:43.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:43.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:43.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:02:43.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:02:43.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:02:43.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:02:43.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:02:43.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:02:43.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:02:43.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:43.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:43.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:44.309 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:02:44.787 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:02:44.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:44.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:44.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:44.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:45.264 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:02:45.741 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:02:45.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:45.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:45.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:45.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:46.219 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:02:46.696 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:02:46.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:46.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:46.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:47.173 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:02:47.651 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:02:47.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:47.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:47.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:47.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:48.128 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:02:48.605 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:02:49.081 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:02:49.558 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:02:50.036 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:02:50.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:02:50.990 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:02:51.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:51.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:51.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:51.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:51.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:51.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:51.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:51.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:51.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:51.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:51.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:51.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:51.464 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:51.464 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:02:56.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:02:56.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:02:56.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:56.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:56.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:56.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:56.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:02:56.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:56.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:56.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:02:56.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:02:56.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:02:56.483 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:02:56.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:56.483 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:56.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:02:56.484 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:02:56.484 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:02:56.485 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:56.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:02:56.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:02:56.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:02:56.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:02:56.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:02:56.488 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:56.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:02:56.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:02:56.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:02:56.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:02:56.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:02:56.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:02:56.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:02:56.492 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:02:56.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:02:56.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:02:56.980 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:02:57.018 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:02:57.020 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:02:57.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:02:57.022 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:02:57.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:02:57.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:02:57.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:02:57.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:02:57.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:57.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:57.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:57.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:57.931 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:02:58.408 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:02:58.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:58.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:58.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:58.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:58.886 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:02:59.364 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:02:59.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:02:59.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:02:59.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:02:59.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:02:59.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:03:00.315 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:03:00.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:00.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:00.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:00.792 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:03:01.270 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:03:01.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:01.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:01.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:01.748 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:03:02.226 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:03:02.703 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:03:03.181 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:03:03.659 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:03:04.136 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:03:04.614 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:03:05.092 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:03:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:03:06.047 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:03:06.516 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:03:06.988 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:03:07.466 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:03:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:03:08.422 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:03:08.899 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:03:09.385 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:03:09.863 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:03:10.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:03:10.819 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:03:11.297 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:03:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:03:12.250 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:03:12.727 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:03:13.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:13.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:13.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:13.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:13.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:13.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:13.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:13.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:13.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:13.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:13.097 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:13.097 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.097 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.097 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.097 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.098 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:13.099 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3550 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:18.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:18.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:18.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:18.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:18.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:18.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:18.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:18.106 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:18.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:18.106 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:18.109 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:18.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:18.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:18.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:18.110 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:18.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:18.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:18.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:18.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:18.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:18.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:18.115 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:18.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:18.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:18.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:18.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:18.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:18.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:18.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:18.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:18.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:18.118 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:18.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:18.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:18.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:18.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:18.122 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:18.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:18.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:18.610 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:18.657 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:18.659 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:18.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:18.662 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:18.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:18.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:18.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:18.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:18.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:18.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:18.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:18.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:18.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:18.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:18.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:18.702 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:18.702 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:23.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:23.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:23.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:23.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:23.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:23.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:23.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:23.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:23.721 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:23.721 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:23.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:23.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:23.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:23.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:23.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:23.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:23.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:23.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:23.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:23.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:23.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:23.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:23.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:23.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:23.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:23.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:23.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:23.732 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:23.732 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:23.732 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:23.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:23.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:23.735 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:23.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:23.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:24.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:24.264 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:24.266 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:24.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:24.269 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:24.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:24.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:24.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:24.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:24.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:24.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:24.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:24.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:24.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:24.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:24.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:24.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:24.302 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:24.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:24.303 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.303 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.303 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.303 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.304 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.305 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.305 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.305 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:24.305 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:29.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:29.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:29.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:29.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:29.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:29.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:29.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:29.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:29.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:29.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:29.316 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:29.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:29.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:29.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:29.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:29.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:29.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:29.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:29.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:29.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:29.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:29.321 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:29.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:29.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:29.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:29.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:29.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:29.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:29.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:29.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:29.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:29.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:29.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:29.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:29.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:29.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:29.328 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:29.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:29.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:29.817 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:29.858 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:29.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:29.861 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:29.865 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:29.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:29.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:29.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:29.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:29.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:29.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:29.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:29.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:29.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:29.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:29.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:29.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:29.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:29.912 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:29.912 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:34.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:34.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:34.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:34.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:34.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:34.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:34.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:34.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:34.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:34.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:34.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:34.920 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:34.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:34.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:34.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:34.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:34.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:34.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:34.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:34.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:34.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:34.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:34.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:34.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:34.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:34.925 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:34.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:34.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:34.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:34.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:34.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:34.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:34.928 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:34.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:34.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:34.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:35.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:35.452 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:35.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:35.455 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:35.457 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:35.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:35.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:35.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:35.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:35.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:35.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:35.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:35.509 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:35.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:35.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:35.510 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:35.510 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:40.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:40.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:40.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:40.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:40.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:40.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:40.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:40.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:40.524 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:40.524 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:40.524 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:40.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:40.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:40.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:40.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:40.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:40.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:40.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:40.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:40.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:40.529 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:40.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:40.529 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:40.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:40.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:40.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:40.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:40.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:40.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:40.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:40.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:40.532 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:40.532 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:40.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:40.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:41.020 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:41.058 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:41.061 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:41.063 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:41.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:41.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:41.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:41.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:41.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:41.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:41.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:41.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:41.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:41.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:41.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:41.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:41.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:41.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:41.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:41.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:41.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:41.105 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:41.105 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:41.105 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:41.105 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:41.105 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:46.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:46.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:46.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:46.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:46.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:46.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:46.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:46.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:46.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:46.121 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:46.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:46.125 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:46.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:46.125 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:46.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:46.126 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:46.126 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:46.127 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:46.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:46.128 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:46.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:46.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:46.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:46.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:46.129 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:46.129 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:46.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:46.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:46.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:46.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:46.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:46.130 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:46.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:46.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:46.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:46.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:46.134 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:46.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:46.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:46.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:46.665 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:46.667 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:46.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:46.669 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:46.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:46.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:46.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:46.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:46.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:46.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:46.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:46.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:46.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:46.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:46.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:46.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:46.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:46.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:46.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:46.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:46.730 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:46.730 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:03:51.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:03:51.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:03:51.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:51.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:51.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:51.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:51.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:03:51.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:51.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:51.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:03:51.744 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:03:51.746 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:03:51.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:03:51.747 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:51.747 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:51.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:03:51.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:03:51.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:03:51.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:03:51.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:03:51.750 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:03:51.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:51.750 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:51.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:03:51.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:03:51.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:03:51.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:03:51.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:03:51.752 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:03:51.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:51.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:03:51.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:03:51.752 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:03:51.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:03:51.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:03:51.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:03:51.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:03:51.755 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:03:51.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:03:51.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:03:52.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:03:52.286 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:03:52.288 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:03:52.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:03:52.291 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:03:52.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:03:52.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:03:52.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:03:52.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:03:52.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:03:52.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:03:52.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:03:52.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:03:52.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:03:52.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:52.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:52.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:52.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:53.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:03:53.667 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:03:53.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:53.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:53.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:53.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:54.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:03:54.622 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:03:54.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:54.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:54.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:54.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:55.098 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:03:55.576 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:03:55.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:55.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:55.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:55.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:56.053 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:03:56.530 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:03:56.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:03:56.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:03:56.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:03:56.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:03:57.008 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:03:57.486 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:03:57.964 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:03:58.441 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:03:58.918 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:03:59.395 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:03:59.873 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:04:00.351 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:04:00.828 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:04:01.306 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:04:01.783 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:04:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:04:02.739 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:04:03.217 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:04:03.695 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:04:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:04:04.650 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:04:05.128 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:04:05.606 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:04:06.083 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:04:06.561 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:04:07.039 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:04:07.517 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:04:07.994 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:04:08.471 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:04:08.948 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:04:09.425 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:04:09.903 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:04:10.377 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:04:10.853 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:04:11.330 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:04:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:04:12.284 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:04:12.762 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:04:13.239 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:04:13.717 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:04:14.196 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:04:14.670 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:04:15.144 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:04:15.621 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:04:16.098 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:04:16.576 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:04:17.054 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:04:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:04:18.009 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:04:18.486 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:04:18.964 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:04:19.441 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:04:19.918 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:04:20.396 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:04:20.873 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:04:21.350 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:04:21.828 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:04:22.306 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:04:22.783 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:04:23.259 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:04:23.736 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:04:24.213 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:04:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:04:25.163 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:04:25.641 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:04:25.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:04:25.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:04:25.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:25.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:25.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:25.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:25.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:25.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:25.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:25.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:25.783 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:25.783 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:25.783 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:04:30.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:30.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:30.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:30.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:30.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:30.800 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:30.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:30.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:30.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:04:30.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:04:30.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:04:30.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:30.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:30.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:30.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:04:30.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:30.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:04:30.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:04:30.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:04:30.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:30.809 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:30.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:30.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:04:30.810 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:30.810 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:04:30.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:04:30.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:04:30.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:30.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:30.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:30.812 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:04:30.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:30.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:04:30.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:04:30.816 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:04:30.816 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:04:30.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:30.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:04:31.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:04:31.344 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:04:31.347 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:04:31.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:04:31.349 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:04:31.786 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:04:31.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:31.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:31.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:31.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:32.267 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:04:32.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:04:32.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:32.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:32.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:32.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:33.227 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:04:33.705 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:04:33.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:33.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:33.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:33.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:34.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:04:34.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:04:34.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:34.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:34.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:34.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:34.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:34.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:34.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:34.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:34.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:34.373 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:34.373 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:39.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:39.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:39.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:39.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:39.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:39.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:39.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:39.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:39.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:39.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:39.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:04:39.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:04:39.387 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:04:39.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:39.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:39.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:39.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:04:39.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:39.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:04:39.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:04:39.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:04:39.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:39.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:39.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:39.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:04:39.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:39.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:04:39.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:04:39.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:04:39.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:39.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:39.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:39.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:04:39.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:39.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:04:39.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:04:39.396 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:04:39.396 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:04:39.396 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:39.401 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:04:39.884 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:04:39.925 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:04:39.927 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:04:39.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:04:39.929 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:04:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:04:40.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:40.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:40.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:40.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:40.833 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:04:41.309 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:04:41.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:41.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:41.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:41.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:41.787 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:04:42.266 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:04:42.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:42.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:42.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:42.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:42.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:04:43.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:04:43.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:43.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:43.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:43.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:43.702 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:04:44.180 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:04:44.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:44.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:44.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:44.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:44.658 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:04:45.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:04:45.614 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:04:45.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:45.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:45.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:45.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:45.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:45.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:45.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:45.947 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:45.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:50.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:50.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:50.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:50.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:50.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:50.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:50.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:50.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:50.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:50.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:04:50.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:04:50.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:04:50.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:04:50.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:50.963 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:50.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:50.964 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:04:50.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:04:50.964 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:04:50.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:04:50.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:04:50.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:50.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:50.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:50.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:04:50.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:04:50.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:04:50.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:04:50.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:04:50.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:50.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:04:50.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:50.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:04:50.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:04:50.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:04:50.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:04:50.975 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:04:50.975 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:04:50.975 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:04:50.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:04:50.980 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:04:51.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:04:51.504 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:04:51.506 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:04:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:04:51.508 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:04:51.938 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:04:51.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:51.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:51.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:51.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:52.415 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:04:52.896 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:04:52.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:52.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:52.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:52.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:53.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:04:53.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:04:53.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:53.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:53.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:53.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:54.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:04:54.790 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:04:54.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:54.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:54.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:54.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:55.268 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:04:55.749 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:04:55.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:55.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:55.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:55.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:56.228 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:04:56.707 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:04:57.186 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:04:57.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:04:57.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:04:57.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:04:57.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:04:57.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:04:57.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:04:57.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:04:57.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:04:57.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:04:57.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:04:57.524 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:04:57.524 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:02.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:02.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:02.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:02.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:02.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:02.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:02.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:02.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:02.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:02.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:02.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:02.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:02.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:02.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:02.545 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:02.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:02.546 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:02.546 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:02.546 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:02.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:02.548 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:02.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:02.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:02.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:02.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:02.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:02.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:02.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:02.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:02.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:02.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:02.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:02.552 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:02.552 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:02.552 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:02.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:02.556 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:02.556 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:02.556 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:02.561 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:03.045 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:03.094 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:03.096 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:03.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:03.098 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:03.514 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:05:03.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:03.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:03.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:03.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:03.983 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:05:04.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:05:04.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:04.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:04.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:04.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:04.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:05:05.398 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:05:05.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:05.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:05.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:05.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:05.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:05:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:05:06.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:06.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:06.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:06.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:06.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:05:07.294 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:05:07.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:07.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:07.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:07.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:07.772 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:05:08.245 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:05:08.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:05:09.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:09.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:09.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:09.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:09.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:09.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:09.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:09.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:09.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:09.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:09.118 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:09.118 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.119 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:09.120 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:14.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:14.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:14.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:14.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:14.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:14.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:14.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:14.125 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:14.125 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:14.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:14.126 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:14.128 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:14.128 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:14.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:14.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:14.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:14.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:14.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:14.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:14.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:14.132 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:14.134 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:14.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:14.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:14.136 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:14.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:14.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:14.137 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:14.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:14.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:14.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:14.623 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:14.663 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:14.665 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:14.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:14.667 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:15.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:05:15.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:15.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:15.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:15.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:15.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:05:16.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:05:16.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:16.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:16.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:16.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:16.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:05:16.986 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:05:17.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:17.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:17.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:17.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:17.458 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:05:17.929 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:05:18.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:18.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:18.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:18.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:18.406 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:05:18.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:18.884 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:05:19.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:19.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:19.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:19.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:19.365 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:05:19.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:05:20.314 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:05:20.782 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:05:21.252 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:05:21.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:05:22.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:05:22.670 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:05:22.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:22.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:22.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:22.689 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:22.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:22.689 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:22.690 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:27.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:27.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:27.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:27.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:27.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:27.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:27.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:27.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:27.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:27.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:27.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:27.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:27.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:27.695 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:27.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:27.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:27.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:27.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:27.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:27.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:27.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:27.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:27.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:27.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:27.698 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:27.698 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:27.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:27.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:27.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:27.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:28.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:28.211 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:28.212 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:28.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:28.212 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:28.639 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:05:28.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:28.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:28.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:28.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:29.107 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:05:29.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:05:29.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:29.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:29.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:29.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:30.046 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:05:30.514 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:05:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:30.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:30.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:30.982 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:05:31.451 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:05:31.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:31.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:31.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:31.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:31.919 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:05:32.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:32.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:32.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:32.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:32.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:32.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:32.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:32.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:32.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:32.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:32.217 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:37.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:37.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:37.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:37.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:37.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:37.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:37.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:37.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:37.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:37.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:37.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:37.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:37.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:37.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:37.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:37.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:37.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:37.225 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:37.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:37.225 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:37.225 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:37.225 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:37.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:37.226 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:37.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:37.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:37.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:37.751 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:37.753 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:37.756 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:37.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:37.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:37.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:37.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:37.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:37.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:37.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:37.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:37.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:37.772 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:37.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:37.773 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.773 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.774 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.775 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.775 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.775 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.775 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:37.775 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:42.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:42.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:42.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:42.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:42.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:42.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:42.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:42.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:42.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:42.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:42.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:42.786 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:42.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:42.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:42.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:42.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:42.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:42.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:42.790 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:42.790 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:42.790 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:42.790 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:42.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:42.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:42.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:42.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:42.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:42.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:42.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:42.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:42.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:42.797 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:42.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:42.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:42.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:43.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:43.317 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:43.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:43.318 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:43.319 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:43.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:43.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:43.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:43.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:43.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:43.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:43.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:43.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:43.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:43.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:43.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:43.324 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:48.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:48.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:48.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:48.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:48.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:48.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:48.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:48.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:48.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:48.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:48.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:48.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:48.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:48.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:48.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:48.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:48.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:48.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:48.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:48.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:48.348 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:48.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:48.348 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:48.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:48.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:48.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:48.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:48.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:48.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:48.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:48.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:48.353 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:48.353 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:48.353 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:48.833 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:48.879 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:48.881 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:48.882 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:48.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:48.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:48.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:48.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:48.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:48.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:48.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:48.896 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:48.897 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:05:53.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:53.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:53.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:53.902 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:53.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:53.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:53.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:53.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:53.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:05:53.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:53.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:05:53.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:05:53.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:05:53.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:05:53.922 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:05:53.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:53.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:53.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:53.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:05:53.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:05:53.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:53.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:05:53.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:05:53.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:05:53.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:05:53.928 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:05:53.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:05:53.932 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:05:54.409 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:05:54.449 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:05:54.449 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:05:54.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:54.450 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:05:54.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:05:54.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:05:54.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:05:54.879 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:05:54.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:54.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:54.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:54.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:55.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:05:55.828 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:05:55.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:55.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:55.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:55.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:56.304 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:05:56.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:05:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:56.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:56.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:56.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:57.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:05:57.513 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:05:57.513 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:05:57.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:05:57.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:05:57.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:05:57.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:05:57.564 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:05:57.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:05:57.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:05:57.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:05:57.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:05:57.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:05:57.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:05:57.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:05:57.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:05:57.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:05:57.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:05:57.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:05:57.573 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:02.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:02.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:02.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:02.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:02.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:02.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:02.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:02.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:02.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:02.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:02.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:06:02.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:06:02.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:06:02.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:02.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:02.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:02.598 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:06:02.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:02.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:06:02.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:06:02.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:06:02.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:02.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:02.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:02.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:06:02.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:02.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:06:02.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:06:02.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:06:02.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:02.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:02.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:02.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:06:02.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:02.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:06:02.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:06:02.605 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:06:02.605 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:06:02.605 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:02.610 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:06:03.085 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:06:03.128 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:06:03.130 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:06:03.131 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:06:03.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:03.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:03.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:03.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:06:03.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:03.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:06:03.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:06:03.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:06:03.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:06:03.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:06:03.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:03.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:03.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:03.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:04.027 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:06:04.499 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:06:04.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:04.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:04.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:04.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:04.971 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:06:05.443 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:06:05.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:05.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:05.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:05.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:05.914 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:06:06.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:06:06.193 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:06:06.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:06.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:06.390 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:06:06.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:06.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:06.865 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:06:06.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:06.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:06.873 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:06:06.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:06.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:06.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:06.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:06.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:06.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:06.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:06.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:06.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:06.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:06.884 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:06.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:06.884 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.885 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.886 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.886 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.886 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.886 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:06.886 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:11.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:11.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:11.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:11.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:11.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:11.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:11.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:11.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:11.903 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:11.903 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:11.903 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:06:11.905 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:06:11.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:06:11.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:11.906 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:11.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:11.906 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:06:11.906 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:11.906 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:11.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:06:11.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:11.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:11.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:06:11.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:11.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:06:11.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:06:11.911 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:06:11.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:11.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:06:12.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:06:12.440 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:06:12.443 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:06:12.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:12.445 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:06:12.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:12.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:12.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:06:12.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:12.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:06:12.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:06:12.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:06:12.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:06:12.857 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:06:12.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:12.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:12.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:12.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:13.331 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:06:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:06:13.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:13.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:13.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:13.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:14.281 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:06:14.758 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:06:14.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:14.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:14.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:14.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:15.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:06:15.490 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:06:15.491 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:06:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:15.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:15.702 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:06:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:15.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:15.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:16.174 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:06:16.648 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:06:16.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:16.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:16.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:16.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:17.121 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:06:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:06:18.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:06:18.544 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:06:19.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:06:19.486 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:06:19.957 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:06:20.429 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:06:20.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:20.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:20.495 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:06:20.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:20.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:20.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:20.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:20.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:20.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:20.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:20.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:20.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:20.514 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:20.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:20.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:20.514 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:20.515 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:25.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:25.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:25.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:25.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:25.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:25.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:25.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:25.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:25.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:25.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:25.532 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:06:25.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:06:25.534 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:06:25.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:25.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:25.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:25.535 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:06:25.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:25.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:06:25.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:06:25.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:06:25.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:25.537 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:25.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:25.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:06:25.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:25.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:06:25.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:06:25.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:06:25.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:25.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:25.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:25.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:06:25.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:25.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:06:25.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:06:25.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:06:25.542 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:06:25.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:25.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:06:26.021 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:06:26.058 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:06:26.059 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:06:26.059 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:06:26.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:26.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:06:26.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:06:26.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:06:26.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:06:26.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:26.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:26.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:26.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:26.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:06:27.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:06:27.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:27.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:27.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:27.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:06:28.378 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:06:28.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:28.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:28.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:28.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:28.849 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:06:29.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:06:29.072 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:06:29.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:29.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:29.320 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:06:29.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:29.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:29.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:29.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:29.792 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:06:30.267 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:06:30.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:30.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:30.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:30.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:30.739 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:06:31.209 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:06:31.683 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:06:32.153 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:06:32.624 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:06:33.099 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:06:33.572 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:06:34.042 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:06:34.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:34.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:34.074 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:06:34.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:34.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:34.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:34.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:34.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:34.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:34.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:34.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:34.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:34.089 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:34.091 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:39.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:39.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:39.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:39.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:39.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:39.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:39.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:39.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:39.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:39.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:39.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:06:39.113 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:06:39.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:06:39.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:39.113 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:39.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:39.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:06:39.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:39.114 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:39.115 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:06:39.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:39.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:06:39.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:06:39.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:06:39.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:39.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:39.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:39.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:06:39.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:39.117 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.118 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:06:39.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:06:39.119 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:39.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:39.123 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:06:39.592 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:06:39.637 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:06:39.638 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:06:39.639 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:06:39.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:39.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:39.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:39.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:06:39.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:39.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:06:39.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:06:39.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:06:39.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:06:40.060 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:06:40.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:40.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:40.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:40.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:40.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:06:41.001 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:06:41.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:41.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:41.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:41.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:41.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:06:41.948 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:06:42.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:42.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:42.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:42.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:42.420 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:06:42.701 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:06:42.701 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:06:42.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:42.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:42.893 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:06:43.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:43.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:43.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:43.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:43.364 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:06:43.833 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:06:44.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:44.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:44.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:44.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:44.303 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:06:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:06:45.245 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:06:45.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:06:46.190 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:06:46.663 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:06:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:06:47.610 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:06:47.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:47.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:47.703 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:06:47.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:47.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:47.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:47.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:47.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:47.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:47.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:47.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:47.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:47.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:47.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:47.723 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:47.724 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.724 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.724 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.724 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.725 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.725 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:47.725 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:52.723 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:52.723 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:52.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:52.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:52.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:52.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:52.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:52.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:52.738 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:52.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:06:52.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:06:52.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:06:52.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:06:52.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:52.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:52.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:52.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:06:52.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:06:52.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:06:52.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:06:52.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:06:52.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:52.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:52.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:52.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:06:52.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:06:52.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:06:52.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:06:52.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:06:52.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:52.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:06:52.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:52.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:06:52.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:06:52.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:06:52.748 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:06:52.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:06:52.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:06:52.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:06:52.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:06:52.749 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:06:52.749 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:06:52.749 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:06:52.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:06:52.754 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:06:53.228 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:06:53.280 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:06:53.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:06:53.283 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:06:53.285 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:06:53.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:53.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:53.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:06:53.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:53.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:06:53.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:06:53.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:06:53.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:06:53.318 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:06:53.318 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:06:53.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:53.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:06:53.699 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:06:53.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:53.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:53.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:53.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:54.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:06:54.646 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:06:54.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:54.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:54.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:54.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:55.115 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:06:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:06:55.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:55.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:55.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:56.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:06:56.526 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:06:56.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:56.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:56.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:56.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:56.996 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:06:57.466 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:06:57.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:57.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:57.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:57.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:57.935 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:06:58.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:06:58.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:06:58.319 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:06:58.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:06:58.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:06:58.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:06:58.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:06:58.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:06:58.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:06:58.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:06:58.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:06:58.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:06:58.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:06:58.322 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:06:58.322 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:58.322 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:58.322 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:06:58.322 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:03.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:03.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:03.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:03.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:03.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:03.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:03.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:03.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:03.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:03.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:03.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:03.327 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:03.327 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:03.328 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:03.328 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:03.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:03.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:03.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:03.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:03.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:03.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:03.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:03.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:03.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:03.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:03.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:03.331 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:03.332 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:03.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:03.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:03.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:03.845 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:03.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:03.846 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:03.846 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:03.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:03.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:03.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:04.278 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:04.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:04.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:04.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:04.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:04.748 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:05.218 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:05.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:05.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:05.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:05.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:05.688 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:07:06.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:07:06.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:06.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:06.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:06.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:06.627 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:07:06.906 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:07:06.906 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:07:06.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:06.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:07:07.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:07.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:07.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:07.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:07.566 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:07:08.037 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:07:08.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:08.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:08.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:08.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:08.508 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:07:08.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:08.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:08.908 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:07:08.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:08.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:08.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:08.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:08.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:08.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:08.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:08.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:08.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:08.923 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:08.923 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1214 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:13.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:13.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:13.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:13.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:13.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:13.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:13.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:13.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:13.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:13.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:13.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:13.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:13.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:13.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:13.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:13.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:13.930 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:13.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:13.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:13.932 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:13.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:13.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:13.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:13.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:13.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:13.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:13.938 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:13.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:13.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:14.413 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:14.466 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:14.468 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:14.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:14.471 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:14.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:14.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:14.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:14.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:14.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:14.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:14.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:14.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:14.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:14.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:14.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:14.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:15.356 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:15.829 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:15.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:15.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:15.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:15.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:16.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:07:16.767 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:07:16.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:16.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:16.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:16.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:17.237 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:07:17.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:17.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:17.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:17.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:17.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:17.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:17.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:17.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:17.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:17.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:17.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:17.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:17.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:17.555 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:17.555 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:17.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:17.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:17.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:17.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:17.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:22.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:22.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:22.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:22.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:22.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:22.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:22.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:22.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:22.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:22.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:22.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:22.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:22.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:22.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:22.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:22.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:22.579 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:22.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:22.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:22.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:22.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:22.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:22.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:22.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:22.582 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:22.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:22.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:22.584 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:22.584 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:22.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:22.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:22.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:22.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:22.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:22.585 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:22.587 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:22.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:22.587 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:22.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:22.588 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:22.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:22.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:22.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:23.069 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:23.109 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:23.109 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:23.110 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:23.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:23.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:23.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:23.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:23.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:23.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:23.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:23.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:23.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:23.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:23.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:23.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:23.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:24.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:24.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:24.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:24.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:24.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:24.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:07:25.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:07:25.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:25.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:25.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:25.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:25.893 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:07:26.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:26.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:26.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:26.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:26.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:26.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:26.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:26.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:26.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:26.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:26.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:26.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:26.217 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:26.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:26.217 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.218 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.218 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:26.219 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:31.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:31.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:31.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:31.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:31.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:31.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:31.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:31.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:31.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:31.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:31.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:31.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:31.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:31.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:31.222 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:31.222 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:31.222 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:31.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:31.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:31.223 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:31.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:31.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:31.225 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:31.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:31.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:31.230 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:31.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:31.738 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:31.738 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:31.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:31.739 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:31.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:31.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:31.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:31.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:31.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:31.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:31.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:31.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:32.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:32.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:32.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:32.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:32.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:32.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:32.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:32.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:32.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:32.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:32.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:32.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:32.018 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:32.019 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=173 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:37.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:37.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:37.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:37.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:37.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:37.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:37.025 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:37.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:37.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:37.026 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:37.026 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:37.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:37.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:37.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:37.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:37.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:37.027 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:37.027 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:37.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:37.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:37.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:37.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:37.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:37.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:37.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:37.029 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:37.029 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:37.029 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:37.031 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:37.031 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:37.031 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:37.032 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:37.036 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:37.506 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:37.545 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:37.545 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:37.545 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:37.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:37.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:37.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:37.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:37.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:37.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:37.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:37.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:37.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:37.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:37.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:37.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:37.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:37.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:37.587 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:37.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:37.587 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:42.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:42.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:42.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:42.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:42.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:42.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:42.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:42.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:42.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:42.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:42.608 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:42.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:42.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:42.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:42.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:42.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:42.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:42.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:42.612 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:42.612 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:42.612 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:42.612 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:42.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:42.613 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:42.613 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:42.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:42.614 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:42.614 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:42.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:42.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:42.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:42.615 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:42.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:42.615 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:42.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:42.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:42.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:42.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:42.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:42.618 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:42.618 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:42.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:42.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:42.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:42.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:42.623 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:43.104 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:43.150 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:43.152 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:43.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:43.155 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:43.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:43.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:43.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:43.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:43.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:43.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:43.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:43.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:43.581 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:43.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:43.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:43.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:43.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:44.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:44.534 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:44.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:44.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:44.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:44.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:45.011 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:07:45.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:45.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:45.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:45.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:45.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:45.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:45.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:45.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:45.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:45.206 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:45.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:50.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:50.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:50.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:50.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:50.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:50.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:50.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:50.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:50.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:50.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:50.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:50.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:50.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:50.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:50.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:50.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:50.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:50.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:50.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:50.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:50.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:50.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:50.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:50.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:50.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:50.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:50.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:50.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:50.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:50.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:50.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:50.231 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:50.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:50.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:50.718 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:50.744 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:50.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:50.745 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:50.746 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:50.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:50.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:50.750 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:51.190 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:51.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:51.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:51.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:51.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:51.668 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:52.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:52.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:52.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:52.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:52.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:52.619 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:07:52.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:52.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:52.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:52.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:52.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:52.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:52.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:52.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:52.779 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:07:52.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:52.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:52.780 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=547 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:07:57.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:07:57.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:07:57.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:57.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:57.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:57.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:57.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:07:57.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:57.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:57.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:07:57.783 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:07:57.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:57.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:07:57.784 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:07:57.784 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:57.785 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:07:57.785 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:07:57.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:57.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:07:57.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:07:57.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:07:57.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:07:57.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:07:57.787 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:07:57.787 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:07:57.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:07:57.792 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:07:58.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:07:58.302 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:07:58.303 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:07:58.303 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:07:58.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:07:58.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:07:58.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:07:58.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:07:58.730 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:07:58.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:58.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:58.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:58.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:07:59.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:07:59.671 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:07:59.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:07:59.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:07:59.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:07:59.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:00.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:08:00.623 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:08:00.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:00.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:00.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:00.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:01.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:08:01.359 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:08:01.359 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-01-23 03:08:01.359 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:01.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:01.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:01.573 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:08:01.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:01.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:01.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:01.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:02.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:08:02.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:08:02.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:08:02.405 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:08:02.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:02.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:02.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:02.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:02.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:02.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:02.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:02.414 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:07.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:07.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:07.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:07.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:07.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:07.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:07.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:07.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:07.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:07.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:07.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:07.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:07.421 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:07.421 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:07.421 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:07.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:07.421 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:07.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:07.422 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:07.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:07.423 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:07.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:07.423 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:07.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:07.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:07.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:07.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:07.424 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:07.424 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:07.424 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:07.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:07.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:07.426 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:07.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:07.430 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:07.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:07.941 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:07.941 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:07.942 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:07.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:07.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:07.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:07.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:07.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:07.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:07.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:07.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:07.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:07.980 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:12.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:12.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:12.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:12.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:12.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:12.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:12.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:12.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:12.997 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:12.997 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:12.997 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:12.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:12.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:12.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:12.998 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:12.998 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:12.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:12.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:12.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:12.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:12.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:12.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:13.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:13.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:13.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:13.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:13.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:13.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:13.003 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:13.003 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:13.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:13.476 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:13.520 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:13.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:13.521 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:13.522 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:13.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:08:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:14.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:14.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:14.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:14.421 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:08:14.889 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:08:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:15.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:15.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:15.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:15.360 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:08:15.828 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:08:16.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:16.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:16.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:08:16.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:08:17.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:17.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:17.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:17.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:17.235 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:08:17.705 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:08:18.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:18.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:18.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:18.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:08:18.642 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:08:19.113 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:08:19.583 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:08:20.059 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:08:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:08:20.996 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:08:21.465 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:08:21.934 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:08:22.406 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:08:22.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:22.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:22.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:22.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:22.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:22.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:22.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:22.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:22.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:22.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:22.549 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:22.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.549 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:22.550 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:27.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:27.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:27.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:27.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:27.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:27.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:27.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:27.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:27.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:27.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:27.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:27.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:27.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:27.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:27.564 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:27.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:27.564 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:27.565 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:27.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:27.565 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:27.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:27.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:27.567 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:27.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:27.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:27.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:27.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:28.046 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:28.086 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:28.088 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:28.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:28.089 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:28.518 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:08:28.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:28.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:28.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:28.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:28.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:08:29.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:08:29.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:29.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:29.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:29.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:08:30.397 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:08:30.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:30.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:30.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:30.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:08:31.337 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:08:31.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:31.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:31.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:31.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:08:32.275 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:08:32.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:32.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:32.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:32.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:32.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:08:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:08:33.690 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:08:34.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:08:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:08:35.097 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:08:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:08:36.038 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:08:36.507 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:08:36.976 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:08:37.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:37.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:37.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:37.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:37.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:37.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:37.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:37.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:37.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:37.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:37.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:37.117 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2072 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.117 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.118 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.118 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:37.118 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:42.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:42.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:42.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:42.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:42.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:42.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:42.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:42.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:42.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:42.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:42.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:42.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:42.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:42.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:42.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:42.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:42.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:42.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:42.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:42.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:42.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:42.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:42.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:42.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:42.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:42.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:42.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:42.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:42.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:42.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:42.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:42.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:42.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:42.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:42.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:42.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:42.144 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:42.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:42.149 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:42.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:42.681 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:42.683 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:42.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:42.686 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:43.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:08:43.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:43.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:43.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:43.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:08:44.025 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:08:44.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:44.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:44.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:44.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:44.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:08:44.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:08:45.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:45.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:45.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:45.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:45.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:08:45.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:45.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:45.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:45.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:45.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:45.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:45.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:45.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:45.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:45.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:45.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:45.744 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:45.744 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=783 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:50.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:50.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:50.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:50.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:50.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:50.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:50.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:50.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:50.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:50.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:50.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:50.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:50.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:50.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:50.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:50.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:50.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:50.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:50.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:50.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:50.771 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:50.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:50.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:50.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:50.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:50.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:50.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:50.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:50.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:50.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:50.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:50.775 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:50.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:50.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:51.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:51.291 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:51.291 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:51.292 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:51.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:51.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:08:51.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:08:51.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:08:51.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:51.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:08:51.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:08:51.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:08:51.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:08:51.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:51.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:08:51.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:08:51.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:51.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:08:51.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:51.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:08:51.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:08:51.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:08:51.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:51.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:51.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:51.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:51.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:51.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:51.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:51.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:51.749 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:51.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:51.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:51.750 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:56.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:56.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:56.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:56.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:56.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:56.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:56.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:56.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:56.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:56.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:08:56.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:08:56.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:08:56.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:08:56.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:56.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:56.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:56.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:08:56.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:08:56.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:56.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:08:56.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:08:56.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:08:56.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:08:56.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:08:56.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:56.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:08:56.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:56.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:08:56.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:08:56.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:08:56.766 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:08:56.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:08:56.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:08:56.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:08:56.766 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:08:56.767 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:08:56.767 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:08:56.767 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:08:56.772 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:08:57.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:08:57.288 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:08:57.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:08:57.290 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:08:57.291 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:08:57.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:08:57.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:08:57.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:08:57.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:08:57.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:08:57.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:08:57.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:08:57.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:08:57.305 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:08:57.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:08:57.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:08:57.306 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.306 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.306 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.306 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.306 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.307 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:08:57.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:02.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:02.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:02.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:02.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:02.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:02.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:02.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:02.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:02.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:02.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:02.313 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:02.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:02.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:02.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:02.317 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:02.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:02.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:02.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:02.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:02.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:02.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:02.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:02.321 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:02.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:02.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:02.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:02.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:02.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:02.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:02.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:02.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:02.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:02.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:02.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:02.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:02.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:02.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:02.327 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:02.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:02.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:02.806 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:02.860 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:02.862 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:02.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:02.864 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:03.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:03.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:03.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:03.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:03.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:03.744 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:04.212 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:04.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:04.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:04.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:04.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:04.681 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:04.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:04.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:04.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:04.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:04.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:04.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:04.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:04.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:04.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:04.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:04.888 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:04.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=557 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:09.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:09.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:09.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:09.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:09.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:09.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:09.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:09.895 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:09.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:09.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:09.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:09.898 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:09.898 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:09.898 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:09.900 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:09.900 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:09.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:09.901 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:09.901 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:09.901 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:09.901 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:09.901 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:09.903 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:09.903 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:09.903 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:09.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:09.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:09.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:09.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:09.906 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:09.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:10.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:10.425 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:10.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:10.426 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:10.427 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:10.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:10.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:10.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:10.851 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:10.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:10.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:10.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:10.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:11.328 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:11.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:11.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:11.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:11.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:11.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:12.271 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:12.743 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:09:12.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:12.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:12.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:12.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:09:13.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:13.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:13.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:13.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:13.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:13.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:13.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:13.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:13.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:13.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:13.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:13.240 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.241 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.242 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.243 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:13.243 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:18.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:18.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:18.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:18.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:18.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:18.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:18.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:18.257 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:18.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:18.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:18.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:18.260 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:18.260 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:18.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:18.261 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:18.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:18.261 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:18.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:18.262 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:18.262 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:18.262 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:18.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:18.263 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:18.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:18.263 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:18.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:18.263 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:18.264 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:18.264 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:18.264 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:18.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:18.267 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:18.267 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:18.267 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:18.271 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:18.750 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:18.795 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:18.797 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:18.799 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:18.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:18.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:18.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:18.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:18.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:18.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:18.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:18.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:18.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:19.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:19.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:19.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:19.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:19.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:19.702 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:20.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:20.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:20.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:20.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:20.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:20.654 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:20.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:20.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:20.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:20.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:20.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:20.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:20.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:20.910 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:25.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:25.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:25.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:25.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:25.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:25.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:25.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:25.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:25.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:25.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:25.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:25.915 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:25.915 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:25.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:25.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:25.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:25.916 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:25.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:25.916 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:25.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:25.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:25.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:25.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:25.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:25.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:25.919 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:25.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:26.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:26.437 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:26.438 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:26.439 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:26.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:26.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:26.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:26.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:26.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:26.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:26.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:26.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:26.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:26.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:26.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:26.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:26.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:26.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:27.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:27.829 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:27.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:27.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:27.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:27.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:28.777 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:09:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:28.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:28.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:28.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:29.249 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:09:29.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:29.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:29.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:29.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:29.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:29.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:29.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:29.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:29.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:29.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:29.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:29.279 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:29.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:29.279 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.279 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.280 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.280 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.280 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.280 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:29.280 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:34.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:34.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:34.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:34.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:34.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:34.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:34.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:34.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:34.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:34.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:34.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:34.288 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:34.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:34.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:34.289 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:34.289 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:34.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:34.289 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:34.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:34.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:34.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:34.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:34.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:34.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:34.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:34.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:34.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:34.294 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:34.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:34.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:34.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:34.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:34.832 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:34.834 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:34.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:34.836 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:34.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:34.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:34.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:35.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:35.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:35.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:35.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:35.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:35.722 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:36.195 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:36.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:36.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:36.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:36.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:36.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:36.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:36.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:36.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:36.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:36.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:36.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:36.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:36.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:36.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:36.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:36.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:36.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:36.917 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:41.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:41.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:41.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:41.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:41.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:41.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:41.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:41.929 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:41.929 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:41.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:41.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:41.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:41.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:41.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:41.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:41.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:41.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:41.934 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:41.934 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:41.935 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:41.935 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:41.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:41.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:41.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:41.935 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:41.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:41.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:41.937 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:41.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:41.937 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:41.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:41.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:41.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:41.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:41.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:41.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:41.940 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:41.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:41.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:41.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:41.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:42.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:42.458 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:42.459 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:42.459 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:42.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:42.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:42.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:42.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:42.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:42.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:42.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:42.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:42.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:43.355 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:43.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:43.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:43.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:43.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:43.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:44.768 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:09:44.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:44.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:44.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:44.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:45.239 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:09:45.709 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:09:45.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:45.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:46.182 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:09:46.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:46.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:46.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:46.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:46.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:46.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:46.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:46.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:46.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:46.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:46.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:46.209 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:46.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:46.209 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:09:51.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:51.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:51.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:51.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:51.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:51.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:51.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:51.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:51.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:51.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:51.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:51.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:51.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:51.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:51.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:51.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:51.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:51.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:51.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:51.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:51.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:51.218 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:51.218 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:51.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:51.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:09:51.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:09:51.730 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:09:51.731 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:09:51.731 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:09:51.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:51.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:09:51.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:09:51.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:09:52.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:09:52.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:52.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:52.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:52.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:52.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:09:53.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:09:53.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:53.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:53.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:53.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:53.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:09:54.042 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:09:54.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:54.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:54.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:54.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:54.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:09:54.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:09:54.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:09:54.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:09:54.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:09:54.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:09:54.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:09:54.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:54.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:54.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:54.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:54.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:54.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:54.764 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:09:59.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:09:59.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:09:59.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:59.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:59.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:59.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:59.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:09:59.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:59.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:59.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:09:59.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:59.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:09:59.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:09:59.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:59.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:09:59.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:09:59.792 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:59.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:09:59.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:09:59.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:09:59.796 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:09:59.796 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:09:59.796 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:09:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:09:59.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:09:59.800 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:00.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:00.322 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:00.323 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:00.324 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:00.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:00.746 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:10:00.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:00.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:00.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:00.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:01.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:10:01.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:10:01.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:01.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:01.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:01.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:02.159 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:10:02.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:02.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:02.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:02.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:02.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:02.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:02.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:02.341 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:02.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=551 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:07.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:07.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:07.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:07.339 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:07.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:07.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:07.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:07.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:07.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:07.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:07.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:07.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:07.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:07.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:07.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:07.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:07.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:07.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:07.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:07.348 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:07.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:07.350 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:07.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:07.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:07.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:07.871 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:07.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:07.872 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:07.872 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:07.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:10:07.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:10:07.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:10:07.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:07.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:08.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:10:08.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:08.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:08.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:08.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:08.765 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:10:09.233 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:10:09.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:09.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:09.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:09.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:09.701 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:10:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:10:10.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:10.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:10.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:10.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:10.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:10:10.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:10.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:10.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:10.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:10.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:10.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:10.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:10.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:10.907 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:10.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:10.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:15.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:15.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:15.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:15.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:15.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:15.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:15.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:15.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:15.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:15.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:15.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:15.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:15.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:15.911 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:15.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:15.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:15.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:15.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:15.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:15.913 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:15.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:15.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:15.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:15.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:15.914 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:15.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:15.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:15.917 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:15.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:15.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:16.398 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:16.435 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:16.436 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:16.436 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:16.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:16.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:10:16.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:10:16.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:10:16.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:16.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:16.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:16.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:16.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:16.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:16.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:16.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:16.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:16.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:16.461 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:16.462 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:21.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:21.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:21.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:21.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:21.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:21.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:21.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:21.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:21.477 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:21.477 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:21.477 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:21.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:21.480 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:21.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:21.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:21.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:21.481 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:21.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:21.481 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:21.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:21.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:21.482 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:21.482 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:21.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:21.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:21.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:21.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:21.484 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:21.484 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:21.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:21.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:21.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:21.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:21.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:21.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:21.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:21.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:21.488 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:21.488 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:21.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:21.970 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:22.007 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:22.008 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:22.009 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:22.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:22.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:10:22.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:10:22.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:10:22.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:22.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:10:22.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:22.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:22.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:22.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:10:23.380 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:10:23.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:23.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:23.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:23.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:23.850 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:10:24.324 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:10:24.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:24.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:24.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:24.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:24.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:10:25.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:25.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:25.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:25.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:25.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:25.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:25.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:25.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:25.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:25.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:25.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:25.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:25.038 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:30.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:30.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:30.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:30.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:30.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:30.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:30.050 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:30.050 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:30.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:30.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:30.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:30.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:30.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:30.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:30.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:30.054 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:30.054 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:30.054 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:30.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:30.056 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:30.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:30.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.061 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:30.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:30.568 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:30.568 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:30.569 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:30.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:30.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:10:30.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:10:30.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:10:30.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:30.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:30.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:30.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:30.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:30.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:30.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:30.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:30.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:30.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:30.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:30.604 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:30.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:30.604 [WARNING] transceiver.py:250 (TRX3@172.18.28.20:5700/3) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:30.605 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:35.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:35.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:35.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:35.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:35.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:35.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:35.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:35.605 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:35.606 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:35.606 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:35.606 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:35.606 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:35.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:35.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:35.607 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:35.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:35.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:35.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:35.609 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:35.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:35.610 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:35.610 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:35.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:36.127 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:36.127 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:36.128 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:36.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:36.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:36.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:36.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:36.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:36.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:36.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:36.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:36.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:36.139 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:36.139 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.139 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.139 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.139 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.139 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.140 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:36.140 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:10:41.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:41.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:41.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:41.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:41.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:41.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:41.140 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:41.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:41.140 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:41.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:41.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:41.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:41.141 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:41.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:41.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:41.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:41.142 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:41.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:41.142 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:41.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:41.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:41.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:41.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:41.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:41.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:41.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:41.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:41.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:41.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:41.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:41.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:41.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:41.147 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:41.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:41.148 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:41.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:41.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:41.664 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:41.665 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:41.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:41.666 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:41.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:41.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:41.670 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:41.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:46.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:46.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:46.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:46.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:46.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:46.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:46.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:46.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:46.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:46.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:46.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:46.677 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:46.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:46.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:46.678 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:46.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:46.678 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:46.678 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:46.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:46.678 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:46.679 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:46.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:46.679 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:46.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:46.679 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:46.679 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:46.679 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:46.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:46.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:46.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:46.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:46.682 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:46.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:46.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:47.157 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:47.197 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:47.198 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:47.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:47.199 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:47.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:47.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:47.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:47.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:47.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:47.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:47.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:47.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:47.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:47.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:47.204 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:52.204 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:52.204 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:52.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:52.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:52.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:52.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:52.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:52.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:52.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:52.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:52.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:52.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:52.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:52.215 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:52.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:52.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:52.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:52.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:52.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:52.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:52.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:52.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:52.222 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:52.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:52.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:52.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:52.743 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:52.744 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:52.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:52.745 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:52.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:52.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:52.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:52.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:52.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:52.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:52.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:52.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:52.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:52.750 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:10:52.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:57.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:10:57.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:10:57.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:57.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:57.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:57.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:57.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:10:57.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:57.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:57.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:10:57.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:10:57.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:10:57.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:10:57.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:57.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:57.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:10:57.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:10:57.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:10:57.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:57.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:10:57.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:10:57.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:10:57.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:10:57.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:10:57.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:57.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:10:57.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:10:57.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:10:57.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:10:57.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:10:57.769 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:10:57.769 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:10:57.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:10:57.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:10:57.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:10:57.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:10:57.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:10:58.245 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:10:58.292 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:10:58.293 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:10:58.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:10:58.294 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:10:58.715 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:10:58.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:58.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:58.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:58.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:10:59.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:10:59.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:10:59.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:10:59.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:10:59.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:10:59.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:00.125 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:11:00.596 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:11:00.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:00.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:00.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:00.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:01.065 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:11:01.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:01.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:01.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:01.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:01.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:11:01.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:11:01.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:11:01.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:11:01.536 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:11:01.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:01.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:01.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:01.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:02.007 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:11:02.478 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:11:02.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:02.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:02.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:02.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:02.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:11:03.419 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:11:03.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:03.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:03.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:03.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:03.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:03.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:03.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:03.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:03.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:03.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:03.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:03.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:03.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:03.540 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:03.540 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.540 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.540 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.540 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.540 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.541 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:03.541 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:08.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:08.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:08.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:08.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:08.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:08.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:08.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:08.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:08.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:08.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:08.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:08.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:08.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:08.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:08.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:08.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:08.551 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:08.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:08.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:08.554 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:08.554 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:08.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:08.554 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:08.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:08.555 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:08.555 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:08.555 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:08.557 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:08.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:08.557 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:08.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:08.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:08.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:08.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:08.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:08.561 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:08.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:08.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:08.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:09.037 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:09.091 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:09.092 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:09.093 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:09.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:09.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:09.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:09.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:09.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:09.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:09.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:09.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:09.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:09.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:09.123 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:09.123 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:14.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:14.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:14.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:14.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:14.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:14.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:14.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:14.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:14.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:14.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:14.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:14.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:14.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:14.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:14.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:14.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:14.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:14.134 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:14.134 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:14.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:14.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:14.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:14.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:14.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:14.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:14.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:14.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:14.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:14.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:14.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:14.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:14.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:14.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:14.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:14.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:14.143 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:14.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:14.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:14.619 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:14.668 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:14.668 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:14.669 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:14.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:14.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:14.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:14.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:14.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:14.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:14.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:14.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:14.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:14.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:14.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:14.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:14.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:14.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:14.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:14.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:14.707 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:14.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:19.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:19.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:19.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:19.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:19.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:19.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:19.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:19.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:19.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:19.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:19.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:19.718 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:19.718 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:19.718 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:19.718 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:19.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:19.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:19.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:19.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:19.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:19.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:19.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:19.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:19.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:19.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:19.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:19.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:19.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:19.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:19.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:19.731 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:19.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:19.732 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:19.732 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:19.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:19.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:19.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:19.737 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:20.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:20.263 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:20.263 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:20.264 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:20.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:20.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:20.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:20.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:20.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:20.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:20.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:20.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:20.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:20.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:20.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:20.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:20.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:20.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:20.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:20.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:20.308 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:20.308 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:20.308 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:25.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:25.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:25.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:25.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:25.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:25.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:25.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:25.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:25.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:25.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:25.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:25.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:25.320 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:25.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:25.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:25.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:25.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:25.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:25.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:25.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:25.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:25.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:25.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:25.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:25.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:25.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:25.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:25.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:25.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:25.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:25.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:25.331 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:25.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:25.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:25.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:25.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.860 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:25.861 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:25.863 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:25.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:25.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:25.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:25.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:25.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:25.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:25.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:25.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:25.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:25.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:25.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:25.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:25.907 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:25.907 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:30.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:30.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:30.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:30.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:30.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:30.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:30.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:30.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:30.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:30.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:30.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:30.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:30.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:30.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:30.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:30.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:30.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:30.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:30.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:30.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:30.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:30.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:30.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:30.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:30.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:30.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:30.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:30.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:30.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:30.922 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:30.926 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:30.926 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:30.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:30.931 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:31.402 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:31.457 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:31.458 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:31.459 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:31.460 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 03:11:31.460 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 200
2026-01-23 03:11:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 03:11:31.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:31.873 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:11:31.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:32.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:32.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:32.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:32.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:32.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:32.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:11:32.815 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:11:32.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:33.084 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 03:11:33.084 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 0
2026-01-23 03:11:33.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 03:11:33.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:33.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:33.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:33.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:33.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:33.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:33.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:33.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:33.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:33.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:33.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:33.090 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:33.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:33.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:33.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:33.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:33.090 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:38.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:38.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:38.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:38.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:38.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:38.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:38.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:38.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:38.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:38.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:38.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:38.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:38.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:38.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:38.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:38.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:38.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:38.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:38.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:38.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:38.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:38.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:38.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:38.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:38.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:38.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:38.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:38.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:38.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:38.108 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:38.108 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:38.632 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:38.633 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:38.633 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:38.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:38.635 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 03:11:38.635 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 200
2026-01-23 03:11:38.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 03:11:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:39.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:11:39.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:39.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:39.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:39.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:39.526 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:11:39.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:39.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:39.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:11:40.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.258 [DEBUG] fake_trx.py:377 (BTS@172.18.28.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-01-23 03:11:40.258 [INFO] fake_trx.py:380 (BTS@172.18.28.20:5700) Artificial TRXC delay set to 0
2026-01-23 03:11:40.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-01-23 03:11:40.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:40.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:40.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:40.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:40.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:40.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:40.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:40.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:40.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:40.264 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:45.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:45.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:45.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:45.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:45.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:45.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:45.273 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:45.273 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:45.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:45.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:45.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:45.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:45.275 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:45.275 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:45.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:45.276 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:45.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:45.276 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:45.278 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:45.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:45.278 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:45.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:45.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:45.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:45.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:45.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:45.281 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:45.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:45.281 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:45.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:45.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:45.285 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:45.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:45.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:45.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:45.811 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:45.812 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:45.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:45.813 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:45.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:45.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:45.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:45.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:45.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:45.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:45.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:45.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:45.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:45.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:45.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:45.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:45.844 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:50.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:50.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:50.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:50.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:50.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:50.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:50.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:50.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:50.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:50.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:50.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:50.857 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:50.857 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:50.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:50.858 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:50.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:50.858 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:50.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:50.858 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:50.860 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:50.861 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:50.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:50.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:50.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:50.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:50.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:50.861 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:50.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:50.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:50.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:50.868 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:50.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.869 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:50.869 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:50.869 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:50.869 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:50.870 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:50.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:50.874 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:51.347 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:51.400 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:51.401 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:51.402 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:51.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:51.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:51.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:51.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:51.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:51.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:51.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:51.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:51.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:51.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:51.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:51.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:51.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:51.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:51.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:51.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:51.442 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:51.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:11:56.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:11:56.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:11:56.442 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:56.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:56.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:11:56.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:56.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:56.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:11:56.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:11:56.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:11:56.453 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:11:56.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:56.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:56.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:11:56.453 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:11:56.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:11:56.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:11:56.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:11:56.456 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:11:56.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:56.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:56.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:11:56.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:11:56.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:11:56.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:11:56.458 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:11:56.459 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:11:56.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:56.459 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:11:56.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:11:56.459 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:11:56.459 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:11:56.459 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:11:56.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:11:56.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:11:56.464 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:11:56.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:11:56.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:11:56.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:11:56.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:11:56.999 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:11:57.000 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:11:57.001 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:11:57.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:57.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:57.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:57.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:57.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:11:57.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:11:57.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:11:57.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:11:57.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:57.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:11:57.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:11:57.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:57.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:57.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:57.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:11:57.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:11:57.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:11:57.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:11:57.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:11:57.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:11:57.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:11:57.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:11:57.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:11:57.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:11:57.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:11:57.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:11:57.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:57.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:57.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:57.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:57.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:11:58.358 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:11:58.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:58.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:58.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:58.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:58.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:11:59.301 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:11:59.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:11:59.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:11:59.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:11:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:11:59.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:12:00.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:00.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:00.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:00.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:00.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:00.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:00.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:00.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:00.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:00.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:00.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:00.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:00.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:00.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:00.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:00.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:00.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:12:00.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:00.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:00.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:00.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:00.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:00.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:00.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:00.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:00.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:00.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:00.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:00.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:00.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:00.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:00.716 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:12:01.186 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:12:01.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:01.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:01.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:01.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:01.656 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:12:02.126 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:12:02.596 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:12:03.066 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:12:03.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:03.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:03.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:03.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:03.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:03.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:03.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:03.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:03.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:03.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:03.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:03.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:03.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:03.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:03.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:03.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:03.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:03.537 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:12:04.008 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:12:04.479 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:12:04.949 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:12:05.420 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:12:05.891 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:12:06.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:06.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:06.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:06.362 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:12:06.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:06.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:06.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:06.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:06.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:06.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:06.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:06.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:06.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:06.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:06.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:06.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:06.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:06.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:06.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:06.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:06.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:06.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:06.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:06.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:06.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:06.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:06.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:06.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:06.833 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:12:07.303 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:12:07.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:07.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:07.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:07.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:07.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:07.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:07.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:07.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:07.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:07.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:07.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:07.540 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:07.540 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:07.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:07.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:07.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:07.603 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:07.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:07.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:07.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:07.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:07.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:07.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:07.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:07.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:07.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:07.632 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:07.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:07.774 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:12:08.245 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:12:08.715 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:12:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:12:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:12:10.128 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:12:10.598 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:12:10.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:10.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:10.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:10.636 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:10.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:10.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:10.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:10.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:10.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:10.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:10.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:10.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:10.692 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:10.692 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:10.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:10.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:10.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:10.764 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:10.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:10.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:10.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:10.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:10.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:10.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:10.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:10.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:10.835 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:10.836 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:10.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:10.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:11.070 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:12:11.540 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:12:12.011 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:12:12.482 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:12:12.952 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:12:13.423 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:12:13.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:13.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:13.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:13.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:13.840 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:13.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:13.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:13.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:13.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:13.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:13.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:13.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:13.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:13.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:13.894 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:12:13.895 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:13.895 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:13.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:13.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:14.365 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:12:14.836 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:12:15.306 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:12:15.777 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:12:16.248 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:12:16.718 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:12:16.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:16.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:16.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:16.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:16.900 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:16.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:16.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:16.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:16.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:16.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:16.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:16.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:16.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:16.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:16.951 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:16.951 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:16.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:16.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:17.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:17.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:17.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:17.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:17.036 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:17.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:17.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:17.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:17.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:17.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:17.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:17.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:17.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:17.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:17.086 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:17.087 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:17.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:17.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:17.188 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:12:17.656 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:12:18.125 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:12:18.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:18.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:18.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:18.297 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:18.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:18.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:18.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:18.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:18.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:18.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:18.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:18.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:18.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:18.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:18.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:18.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:18.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:18.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:18.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:18.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:18.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:18.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:18.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:18.589 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:18.593 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:12:18.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:18.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:18.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:18.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:18.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:19.064 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:12:19.534 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:12:20.003 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:12:20.472 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:12:20.941 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:12:21.412 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:12:21.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:21.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:21.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:21.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:21.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:21.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:21.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:21.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:21.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:21.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:21.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:21.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:21.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:21.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:21.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:21.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:21.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:21.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:21.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:21.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:21.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:21.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:21.883 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:12:21.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:21.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:21.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:21.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:21.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:22.352 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:12:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:12:23.295 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:12:23.766 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:12:24.234 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:12:24.703 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:12:24.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:24.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:24.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:24.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:24.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:24.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:24.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:24.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:24.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:24.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:24.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:24.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:24.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:24.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:24.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:24.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:24.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:25.173 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:12:25.644 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:12:26.115 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:12:26.585 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:12:27.055 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:12:27.522 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:12:27.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:27.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:27.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:27.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:27.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:27.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:27.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:27.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:27.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:27.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:27.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:27.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:27.991 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:12:28.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:28.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:28.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:28.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:28.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:28.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:28.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:28.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:28.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:28.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:28.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:28.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:28.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:28.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:28.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:28.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:28.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.460 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:12:28.932 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:12:28.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:28.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:28.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:28.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:28.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:28.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:28.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:28.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:28.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:28.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:28.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:29.023 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:29.023 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:29.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:29.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:29.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:29.081 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:29.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:29.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:29.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:29.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:29.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:29.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:29.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:29.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:29.116 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:29.116 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:29.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:29.401 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:12:29.869 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:12:30.339 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:12:30.809 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:12:31.279 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:12:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:12:32.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:32.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:32.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:32.119 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:32.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:32.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:32.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:32.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:32.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:32.126 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:32.126 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:32.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:32.165 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:32.165 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:32.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.216 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:12:32.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:32.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:32.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:32.599 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:32.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:32.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:32.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:32.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:32.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:32.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:32.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:32.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:32.631 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:32.631 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:32.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:32.684 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:12:33.151 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:12:33.620 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:12:34.088 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:12:34.555 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:12:35.022 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:12:35.489 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:12:35.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:35.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:35.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:35.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:35.634 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:35.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:35.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:35.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:35.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:35.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:35.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:35.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:35.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:35.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:35.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:35.668 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:35.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:35.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:35.959 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:12:36.431 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 03:12:36.902 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 03:12:37.372 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 03:12:37.839 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 03:12:38.306 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 03:12:38.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:38.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:38.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:38.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:38.671 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:38.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:38.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:38.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:38.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:38.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:38.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:38.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:38.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:38.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:38.723 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:38.723 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:38.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:38.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:38.774 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 03:12:39.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:39.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:39.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:39.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:39.147 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:39.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:39.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:39.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:39.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:39.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:39.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:39.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:39.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:39.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:39.189 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:39.189 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:39.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:39.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:39.241 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 03:12:39.709 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 03:12:40.177 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 03:12:40.645 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 03:12:41.113 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 03:12:41.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:41.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:41.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:41.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:41.561 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:41.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:41.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:41.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:41.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:41.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:41.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:41.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:41.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:12:41.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:12:41.567 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:41.567 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9790 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:46.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:12:46.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:12:46.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:46.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:46.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:46.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:46.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:46.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:12:46.579 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:46.579 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:12:46.579 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:12:46.581 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:12:46.581 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:12:46.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:12:46.582 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:46.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:46.582 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:12:46.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:12:46.583 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:12:46.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:12:46.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:12:46.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:12:46.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:46.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:46.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:12:46.584 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:12:46.584 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:12:46.585 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:12:46.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:12:46.585 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:12:46.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:12:46.588 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:12:46.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:46.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:12:47.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:12:47.112 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:12:47.113 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:12:47.115 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:12:47.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:47.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:47.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:47.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:47.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:47.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:47.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.259 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:47.259 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:47.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.357 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:47.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:47.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:47.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:47.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:47.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:47.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:47.496 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:47.496 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:47.549 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:12:47.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.556 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:47.556 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:47.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:47.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:47.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:47.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:47.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:47.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:47.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:47.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:47.636 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:47.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:47.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:47.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:47.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:47.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:47.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:12:47.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:12:47.647 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:12:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:47.647 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=227 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:52.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:12:52.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:12:52.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:52.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:52.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:52.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:52.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:52.664 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:12:52.664 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:52.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:12:52.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:12:52.668 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:12:52.669 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:12:52.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:12:52.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:52.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:52.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:12:52.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:12:52.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:12:52.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:12:52.672 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:12:52.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:12:52.673 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:52.673 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:12:52.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:12:52.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:12:52.676 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:12:52.676 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:12:52.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:12:52.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:12:52.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:52.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:12:52.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:12:52.677 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:12:52.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:12:52.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:12:52.681 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:12:52.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:12:52.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:12:52.686 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:12:53.167 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:12:53.205 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:12:53.205 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:12:53.205 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:12:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:53.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:53.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:53.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:53.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:53.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:53.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:53.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:53.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:53.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:53.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:53.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:53.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:53.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:53.640 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:12:53.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:53.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:53.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:53.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:54.117 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:12:54.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:54.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.142 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:54.142 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:54.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:54.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:54.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:54.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:54.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:54.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:54.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:54.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:54.162 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:54.162 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:12:54.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.591 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:12:54.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:54.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:54.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:54.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:54.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:54.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:54.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:54.860 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:54.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:54.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:54.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:54.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:54.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:54.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:54.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:54.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:54.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:54.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:54.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:54.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:55.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:55.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:55.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:55.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:55.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:12:55.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:12:55.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:12:55.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:12:55.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:12:55.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:55.057 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:12:55.057 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:12:55.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.068 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:12:55.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:12:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:12:55.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:12:55.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:12:55.465 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:12:55.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:12:55.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:12:55.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:12:55.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:12:55.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:12:55.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:12:55.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:12:55.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:12:55.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:12:55.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:12:55.477 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:12:55.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:12:55.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:00.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:00.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:00.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:00.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:00.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:00.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:00.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:00.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:00.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:00.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:00.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:13:00.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:13:00.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:13:00.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:00.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:00.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:00.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:13:00.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:00.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:13:00.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:13:00.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:13:00.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:00.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:00.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:00.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:13:00.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:00.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:13:00.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:13:00.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:13:00.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:00.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:00.509 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:00.509 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:13:00.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:00.509 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:13:00.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.513 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:13:00.513 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:13:00.513 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:13:00.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:00.518 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:13:01.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:13:01.040 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:13:01.041 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:13:01.041 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:13:01.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:01.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:01.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:01.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:01.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:01.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:01.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:01.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:01.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:01.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:01.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:01.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:01.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:01.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:01.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:01.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:01.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:01.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:01.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.336 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:01.336 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:13:01.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:13:01.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:01.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:01.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:01.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:01.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:01.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:01.667 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:01.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:01.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:01.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:01.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:01.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:01.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:01.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:01.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:01.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:01.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:01.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:01.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:13:02.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:02.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:02.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:02.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:02.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:02.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:02.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:02.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:02.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:02.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:02.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:02.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:02.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:02.241 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:02.241 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:13:02.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:02.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:02.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:13:02.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:02.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:02.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:02.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:02.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:02.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:02.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:02.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:02.825 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:02.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:02.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:02.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:02.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:02.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:02.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:02.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:02.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:02.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:02.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:02.837 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.837 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:02.838 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:07.837 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:07.837 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:07.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:07.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:07.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:07.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:07.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:07.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:07.848 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:07.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:07.849 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:13:07.853 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:13:07.853 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:13:07.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:07.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:07.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:07.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:13:07.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:07.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:13:07.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:13:07.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:13:07.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:07.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:07.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:07.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:13:07.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:07.858 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:13:07.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:13:07.861 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:13:07.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:07.861 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:07.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:07.861 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:13:07.861 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:07.861 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:13:07.865 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:13:07.865 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:13:07.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:07.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:13:08.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:13:08.381 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:13:08.381 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:13:08.382 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:13:08.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:08.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:08.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:08.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:08.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:08.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:08.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:08.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:08.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:08.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:08.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:08.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:08.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:08.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:08.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:08.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:08.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:08.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:08.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.585 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:08.585 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:13:08.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.823 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:13:08.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:08.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:08.851 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:08.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:08.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:08.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:08.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:08.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:08.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:08.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:08.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:08.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:08.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:08.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:08.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:08.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:08.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:08.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:08.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:09.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:09.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:09.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:09.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:09.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:13:09.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:09.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:09.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:09.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:09.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:09.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:09.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:09.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:09.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:09.353 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:09.353 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:13:09.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:09.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:09.777 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:13:09.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:09.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:09.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:09.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:10.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:10.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:10.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:10.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:10.169 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:10.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:10.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:10.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:10.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:10.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:10.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:10.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:10.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:10.182 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:13:10.182 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.182 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.182 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.183 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.183 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.183 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:10.183 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:13:15.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:15.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:15.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:15.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:15.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:15.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:15.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:15.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:15.194 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:13:15.199 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:13:15.199 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:13:15.199 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:15.199 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:15.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:15.200 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:13:15.200 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:15.200 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:13:15.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:13:15.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:13:15.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:15.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:15.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:15.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:13:15.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:15.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:13:15.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:13:15.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:13:15.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:15.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:15.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:15.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:13:15.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:15.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:13:15.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:13:15.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:13:15.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:13:15.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:13:15.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:13:15.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:13:15.211 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:13:15.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:15.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:13:15.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:13:15.738 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:13:15.740 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:13:15.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:15.743 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:13:15.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:15.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:15.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:15.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:15.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:15.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:15.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:15.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:15.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:15.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:15.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:15.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:15.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:16.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:13:16.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:16.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:16.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:16.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:16.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:13:17.132 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:13:17.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:17.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:17.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:17.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:17.610 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:13:17.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:17.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:17.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:17.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:17.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:17.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:17.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:17.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:17.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:17.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:17.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:17.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:17.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:17.708 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:17.708 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:13:17.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:17.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:18.089 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:13:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:18.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:18.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:18.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:18.567 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:13:19.044 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:13:19.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:19.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:19.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:19.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:19.522 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:13:19.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:19.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:19.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:19.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:19.855 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:19.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:19.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:19.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:19.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:19.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:19.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:19.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:19.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:19.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:19.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:19.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:19.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:19.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:19.997 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:13:20.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:20.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:20.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:20.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:20.474 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:13:20.951 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:13:21.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:13:21.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:21.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:21.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:21.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:21.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:21.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:21.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:21.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:21.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:21.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:21.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:21.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:21.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:21.528 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:21.529 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:13:21.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:21.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:21.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:13:22.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:13:22.863 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:13:23.340 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:13:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:13:24.296 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:13:24.773 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:13:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:13:25.724 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:13:26.202 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:13:26.675 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:13:27.152 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:13:27.631 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:13:28.110 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:13:28.588 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:13:29.066 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:13:29.545 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:13:30.022 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:13:30.500 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:13:30.979 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:13:31.458 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:13:31.936 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:13:32.414 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:13:32.893 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:13:33.371 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:13:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:13:34.327 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:13:34.806 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:13:35.285 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:13:35.761 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:13:36.239 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:13:36.718 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:13:37.196 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:13:37.674 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:13:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:13:38.624 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:13:39.100 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:13:39.579 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:13:40.058 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:13:40.536 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:13:41.015 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:13:41.493 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:13:41.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:41.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:41.495 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:41.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:41.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:41.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:41.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:41.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:41.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:41.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:41.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:41.498 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:13:46.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:13:46.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:13:46.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:46.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:46.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:46.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:13:46.511 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:46.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:46.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:13:46.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:13:46.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:13:46.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:13:46.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:46.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:46.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:13:46.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:13:46.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:13:46.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:13:46.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:13:46.518 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:13:46.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:46.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:46.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:13:46.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:13:46.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:13:46.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:13:46.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:13:46.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:13:46.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:46.522 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:13:46.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:13:46.522 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:13:46.522 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:13:46.522 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:13:46.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:13:46.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:13:46.525 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:13:46.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:13:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:13:46.530 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:13:47.012 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:13:47.058 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:13:47.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:47.062 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:13:47.064 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:13:47.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:47.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:47.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:47.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:47.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:47.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:47.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:47.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:47.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:47.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:47.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:47.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:47.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:13:47.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:47.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:47.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:47.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:47.968 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:13:48.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:13:48.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:48.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:48.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:48.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:48.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:13:48.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:48.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:48.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:48.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:48.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:48.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:48.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:48.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:48.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:48.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:48.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:48.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:49.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:49.022 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:49.022 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:13:49.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:49.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:49.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:13:49.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:49.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:49.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:49.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:49.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:13:50.347 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:13:50.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:50.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:50.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:50.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:50.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:13:51.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:51.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:51.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:51.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:51.147 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:13:51.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:51.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:51.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:51.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:51.164 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:51.164 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:51.164 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:51.164 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:51.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:51.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:51.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:51.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:51.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:13:51.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:13:51.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:13:51.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:13:51.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:13:51.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:13:52.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:13:52.720 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:13:52.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:52.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:52.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:52.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:52.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:13:52.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:13:52.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:13:52.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:52.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:13:52.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:13:52.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:13:52.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:13:52.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:13:52.820 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:13:52.820 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:13:52.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:52.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:13:53.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:13:53.669 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:13:54.143 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:13:54.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:13:55.099 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:13:55.577 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:13:56.056 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:13:56.534 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:13:57.013 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:13:57.491 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:13:57.970 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:13:58.449 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:13:58.928 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:13:59.406 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:13:59.884 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:14:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:14:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:14:01.312 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:14:01.781 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:14:02.251 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:14:02.726 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:14:03.195 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:14:03.664 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:14:04.137 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:14:04.615 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:14:05.087 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:14:05.561 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:14:06.037 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:14:06.505 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:14:06.974 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:14:07.443 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:14:07.914 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:14:08.381 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:14:08.848 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:14:09.315 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:14:09.782 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:14:10.249 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:14:10.717 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:14:11.184 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:14:11.651 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:14:12.118 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:14:12.587 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:14:12.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:12.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:12.785 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:12.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:12.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:12.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:12.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:12.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:12.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:12.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:14:12.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:14:12.787 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:12.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5655 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:17.788 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:14:17.788 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:14:17.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:17.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:17.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:17.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:17.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:17.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:14:17.798 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:17.798 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:14:17.798 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:14:17.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:14:17.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:14:17.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:14:17.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:17.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:14:17.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:14:17.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:17.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:14:17.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:14:17.804 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:14:17.804 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:14:17.804 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:17.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:14:18.282 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:14:18.333 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:14:18.334 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:14:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:18.335 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:14:18.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:18.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:18.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:18.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:18.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:18.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:18.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:18.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:18.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:18.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:18.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:18.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:18.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:18.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:18.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:18.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:18.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:18.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:18.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:18.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:18.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:18.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:18.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:18.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:18.756 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:14:18.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:18.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:18.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:18.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:19.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:14:19.699 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:14:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:19.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:19.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:20.168 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:14:20.638 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:14:20.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:20.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:20.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:20.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:20.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:20.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:20.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:20.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:20.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:20.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:20.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:20.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:20.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:20.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:20.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:20.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:20.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:20.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:20.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:20.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:20.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:20.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:20.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:20.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:20.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:20.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:20.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:20.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:20.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:20.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:20.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:20.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:21.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:14:21.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:14:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:21.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:21.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:22.066 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:14:22.541 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:14:22.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:22.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:22.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:22.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:23.018 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:14:23.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:23.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:23.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:23.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:23.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:23.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:23.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:23.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:23.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:23.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:23.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:23.163 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:23.163 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:14:23.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:23.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:23.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:23.434 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:23.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:23.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:23.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:23.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:23.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:23.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:23.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:23.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:23.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:23.493 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:14:23.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:14:23.973 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:14:24.452 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:14:24.928 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:14:25.406 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:14:25.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:25.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:25.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:25.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:25.788 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:25.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:25.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:25.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:25.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:25.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:25.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:25.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:25.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:25.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:25.833 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:25.833 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:14:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:25.875 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:14:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:26.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:26.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:26.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:26.102 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:26.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:26.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:26.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:26.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:26.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:26.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:26.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:26.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:26.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:26.156 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:26.156 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:14:26.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:26.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:26.344 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:14:26.815 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:14:27.291 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:14:27.761 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:14:28.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:28.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:28.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:28.182 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:28.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:28.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:28.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:28.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:28.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:28.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:28.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:28.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:28.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:28.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:28.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.230 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:14:28.700 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:14:28.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:28.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:28.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:28.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:28.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:28.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:28.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:28.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:28.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:28.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:28.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:28.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:28.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:28.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:28.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:29.174 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:14:29.649 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:14:30.123 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:14:30.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:30.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:30.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:30.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:30.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:30.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:30.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:30.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:30.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:30.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:30.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:30.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:30.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:30.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:30.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:30.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:30.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:30.598 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:14:31.070 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:14:31.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:31.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:31.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:31.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:31.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:31.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:31.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:31.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:31.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:31.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:31.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:31.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:31.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:31.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:31.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:31.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:31.542 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:14:32.013 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:14:32.487 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:14:32.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:32.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:32.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:32.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:32.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:32.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:32.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:32.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:32.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:32.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:32.938 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:32.938 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:32.959 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:32.959 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:14:32.959 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:14:32.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:32.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:14:33.906 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:14:34.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:34.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:34.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:34.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:34.228 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:34.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:34.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:34.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:34.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:34.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:34.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:34.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:34.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:34.286 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:14:34.286 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:14:34.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:34.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:34.375 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:14:34.846 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:14:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:14:35.791 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:14:36.265 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:14:36.738 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:14:37.212 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:14:37.685 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:14:38.157 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:14:38.626 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:14:39.097 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:14:39.568 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:14:40.042 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:14:40.518 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:14:40.988 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:14:41.461 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:14:41.930 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:14:42.399 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:14:42.874 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:14:43.349 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:14:43.820 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:14:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:14:44.768 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:14:45.243 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:14:45.716 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:14:46.184 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:14:46.659 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:14:47.132 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:14:47.607 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:14:48.075 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:14:48.543 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:14:49.012 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:14:49.487 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:14:49.960 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:14:50.433 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:14:50.910 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:14:51.384 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:14:51.860 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:14:52.335 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:14:52.805 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:14:53.277 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:14:53.746 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:14:54.224 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:14:54.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:54.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:54.249 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:54.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:54.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:54.253 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:14:54.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:14:54.253 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:54.253 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=7862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:14:59.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:14:59.256 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:14:59.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:59.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:59.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:59.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:59.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:14:59.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:14:59.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:59.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:14:59.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:14:59.275 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:14:59.275 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:14:59.276 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:14:59.276 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:59.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:14:59.277 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:14:59.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:14:59.277 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:14:59.279 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:14:59.279 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:14:59.279 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:14:59.279 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:59.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:14:59.280 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:14:59.280 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:14:59.280 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:14:59.281 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:14:59.281 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:14:59.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:14:59.282 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:14:59.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:14:59.282 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:14:59.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:14:59.282 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:14:59.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:14:59.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:14:59.285 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:14:59.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:14:59.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:14:59.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:14:59.812 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:14:59.814 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:14:59.817 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:14:59.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:59.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:59.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:59.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:59.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:59.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:59.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:59.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:59.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:14:59.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:59.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:59.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:59.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:59.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:59.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:14:59.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:59.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:59.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:59.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:14:59.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:14:59.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:14:59.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:14:59.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:14:59.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:14:59.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:14:59.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:00.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:00.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.099 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:00.099 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:00.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.175 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:00.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:00.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:00.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:00.252 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:00.252 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:00.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:00.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:00.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:00.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:00.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.338 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:00.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:00.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:00.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:00.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:00.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.725 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:00.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:00.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:00.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:00.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:00.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:00.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:00.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:00.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:00.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:00.963 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:00.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:00.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:01.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:01.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:01.048 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:01.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:01.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:01.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:01.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:01.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:01.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:01.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:01.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:01.103 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:01.104 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:01.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:01.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:01.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:01.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:01.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:01.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:01.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:01.291 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:01.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:01.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:01.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:01.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:01.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:01.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:01.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:01.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:01.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:01.303 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:06.306 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:06.306 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:06.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:06.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:06.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:06.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:06.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:06.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:06.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:06.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:06.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:06.324 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:06.325 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:06.325 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:06.325 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:06.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:06.326 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:06.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:06.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:06.328 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:06.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:06.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:06.329 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:06.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:06.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:06.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:06.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:06.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:06.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:06.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:06.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:06.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:06.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:06.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:06.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:06.335 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:06.335 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:06.335 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:06.823 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:06.855 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:06.856 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:06.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:06.857 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:06.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:06.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:06.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:06.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:06.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:06.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:06.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:06.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:06.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:06.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:06.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:06.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:07.299 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:07.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:07.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:07.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:07.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:07.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:07.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:07.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:07.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:07.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:07.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:07.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:07.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:07.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:07.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:07.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:07.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:07.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:07.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:07.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:07.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:07.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:07.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:08.253 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:08.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:08.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:08.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:08.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:08.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:08.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:08.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:08.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:08.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:08.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:08.302 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:08.302 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:08.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:08.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:08.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:08.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:08.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:08.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:08.349 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:08.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:08.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:08.728 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:15:09.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.010 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:09.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:09.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:09.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:09.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:09.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:09.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:09.063 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:09.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:15:09.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:09.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:09.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:09.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:09.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.491 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:09.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:09.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:09.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:09.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:09.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:09.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:09.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:09.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:09.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:09.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:09.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:09.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:09.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:09.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:09.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:09.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:09.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:09.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:09.673 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:15:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:10.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:10.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:10.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:10.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:10.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:10.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:10.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:10.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:10.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:10.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:10.139 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:10.139 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:10.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.150 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:15:10.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:10.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:10.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:10.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:10.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:10.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:10.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:10.547 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:10.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:10.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:10.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:10.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:10.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:10.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:10.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:10.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:10.568 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:10.568 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:10.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:10.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:15:11.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:11.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:11.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:11.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:11.025 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:11.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:11.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:11.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:11.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:11.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:11.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:11.038 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:11.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:11.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:11.039 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.039 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.039 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.039 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.039 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.040 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:11.040 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:16.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:16.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:16.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:16.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:16.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:16.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:16.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:16.047 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:16.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:16.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:16.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:16.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:16.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:16.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:16.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:16.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:16.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:16.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:16.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:16.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:16.055 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:16.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:16.055 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:16.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:16.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:16.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:16.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:16.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:16.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:16.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:16.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:16.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:16.058 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:16.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:16.058 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:16.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:16.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:16.062 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:16.550 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:16.593 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:16.595 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:16.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.597 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:16.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:16.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:16.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:16.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:16.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:16.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:16.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:16.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.871 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:16.871 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.876 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:16.876 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:16.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:16.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.972 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:16.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:16.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:16.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:16.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:16.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:16.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:16.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:16.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:17.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.024 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:17.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:17.030 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:17.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:17.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:17.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:17.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:17.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.093 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:17.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:17.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:17.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:17.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:17.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:17.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:17.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:17.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:17.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:17.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:17.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:17.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:17.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:17.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:17.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:17.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:17.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:17.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:17.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:17.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:17.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:17.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:17.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:17.555 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:17.555 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:17.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:17.978 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:18.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:18.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:18.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:18.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:18.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:18.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:18.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:18.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:18.138 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:18.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:18.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:18.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:18.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:18.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:18.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:18.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:18.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:18.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:18.161 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:18.161 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:18.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:18.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:18.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:18.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:18.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:18.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:18.371 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:18.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:18.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:18.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:18.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:18.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:18.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:18.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:18.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:18.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:18.383 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:18.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:23.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:23.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:23.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:23.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:23.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:23.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:23.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:23.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:23.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:23.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:23.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:23.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:23.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:23.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:23.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:23.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:23.391 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:23.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:23.391 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:23.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:23.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:23.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:23.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:23.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:23.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:23.395 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:23.395 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:23.395 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:23.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:23.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:23.916 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:23.917 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:23.918 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:23.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:23.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:23.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:23.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:23.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:23.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:23.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:23.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:23.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:23.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:23.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:23.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:23.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:24.360 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:24.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:24.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:24.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:24.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:24.837 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:24.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:24.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:24.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:24.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:24.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:24.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:24.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:24.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:24.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:24.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:24.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:24.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:24.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:24.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:24.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:24.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:24.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:25.315 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:25.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:25.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:25.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:25.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:25.793 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:15:25.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:25.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:25.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:25.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:25.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:25.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:25.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:25.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:25.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:25.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:25.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:25.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:25.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:25.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:25.893 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:25.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:25.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:26.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:15:26.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:26.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:26.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:26.747 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:15:27.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:27.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:27.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:27.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:27.051 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:27.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:27.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:27.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:27.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:27.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:27.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:27.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:27.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:27.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:27.131 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:27.131 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:27.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:27.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:27.224 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:15:27.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:27.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:27.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:27.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:27.703 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:15:28.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:28.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:28.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:28.024 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:28.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:28.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:28.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:28.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:28.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:28.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:28.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:28.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:28.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:28.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:28.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.177 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:15:28.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:28.402 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:28.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:28.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:28.655 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:15:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:28.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:28.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:28.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:28.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:28.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:28.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:28.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:28.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:28.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:28.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:28.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:28.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:28.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:28.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:15:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:15:29.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:29.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:29.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:29.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:29.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:29.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:29.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:29.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:29.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:29.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:29.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:29.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:29.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:29.710 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:29.710 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:29.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:29.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:30.088 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:15:30.565 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:15:31.044 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:15:31.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:31.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:31.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:31.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:31.503 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:31.522 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:15:31.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:31.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:31.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:31.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:31.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:31.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:31.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:31.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:31.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:31.576 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:31.576 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:31.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:31.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:31.999 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:15:32.473 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:15:32.948 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:15:33.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:33.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:33.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:33.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:33.408 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:33.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:33.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:33.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:33.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:33.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:33.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:33.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:33.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:33.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:33.423 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:33.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.424 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:33.425 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:38.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:38.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:38.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:38.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:38.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:38.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:38.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:38.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:38.428 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:38.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:38.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:38.429 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:38.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:38.429 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:38.430 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:38.430 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:38.430 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:38.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:38.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:38.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:38.433 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:38.433 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:38.433 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:38.438 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:38.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:38.953 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:38.954 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:38.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:38.956 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:38.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:38.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:38.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:38.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:38.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:38.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:38.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:38.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:39.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:39.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:39.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:39.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:39.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:39.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:39.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:39.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:39.155 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:39.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.305 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:39.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:39.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:39.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:39.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:39.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:39.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:39.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:39.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:39.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:39.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:39.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:39.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:39.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:39.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:39.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:39.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:39.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:39.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:39.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:39.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:39.682 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:39.682 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:39.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:40.347 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:40.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:40.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:40.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:40.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:40.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:40.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:40.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:40.507 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:40.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:40.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:40.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:40.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:40.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:40.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:40.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:40.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:40.519 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:40.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:40.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:40.519 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:45.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:45.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:45.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:45.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:45.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:45.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:45.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:45.533 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:45.533 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:45.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:45.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:45.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:45.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:45.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:45.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:45.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:45.541 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:45.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:45.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:45.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:45.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:45.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:45.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:45.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:45.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:45.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:45.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:45.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:45.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:45.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:45.549 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:45.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:45.554 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:46.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:46.078 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:46.080 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:46.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.083 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:46.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:46.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.108 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:46.108 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:46.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:46.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:46.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:46.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.325 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:46.325 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:46.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.498 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:46.511 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:46.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:46.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:46.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:46.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:46.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:46.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:46.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:46.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:46.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:46.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:46.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:46.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:46.800 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:46.800 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:46.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:46.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:47.465 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:47.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:47.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:47.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:47.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:47.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:47.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:47.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:47.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:47.624 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:47.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:47.632 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:47.633 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:47.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:47.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:47.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:47.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:47.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:47.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:47.636 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:47.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:47.637 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:52.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:52.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:52.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:52.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:52.640 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:52.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:52.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:52.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:52.656 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:52.656 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:52.656 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:52.659 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:52.659 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:52.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:52.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:52.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:52.660 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:52.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:52.660 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:52.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:52.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:52.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:52.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:52.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:52.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:52.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:52.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:52.665 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:52.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:52.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:52.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:52.669 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:52.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:52.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:15:53.155 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:15:53.198 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:15:53.200 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:15:53.202 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:15:53.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:53.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:53.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:53.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:53.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:53.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:53.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.390 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:53.391 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:15:53.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.541 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:53.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:53.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:53.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:53.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.628 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:15:53.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:53.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:53.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:53.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:53.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:53.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:53.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:15:53.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:15:53.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:15:53.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:15:53.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:15:53.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:53.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:15:53.915 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:15:53.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:53.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:15:54.581 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:15:54.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:54.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:54.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:54.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:54.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:15:54.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:15:54.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:15:54.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:15:54.740 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:15:54.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:54.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:54.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:54.748 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:15:54.749 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:54.749 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:54.749 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:54.749 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:54.749 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:15:59.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:15:59.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:15:59.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:59.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:59.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:59.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:59.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:15:59.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:59.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:59.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:15:59.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:15:59.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:15:59.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:15:59.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:59.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:59.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:15:59.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:15:59.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:15:59.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:15:59.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:15:59.767 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:15:59.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:59.767 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:59.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:15:59.767 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:15:59.767 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:15:59.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:15:59.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:15:59.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:15:59.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:59.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:15:59.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:15:59.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:15:59.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:15:59.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:15:59.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:15:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:15:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:15:59.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:15:59.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:15:59.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:15:59.775 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:15:59.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:15:59.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:15:59.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:00.248 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:00.290 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:00.291 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:00.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.292 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:00.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:00.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:00.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:00.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:00.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.453 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:00.453 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:00.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:00.483 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:16:00.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.626 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:00.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:00.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:00.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:00.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:16:00.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:00.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:00.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:00.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:00.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:00.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:00.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:00.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:00.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:00.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:00.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:00.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:00.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:00.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:01.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:01.000 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:16:01.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:01.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:01.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:16:01.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:16:01.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:01.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:01.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:01.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:01.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:01.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:01.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:01.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:01.809 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:01.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:01.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:01.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:01.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:01.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:01.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:01.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:01.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:01.814 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:01.814 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:01.814 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:01.814 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=444 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:06.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:06.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:06.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:06.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:06.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:06.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:06.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:06.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:06.832 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:06.832 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:06.832 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:06.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:06.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:06.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:06.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:06.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:06.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:06.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:06.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:06.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:06.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:06.836 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:06.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:06.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:06.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:06.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:06.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:06.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:06.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:06.839 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:06.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:06.839 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:06.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:06.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:06.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:06.843 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:06.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:06.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:07.330 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:07.375 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:07.378 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:07.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:07.380 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:07.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:07.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:07.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:07.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:07.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:07.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:07.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:07.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:07.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:07.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:07.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:07.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:07.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:07.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:07.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:07.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:07.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:07.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:07.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:07.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:07.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:16:07.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:07.809 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:07.809 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:16:07.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:07.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:07.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:07.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:07.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:08.272 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:16:08.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:08.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:08.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:08.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:08.289 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:08.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:08.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:08.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:08.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:08.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:08.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:08.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:08.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:08.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:08.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:08.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:08.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:08.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:08.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:16:08.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:08.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:08.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:08.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:09.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:16:09.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:09.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:09.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:09.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:09.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:09.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:09.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:09.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:09.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:09.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:09.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:09.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:09.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:09.396 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:09.396 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:16:09.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:09.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:09.686 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:16:09.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:09.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:09.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:09.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:10.157 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:16:10.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:16:10.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:10.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:10.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:10.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:11.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:16:11.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:11.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:11.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:11.425 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:11.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:11.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:11.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:11.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:11.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:11.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:11.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:11.439 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:11.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:11.439 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.440 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.441 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:11.442 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:16.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:16.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:16.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:16.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:16.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:16.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:16.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:16.451 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:16.451 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:16.452 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:16.455 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:16.455 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:16.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:16.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:16.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:16.456 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:16.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:16.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:16.458 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:16.458 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:16.458 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:16.458 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:16.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:16.459 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:16.459 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:16.459 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:16.460 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:16.460 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:16.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:16.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:16.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:16.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:16.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:16.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:16.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:16.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:16.464 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:16.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:16.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:16.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:16.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:16.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:16.952 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:16.996 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:16.998 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:17.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.001 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:17.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:17.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:17.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:17.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:17.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:17.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:17.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:17.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:17.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:17.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:17.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:17.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:17.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:17.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:17.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:17.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:17.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:17.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:17.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.371 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:17.371 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:16:17.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:16:17.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:17.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:17.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:17.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:17.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:17.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:17.874 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:17.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:17.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:17.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:17.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:17.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:17.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:17.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:16:17.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:17.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:17.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:17.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:17.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:18.382 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:16:18.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:18.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:18.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:18.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:18.860 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:16:19.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:19.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:19.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:19.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:19.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:19.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:19.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:19.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:19.042 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:19.042 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:19.042 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:19.042 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:19.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:19.104 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:19.104 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:16:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:19.338 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:16:19.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:19.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:19.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:19.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:16:20.294 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:16:20.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:20.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:20.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:20.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:20.772 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:16:21.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:21.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:21.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:21.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:21.094 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:21.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:21.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:21.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:21.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:21.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:21.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:21.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:21.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:21.102 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:21.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:21.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:21.102 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.102 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.102 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.102 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:21.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:26.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:26.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:26.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:26.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:26.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:26.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:26.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:26.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:26.116 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:26.116 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:26.117 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:26.120 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:26.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:26.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:26.121 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:26.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:26.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:26.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:26.122 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:26.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:26.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:26.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:26.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:26.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:26.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:26.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:26.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:26.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:26.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:26.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:26.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:26.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:26.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:26.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:26.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:26.129 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:26.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.130 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:26.130 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:26.130 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:26.130 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:26.135 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:26.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:26.654 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:26.655 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:26.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:26.656 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:26.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:26.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:26.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:26.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:26.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:26.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:26.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:26.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:26.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:26.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:26.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:26.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:26.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:27.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:27.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:27.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:27.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:27.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:27.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:27.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:27.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:27.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:27.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:27.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:16:27.097 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:27.098 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:16:27.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:27.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:27.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:27.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:27.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:16:27.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:27.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:27.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:27.577 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:27.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:27.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:27.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:27.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:27.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:27.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:27.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:27.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:27.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:27.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:27.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:28.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:16:28.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:28.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:28.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:28.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:28.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:16:28.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:28.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:28.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:28.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:28.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:28.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:28.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:28.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:28.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:28.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:28.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:28.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:28.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:28.684 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:28.684 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:16:28.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:28.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:28.975 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:16:29.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:29.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:29.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:29.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:29.446 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:16:29.920 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:16:30.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:30.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:30.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:30.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:30.389 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:16:30.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:30.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:30.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:30.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:30.708 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:30.715 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:30.715 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:30.715 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:35.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:35.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:35.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:35.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:35.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:35.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:35.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:35.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:35.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:35.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:35.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:35.738 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:35.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:35.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:35.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:35.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:35.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:35.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:35.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:35.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:35.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:35.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:35.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:35.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:35.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:35.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:35.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:35.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:35.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:35.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:35.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:35.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:35.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:35.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:35.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:35.749 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:35.749 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:35.749 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:35.749 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:35.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:35.750 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:35.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:35.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:36.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:36.284 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:36.286 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:36.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:36.288 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:36.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:36.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:36.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:36.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:36.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:36.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:36.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:36.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:36.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:36.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:36.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:36.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:36.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:36.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:36.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:36.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:36.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:36.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:36.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:36.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:36.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:16:36.718 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:36.718 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:16:36.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:36.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:36.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:36.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:36.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:37.183 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:16:37.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:37.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:37.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:37.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:37.198 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:37.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:37.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:37.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:37.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:37.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:37.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:37.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:37.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:37.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:37.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:37.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:37.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:37.656 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:16:37.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:37.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:37.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:38.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:16:38.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:38.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:38.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:38.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:38.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:38.314 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:38.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:38.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:38.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:16:38.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:16:38.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:16:38.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:16:38.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:38.368 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:16:38.368 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:16:38.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:38.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:38.607 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:16:38.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:38.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:38.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:38.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:39.080 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:16:39.558 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:16:39.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:39.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:39.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:39.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:40.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:16:40.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:40.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:16:40.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:40.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:40.351 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:16:40.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:40.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:40.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:40.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:40.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:40.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:40.363 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:40.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:40.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:40.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:40.363 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:40.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:45.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:45.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:45.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:45.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:45.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:45.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:45.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:45.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:45.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:45.377 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:45.381 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:45.381 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:45.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:45.382 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:45.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:45.382 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:45.382 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:45.382 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:45.385 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:45.385 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:45.385 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:45.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:45.388 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:45.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:45.388 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:45.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:45.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:45.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:45.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:45.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:45.392 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:45.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:45.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:45.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:45.916 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:45.917 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:45.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:45.918 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:45.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:45.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:45.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:45.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:45.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:45.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:45.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:45.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:45.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:45.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:45.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:45.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:45.949 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:45.949 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:50.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:50.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:50.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:50.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:50.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:50.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:50.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:50.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:50.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:50.961 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:50.961 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:50.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:50.965 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:50.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:50.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:50.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:50.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:50.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:50.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:50.969 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:50.969 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:50.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:50.969 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:50.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:50.970 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:50.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:50.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:50.972 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:50.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:50.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:50.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:50.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:50.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:50.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:50.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:50.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:50.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:50.977 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:50.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:50.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:51.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:51.506 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:51.508 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:51.509 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:51.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:51.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:51.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:51.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:51.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:51.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:51.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:51.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:51.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:51.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:51.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:51.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:51.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:51.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:51.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:51.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:51.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:51.556 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:51.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:56.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:56.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:56.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:56.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:56.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:56.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:56.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:56.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:56.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:56.583 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:16:56.583 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:16:56.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:16:56.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:16:56.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:56.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:56.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:56.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:16:56.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:16:56.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:16:56.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:16:56.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:16:56.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:56.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:56.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:56.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:16:56.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:16:56.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:56.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:16:56.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:16:56.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:16:56.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:16:56.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:16:56.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:16:56.595 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:16:56.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:16:56.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:16:57.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:16:57.123 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:16:57.124 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:16:57.126 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:16:57.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:16:57.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:16:57.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:16:57.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:16:57.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:16:57.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:16:57.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:16:57.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:16:57.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:16:57.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:16:57.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:16:57.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:16:57.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:16:57.159 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:16:57.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:16:57.159 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:16:57.160 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:02.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:02.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:02.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:02.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:02.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:02.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:02.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:02.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:02.169 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:02.169 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:02.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:17:02.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:17:02.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:17:02.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:02.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:02.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:02.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:17:02.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:02.173 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:02.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:17:02.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:02.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:17:02.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:17:02.177 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:17:02.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:02.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:02.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:02.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:17:02.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:02.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:17:02.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:17:02.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:17:02.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:17:02.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:17:02.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:17:02.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:17:02.181 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:17:02.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:02.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:02.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:02.183 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:17:07.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:07.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:07.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:07.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:07.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:07.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:07.201 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:07.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:07.202 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:07.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:07.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:17:07.205 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:17:07.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:17:07.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:07.205 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:07.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:07.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:17:07.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:07.206 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:17:07.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:17:07.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:17:07.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:07.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:07.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:07.208 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:17:07.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:07.209 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:07.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:17:07.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:07.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:17:07.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:17:07.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:17:07.215 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:17:07.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:07.220 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:17:07.701 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:17:07.744 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:17:07.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:07.748 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:17:07.751 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:17:07.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:07.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:07.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:07.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:07.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:07.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:07.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:07.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:07.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:07.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:07.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:07.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:07.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:08.178 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:17:08.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:08.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:08.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:08.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:08.655 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:17:08.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:08.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:08.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:08.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:08.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:08.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:08.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:08.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:08.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:08.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:08.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:08.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:08.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:08.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:08.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:08.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:08.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:17:09.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:09.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:09.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:09.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:09.608 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:17:09.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:09.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:09.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:09.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:09.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:09.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:09.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:09.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:09.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:09.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:09.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:09.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:09.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:09.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:09.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:09.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:09.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:10.085 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:17:10.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:10.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:10.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:10.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:10.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:17:10.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:10.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:10.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:10.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:10.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:10.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:10.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:10.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:10.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:10.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:10.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:10.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:10.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:10.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:10.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:10.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:10.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:17:11.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:11.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:11.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:11.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:11.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:17:11.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:11.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:11.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:11.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:11.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:11.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:11.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:11.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:11.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:11.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:11.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:11.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:11.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:11.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:11.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:11.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:11.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:11.996 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:17:12.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:12.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:12.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:12.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:12.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:12.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:12.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:12.317 [WARNING] transceiver.py:250 (MS@172.18.28.22:6700) RX TRXD message (fn=1091 tn=6 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:12.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:12.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:12.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:12.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:12.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:12.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:12.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:12.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:12.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:12.373 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:17:12.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:17:12.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:12.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:12.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:12.924 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:12.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:12.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:12.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:12.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:12.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:12.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:12.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:12.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:12.951 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:17:13.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:13.006 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:13.006 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-01-23 03:17:13.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:17:13.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:13.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:13.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:13.561 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:13.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:13.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:13.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:13.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:13.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:13.581 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:13.581 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:13.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:13.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:13.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:13.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:13.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:13.907 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:17:14.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:14.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:14.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:14.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:14.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:14.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:14.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:14.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:14.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:14.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:14.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:14.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:14.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:14.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:17:14.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:17:14.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:14.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:14.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:14.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:14.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:14.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:14.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:14.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:14.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:14.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:14.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:14.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:14.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:14.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:14.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:14.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:15.340 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:17:15.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:15.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:15.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:15.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:15.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:15.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:15.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:15.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:15.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:15.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:15.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:15.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:15.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:15.534 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:15.534 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:17:15.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:15.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:15.812 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:17:16.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:16.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:16.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:16.123 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:16.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:16.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:16.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:16.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:16.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:16.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:16.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:16.192 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:16.192 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:17:16.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.282 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:17:16.753 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:17:16.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:16.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:16.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:16.806 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:16.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:16.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:16.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:16.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:16.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:16.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:16.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:16.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:16.845 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:16.845 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:16.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:16.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:17.226 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:17:17.700 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:17:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:17.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:17.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:17.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:17.705 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:17.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:17.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:17.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:17.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:17.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:17.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:17.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:17.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:17.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:17.749 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:17.749 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:17.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:17.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:18.169 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:17:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:17:18.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:18.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:18.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:18.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:18.668 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:18.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:18.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:18.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:18.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:18.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:18.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:18.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:18.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:18.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:18.681 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:18.681 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:18.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:18.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:19.116 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:17:19.594 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:17:19.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:19.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:19.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:19.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:19.644 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:19.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:19.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:19.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:19.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:19.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:19.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:19.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:19.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:19.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:19.691 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:19.691 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:19.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:19.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:20.072 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:17:20.549 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:17:20.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:20.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:20.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:20.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:20.617 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:20.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:20.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:20.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:20.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:20.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:20.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:20.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:20.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:20.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:20.641 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:20.641 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:20.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:20.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:21.026 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:17:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:17:21.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:21.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:21.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:21.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:21.591 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:21.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:21.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:21.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:21.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:21.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:21.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:21.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:21.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:21.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:21.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:21.651 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:21.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:21.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:21.982 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:17:22.460 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:17:22.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:22.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:22.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:22.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:22.564 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:22.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:22.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:22.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:22.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:22.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:22.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:22.585 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:22.585 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:22.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:22.598 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:22.598 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:22.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:22.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:22.929 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:17:23.397 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:17:23.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:23.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:23.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:23.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:23.522 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:23.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:23.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:23.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:23.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:23.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:23.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:23.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:23.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:23.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:23.590 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:17:23.590 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:17:23.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:23.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:17:24.346 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:17:24.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:24.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:24.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:24.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:24.485 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:17:24.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:24.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:24.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:24.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:24.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:24.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:24.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:24.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:24.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:24.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:24.491 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:17:29.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:29.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:29.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:29.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:29.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:29.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:29.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:29.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:29.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:29.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:29.504 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:17:29.508 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:17:29.508 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:17:29.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:29.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:29.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:29.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:17:29.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:29.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:17:29.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:17:29.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:17:29.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:29.513 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:29.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:29.513 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:17:29.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:29.513 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:17:29.515 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:17:29.515 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:17:29.515 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:29.515 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:29.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:29.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:17:29.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:29.516 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:17:29.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:17:29.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:17:29.519 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:17:29.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:17:29.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:29.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:17:30.004 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:17:30.041 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:17:30.042 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:17:30.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.043 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:17:30.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:30.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:30.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:30.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:30.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:30.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:17:30.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:30.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:30.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:30.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:30.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:30.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:30.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:30.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:30.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:30.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:17:30.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:17:30.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:17:30.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:17:30.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:17:30.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:17:30.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:30.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:31.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:17:31.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:17:31.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:17:31.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:17:31.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:17:31.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:17:31.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:17:31.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:17:31.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:31.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:31.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:31.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:31.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:31.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:31.146 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:31.146 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:17:36.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:17:36.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:17:36.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:36.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:36.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:36.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:36.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:17:36.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:36.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:36.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:17:36.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:17:36.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:17:36.164 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:17:36.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:36.165 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:36.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:17:36.165 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:17:36.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:17:36.165 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:17:36.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:17:36.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:17:36.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:36.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:36.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:17:36.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:17:36.169 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:17:36.169 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:17:36.170 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:17:36.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:17:36.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:36.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:17:36.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:17:36.171 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:17:36.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:17:36.171 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:17:36.175 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:17:36.175 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:17:36.175 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:17:36.180 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:17:36.660 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:17:37.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:17:37.618 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:17:38.099 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:17:38.573 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:17:39.042 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:17:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:17:39.993 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:17:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:17:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:17:41.400 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:17:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:17:42.338 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:17:42.808 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:17:43.276 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:17:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:17:44.215 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:17:44.684 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:17:45.157 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:17:45.629 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:17:46.097 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:17:46.566 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:17:47.038 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:17:47.516 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:17:47.994 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:17:48.472 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:17:48.940 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:17:49.410 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:17:49.880 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:17:50.350 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:17:50.818 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:17:51.288 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:17:51.768 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:17:52.246 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:17:52.723 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:17:53.198 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:17:53.666 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:17:54.136 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:17:54.612 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:17:55.092 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:17:55.572 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:17:56.050 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:17:56.528 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:17:57.007 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:17:57.488 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:17:57.969 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:17:58.449 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:17:58.928 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:17:59.407 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:17:59.875 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:18:00.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:00.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:00.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:00.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:00.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:18:00.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:18:00.206 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:00.206 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:05.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:18:05.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:18:05.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:05.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:05.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:05.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:05.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:05.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:18:05.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:05.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:18:05.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:18:05.225 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:18:05.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:18:05.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:18:05.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:05.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:05.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:18:05.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:18:05.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:18:05.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:18:05.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:18:05.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:18:05.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:05.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:05.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:18:05.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:18:05.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:18:05.233 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:18:05.233 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:18:05.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:18:05.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:05.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:05.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:18:05.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:18:05.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:18:05.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:18:05.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:18:05.238 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:18:05.238 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:05.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:05.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:18:05.726 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:18:06.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:18:06.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:18:07.167 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:18:07.641 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:18:08.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:18:08.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:18:09.049 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:18:09.528 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:18:10.004 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:18:10.473 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:18:10.942 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:18:11.411 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:18:11.880 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:18:12.350 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:18:12.823 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:18:13.291 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:18:13.761 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:18:14.230 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:18:14.698 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:18:15.171 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:18:15.640 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:18:16.113 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:18:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:18:17.056 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:18:17.525 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:18:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:18:18.463 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:18:18.933 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:18:19.410 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:18:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:18:20.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:18:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:18:21.319 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:18:21.799 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:18:22.268 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:18:22.736 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:18:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:18:23.683 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:18:24.151 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:18:24.620 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:18:25.094 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:18:25.568 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:18:26.036 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:18:26.506 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:18:26.986 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:18:27.461 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:18:27.929 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:18:28.402 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:18:28.884 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:18:29.362 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:18:29.840 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:18:30.318 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:18:30.795 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:18:31.263 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:18:31.732 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:18:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:18:32.684 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:18:33.164 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:18:33.643 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:18:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:18:34.590 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:18:35.068 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:18:35.546 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:18:36.027 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:18:36.499 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:18:36.968 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:18:37.437 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:18:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:18:38.388 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:18:38.856 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:18:39.326 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:18:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:18:40.278 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:18:40.747 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:18:41.217 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:18:41.692 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:18:42.161 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:18:42.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:42.629 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:18:43.098 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:18:43.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:43.567 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:18:44.036 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:18:44.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:44.505 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:18:44.998 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:18:45.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:45.476 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 03:18:45.954 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 03:18:46.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:46.432 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 03:18:46.906 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 03:18:47.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:47.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:47.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:47.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:18:47.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:18:47.279 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:18:47.279 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9059 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:47.279 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9059 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:47.279 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=9059 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:18:52.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:18:52.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:18:52.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:52.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:52.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:52.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:52.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:18:52.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:18:52.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:52.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:18:52.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:18:52.296 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:18:52.296 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:18:52.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:18:52.297 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:52.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:18:52.297 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:18:52.298 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:18:52.298 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:18:52.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:18:52.299 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:18:52.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:18:52.299 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:52.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:18:52.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:18:52.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:18:52.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:18:52.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:18:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:18:52.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:18:52.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:18:52.304 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:18:52.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:18:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:18:52.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:18:52.827 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:18:52.828 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:18:52.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:18:52.829 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:18:52.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:18:52.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:18:52.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:18:52.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:52.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:18:52.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:18:52.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:18:52.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:18:52.883 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:18:52.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:18:52.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:18:52.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:18:52.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:52.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:53.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:18:53.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:18:53.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:53.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:18:53.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:18:53.739 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:18:54.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:18:54.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:54.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:18:54.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:18:54.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:18:54.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:18:55.161 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:18:55.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:55.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:18:55.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:18:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:18:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:18:56.117 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:18:56.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:56.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:18:56.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:18:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:18:56.594 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:18:57.072 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:18:57.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:18:57.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:57.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:18:57.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:18:57.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:18:57.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:18:57.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:18:57.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:57.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:18:57.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:18:57.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:18:57.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:18:57.211 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:18:57.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:18:57.225 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:18:57.225 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:18:57.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:57.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:18:57.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:18:57.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:18:57.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:18:57.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:18:57.550 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:18:58.028 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:18:58.507 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:18:58.985 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:18:59.459 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:18:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:19:00.398 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:19:00.869 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:19:01.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:01.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:01.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:01.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:01.270 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:19:01.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:01.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:01.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:01.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:01.290 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:01.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:01.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:01.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:01.340 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:19:01.340 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:01.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:01.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:01.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:01.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:01.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:01.816 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:19:02.293 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:19:02.771 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:19:03.248 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:19:03.725 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:19:04.203 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:19:04.680 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:19:05.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:05.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:05.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:05.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:05.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:05.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:05.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:05.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:05.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:05.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:05.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:05.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:05.148 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:05.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:05.152 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:19:05.152 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:19:05.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:05.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:05.158 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:19:05.627 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:19:06.097 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:19:06.574 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:19:07.047 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:19:07.520 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:19:07.997 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:19:08.471 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:19:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:08.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:08.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:08.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:08.863 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:19:08.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:08.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:08.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:08.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:08.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:08.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:08.878 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:19:08.878 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:19:08.878 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:19:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:08.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:08.879 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.879 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.879 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.879 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.879 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:08.880 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:13.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:19:13.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:19:13.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:13.878 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:13.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:13.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:13.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:13.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:19:13.882 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:13.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:19:13.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:19:13.884 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:19:13.884 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:19:13.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:19:13.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:13.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:13.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:19:13.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:19:13.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:19:13.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:19:13.887 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:19:13.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:19:13.887 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:13.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:13.888 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:19:13.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:19:13.888 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:19:13.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:19:13.889 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:19:13.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:19:13.889 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:13.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:13.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:19:13.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:19:13.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:19:13.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:19:13.893 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:19:13.893 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:13.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:19:14.378 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:19:14.408 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:19:14.409 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:14.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:14.409 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:19:14.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:14.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:14.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:14.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:14.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:14.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:14.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:14.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:14.471 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:14.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:14.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:14.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:14.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:14.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:14.855 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:19:14.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:14.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:14.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:14.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:15.333 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:19:15.349 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:15.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:19:15.836 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:15.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:15.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:15.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:15.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:16.288 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:19:16.323 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:19:16.810 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:16.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:16.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:16.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:16.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:17.244 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:19:17.297 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:17.722 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:19:17.784 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:17.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:17.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:17.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:17.902 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:18.196 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:19:18.264 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:18.672 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:19:18.753 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:18.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:18.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:18.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:18.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:19.149 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:19:19.239 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:19.625 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:19:19.719 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:20.102 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:19:20.210 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:20.580 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:19:20.697 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:21.057 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:19:21.183 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:21.534 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:19:21.670 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:22.012 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:19:22.157 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:22.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:19:22.643 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:22.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:22.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:22.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:22.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:22.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:22.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:22.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:22.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:22.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:22.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:22.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:22.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:22.670 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:22.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:22.674 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:19:22.674 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:19:22.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:22.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:22.966 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:19:23.371 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:23.442 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:19:23.855 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:23.917 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:19:24.335 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:24.386 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:19:24.815 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:24.856 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:19:25.295 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:25.326 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:19:25.776 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:25.797 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:19:26.255 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:26.268 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:19:26.735 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:26.739 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:19:27.210 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:19:27.215 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:27.684 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:19:27.695 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:28.153 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:19:28.175 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:28.622 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:19:28.655 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:29.093 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:19:29.135 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:29.563 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:19:29.615 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:30.034 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:19:30.095 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:30.505 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:19:30.575 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:30.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:30.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:30.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:30.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:30.584 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:19:30.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:30.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:30.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:30.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:30.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:30.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:30.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:30.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:30.643 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:30.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:30.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:30.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:30.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:30.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:30.940 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:30.980 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:19:31.431 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:31.472 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:19:31.908 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:31.945 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:19:32.379 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:32.418 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:19:32.849 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:32.890 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:19:33.325 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:33.364 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:19:33.796 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:33.841 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:19:34.277 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:34.314 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:19:34.747 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:34.790 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:19:35.225 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:35.264 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:19:35.697 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:35.738 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:19:36.173 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:36.214 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:19:36.650 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:36.691 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:19:37.127 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:37.163 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:19:37.598 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:37.637 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:19:38.073 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:38.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:38.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:38.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:38.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:38.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:38.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:38.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:38.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:38.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:38.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:38.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:38.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:38.105 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:38.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:38.110 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:19:38.110 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:19:38.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:38.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:38.111 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:19:38.499 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:19:38.969 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:39.052 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:19:39.440 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:39.522 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:19:39.910 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:39.997 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:19:40.387 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:19:40.862 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:40.942 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:19:41.328 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:19:41.800 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:41.890 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:19:42.279 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:42.363 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:19:42.751 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:42.832 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:19:43.221 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:43.308 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:19:43.698 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:19:44.175 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:44.259 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:19:44.647 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:44.734 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:19:45.123 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:45.203 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:19:45.591 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:45.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:45.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:45.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:45.599 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:19:45.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:45.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:45.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:45.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:45.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:45.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:45.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:45.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:19:45.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:19:45.613 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:19:45.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:45.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:50.613 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:19:50.613 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:19:50.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:50.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:50.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:50.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:50.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:50.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:19:50.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:50.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:19:50.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:19:50.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:19:50.633 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:19:50.633 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:19:50.633 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:50.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:50.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:19:50.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:19:50.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:19:50.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:19:50.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:19:50.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:19:50.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:50.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:50.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:19:50.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:19:50.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:19:50.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:19:50.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:19:50.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:19:50.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:19:50.643 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:19:50.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:19:50.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:19:51.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:19:51.168 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:19:51.169 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:19:51.171 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:19:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:51.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:51.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:51.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:51.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:51.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:51.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:51.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:51.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:51.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:51.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:51.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:51.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:51.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:19:51.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:51.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:51.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:52.078 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:19:52.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:19:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:52.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:52.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:53.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:19:53.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:53.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:53.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:53.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:53.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:53.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:53.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:53.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:53.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:53.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:53.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:53.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:53.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:53.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:53.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:53.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:53.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:53.507 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:19:53.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:53.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:53.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:53.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:53.977 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:19:54.449 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:19:54.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:54.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:54.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:54.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:54.924 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:19:55.402 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:19:55.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:55.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:55.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:55.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:55.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:19:55.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:55.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:55.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:55.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:19:55.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:19:55.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:55.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:19:55.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:19:55.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:55.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:55.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:55.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:55.650 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:55.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:55.879 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:19:56.357 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:19:56.835 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:19:57.312 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:19:57.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:19:57.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:19:57.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:19:57.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:19:57.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:19:57.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:19:57.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:19:57.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:19:57.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:19:57.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:19:57.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:19:57.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:19:57.611 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:19:57.611 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:19:57.611 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:19:57.611 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.612 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.613 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:19:57.614 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:02.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:02.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:02.611 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:02.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:02.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:02.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:02.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:02.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:02.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:02.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:02.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:02.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:02.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:02.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:02.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:02.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:02.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:02.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:02.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:02.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:02.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:02.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:02.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:02.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:02.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:02.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:02.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:02.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:02.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:02.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:02.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:02.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:02.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:02.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:02.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:02.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:02.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:02.630 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:02.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:03.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:03.160 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:03.162 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:03.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:03.165 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:03.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:03.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:03.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:03.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:03.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:03.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:03.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:03.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:03.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:03.219 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:20:03.219 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:20:03.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:03.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:03.589 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:03.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:03.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:03.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:03.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:04.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:04.530 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:20:04.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:04.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:04.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:04.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:05.001 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:20:05.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:05.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:05.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:05.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:05.317 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:20:05.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:05.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:05.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:05.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:05.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:05.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:05.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:05.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:05.384 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:20:05.384 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:20:05.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:05.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:05.472 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:20:05.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:05.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:05.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:05.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:20:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:20:06.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:06.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:06.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:06.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:06.884 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:20:07.355 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:20:07.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:07.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:07.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:07.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:07.477 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:20:07.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:07.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:07.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:07.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:07.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:07.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:07.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:07.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:07.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:07.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:07.491 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:07.491 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.492 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.493 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:07.494 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:12.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:12.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:12.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:12.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:12.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:12.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:12.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:12.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:12.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:12.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:12.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:12.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:12.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:12.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:12.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:12.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:12.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:12.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:12.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:12.505 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:12.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:12.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:12.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:12.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:12.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:12.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:12.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:12.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:12.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:12.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:12.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:12.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:12.512 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:12.512 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:12.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:13.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:13.039 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:13.041 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:13.042 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:13.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:13.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:13.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:13.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:13.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:13.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:13.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:13.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:13.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:13.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:13.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:13.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:13.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:13.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:13.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:13.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:13.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:13.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:13.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:14.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:20:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:14.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:14.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:14.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:14.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:20:15.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:15.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:15.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:15.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:15.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:15.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:15.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:15.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:15.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:15.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:15.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:15.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:15.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:15.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:15.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:15.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:15.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:15.383 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:20:15.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:15.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:15.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:15.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:15.858 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:20:16.335 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:20:16.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:16.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:16.519 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:16.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:16.813 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:20:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:20:17.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:17.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:17.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:17.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:17.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:17.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:17.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:17.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:17.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:17.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:17.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:17.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:17.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:17.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:17.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:17.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:17.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:17.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:17.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:17.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:17.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:17.768 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:20:18.246 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:20:18.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:20:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:20:19.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:19.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:19.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:19.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:19.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:19.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:19.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:19.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:19.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:19.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:19.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:19.477 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:19.477 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.478 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1490 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.479 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.480 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:19.480 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1491 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:24.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:24.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:24.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:24.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:24.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:24.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:24.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:24.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:24.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:24.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:24.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:24.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:24.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:24.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:24.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:24.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:24.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:24.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:24.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:24.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:24.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:24.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:24.494 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:24.494 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:24.494 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:24.494 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:24.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:24.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:24.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:24.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:24.499 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:24.499 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:24.504 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:24.987 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:25.035 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:25.038 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:25.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:25.038 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:25.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:25.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:25.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:25.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:25.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:25.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:25.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:25.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:25.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:25.090 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:20:25.090 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:20:25.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:25.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:25.459 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:25.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:25.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:25.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:25.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:25.930 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:26.401 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:20:26.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:26.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:26.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:26.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:26.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:20:27.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:27.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:27.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:27.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:27.209 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:20:27.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:27.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:27.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:27.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:27.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:27.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:27.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:27.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:27.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:27.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:20:27.251 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:20:27.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:27.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:20:27.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:27.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:27.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:27.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:27.813 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:20:28.284 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:20:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:28.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:28.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:28.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:28.754 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:20:29.229 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:20:29.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:29.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:29.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:29.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:29.356 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:20:29.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:29.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:29.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:29.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:29.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:29.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:29.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:29.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:29.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:29.368 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:29.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1052 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:29.368 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1052 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:34.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:34.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:34.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:34.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:34.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:34.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:34.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:34.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:34.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:34.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:34.383 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:34.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:34.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:34.384 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:34.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:34.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:34.384 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:34.384 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:34.386 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:34.386 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:34.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:34.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:34.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:34.387 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:34.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:34.387 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:34.389 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:34.389 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:34.389 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:34.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:34.392 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:34.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:34.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:34.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:34.921 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:34.924 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:34.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:34.926 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:34.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:34.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:34.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:34.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:34.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:34.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:34.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:34.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:34.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:34.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:34.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:34.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:34.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:35.357 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:35.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:35.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:35.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:35.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:35.835 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:20:36.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:36.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:36.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:36.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:36.791 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:20:37.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:37.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:37.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:37.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:37.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:37.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:37.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:37.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:37.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:37.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:37.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:37.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:37.163 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:37.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:37.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:37.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:42.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:42.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:42.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:42.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:42.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:42.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:42.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:42.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:42.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:42.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:42.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:42.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:42.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:42.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:42.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:42.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:42.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:42.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:42.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:42.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:42.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:42.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:42.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:42.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:42.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:42.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:42.177 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:42.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:42.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:42.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:42.701 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:42.703 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:42.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:42.705 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:42.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:42.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:42.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:42.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:42.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:42.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:42.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:42.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:42.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:42.770 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:20:42.770 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:20:42.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:42.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:43.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:43.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:43.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:43.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:43.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:43.621 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:44.100 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:20:44.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:44.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:44.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:44.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:20:44.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:44.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:44.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:44.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:44.975 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:20:44.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:44.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:44.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:44.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:44.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:44.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:44.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:44.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:44.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:44.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:44.987 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:44.987 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:49.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:49.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:49.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:49.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:49.991 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:49.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:50.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:50.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:50.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:50.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:50.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:50.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:50.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:50.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:50.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:50.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:50.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:50.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:50.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:50.009 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:50.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:50.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:50.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:50.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:50.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:50.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:50.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:50.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:50.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:50.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:50.014 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:50.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:50.015 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:50.015 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:50.015 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:50.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:50.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:50.020 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:50.543 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:50.545 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:50.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:50.547 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:50.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:50.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:50.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:50.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:50.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:50.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:50.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:50.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:50.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:50.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:50.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:50.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:50.973 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:51.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:51.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:51.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:51.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:51.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:51.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:51.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:51.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:51.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:51.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:51.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:51.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:51.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:51.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:51.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:51.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:51.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:51.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:51.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:51.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:51.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:51.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:51.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:51.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:51.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:51.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:51.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:51.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:51.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:51.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:51.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:51.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:51.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:51.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:51.456 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:51.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:51.457 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.457 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.457 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.457 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.457 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.458 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.459 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.459 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:51.459 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:56.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:56.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:56.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:56.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:56.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:56.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:56.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:20:56.466 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:20:56.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:20:56.470 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:20:56.470 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:56.470 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:56.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:56.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:20:56.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:20:56.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:20:56.472 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:20:56.473 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:20:56.473 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:56.473 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:56.474 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:20:56.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:20:56.474 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:20:56.475 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:20:56.475 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:20:56.475 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:56.475 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:20:56.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:56.475 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:20:56.476 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:20:56.476 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:20:56.478 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:20:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:20:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:20:56.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:20:56.479 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:20:56.479 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:20:56.479 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:20:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:20:56.484 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:20:56.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:20:57.012 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:20:57.015 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:20:57.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:57.017 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:20:57.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:57.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:57.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:57.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:57.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:57.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:57.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:57.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:57.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:57.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.444 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:20:57.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:57.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:57.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:57.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:57.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:57.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:57.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:57.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:57.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:57.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:20:57.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:57.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:57.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:20:57.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:20:57.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:57.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:20:57.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:20:57.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:20:57.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:20:57.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:20:57.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:20:57.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:20:57.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:20:57.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:20:57.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:20:57.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:20:57.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:20:57.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:20:57.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:20:57.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:20:57.977 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:20:57.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:20:57.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:20:57.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.978 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.979 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.980 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.980 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.980 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.980 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:20:57.980 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=320 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:02.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:02.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:02.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:02.979 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:02.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:02.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:02.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:02.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:02.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:02.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:02.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:02.989 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:02.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:02.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:02.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:02.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:02.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:02.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:02.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:02.992 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:02.992 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:02.992 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:02.994 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:02.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:02.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:02.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:02.997 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:02.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:02.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:03.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:03.485 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:03.534 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:03.536 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:03.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:03.538 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:03.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:03.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:03.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:03.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:03.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:03.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:03.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:03.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:03.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:03.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:03.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:03.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:03.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:03.960 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:03.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:04.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:04.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:04.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:04.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:04.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:04.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:04.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:04.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:04.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:04.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:04.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:04.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:04.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:04.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:04.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:04.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:04.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:04.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:04.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:04.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:04.436 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:21:04.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:04.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:04.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:04.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:04.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:04.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:04.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:04.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:04.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:04.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:04.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:04.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:04.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:04.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:04.490 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.490 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:04.491 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:09.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:09.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:09.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:09.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:09.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:09.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:09.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:09.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:09.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:09.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:09.497 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:09.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:09.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:09.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:09.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:09.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:09.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:09.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:09.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:09.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:09.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:09.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:09.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:09.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:09.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:09.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:09.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:09.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:09.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:09.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:09.508 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:09.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:09.509 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:09.510 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:09.514 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:09.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:10.042 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:10.043 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:10.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:10.046 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:10.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:10.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:10.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:10.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:10.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:10.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:10.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:10.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:10.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:10.144 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:21:10.145 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:21:10.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:10.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:10.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:10.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:10.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:10.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:10.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:10.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:21:11.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:21:11.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:11.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:11.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:11.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:11.883 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:21:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:21:12.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:12.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:12.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:12.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:12.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:21:13.300 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:21:13.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:13.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:13.778 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:21:14.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:14.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:14.157 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:21:14.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:14.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:14.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:14.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:14.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:14.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:14.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:14.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:14.162 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:14.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:14.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.163 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=1003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.163 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:14.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:19.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:19.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:19.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:19.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:19.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:19.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:19.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:19.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:19.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:19.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:19.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:19.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:19.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:19.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:19.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:19.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:19.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:19.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:19.179 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:19.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:19.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:19.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:19.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:19.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:19.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:19.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:19.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:19.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:19.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:19.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:19.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:19.188 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:19.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:19.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:19.711 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:19.713 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:19.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:19.714 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:19.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:19.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:19.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:19.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:19.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:19.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:19.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:19.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:19.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:19.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:19.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:19.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:19.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:20.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:20.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:20.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:20.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:20.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:20.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:20.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:20.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:20.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:20.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:20.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:20.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:20.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.151 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:20.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:20.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:20.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:20.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:20.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:20.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:20.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:20.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:20.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:20.326 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:20.326 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:20.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:20.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:20.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:20.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:20.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:20.327 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:20.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:20.327 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=245 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:20.327 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:25.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:25.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:25.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:25.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:25.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:25.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:25.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:25.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:25.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:25.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:25.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:25.336 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:25.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:25.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:25.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:25.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:25.337 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:25.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:25.337 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:25.339 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:25.339 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:25.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:25.340 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:25.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:25.340 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:25.340 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:25.340 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:25.342 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:25.342 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:25.342 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:25.345 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:25.346 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:25.346 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:25.346 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:25.351 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:25.880 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:25.882 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:25.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:25.884 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:25.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:25.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:25.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:25.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:25.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:25.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:25.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:25.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:25.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:25.981 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:21:25.981 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:21:25.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:25.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:26.307 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:26.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:26.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:26.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:26.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:26.777 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:21:27.250 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:21:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:27.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:27.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:27.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:27.728 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:21:28.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:21:28.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:28.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:28.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:28.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:28.672 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:21:29.151 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:21:29.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:29.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:29.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:29.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:29.629 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:21:29.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:29.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:29.987 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:21:29.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:29.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:29.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:29.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:29.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:29.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:29.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:29.989 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:29.989 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.989 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.989 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.989 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:29.990 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=998 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:34.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:34.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:34.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:34.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:34.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:34.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:35.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:35.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:35.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:35.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:35.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:35.005 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:35.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:35.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:35.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:35.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:35.007 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:35.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:35.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:35.008 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:35.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:35.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:35.010 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:35.010 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:35.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:35.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:35.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:35.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:35.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:35.011 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:35.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:35.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:35.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:35.013 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:35.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:35.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:35.498 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:35.544 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:35.547 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:35.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:35.549 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:35.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:35.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:35.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:35.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:35.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:35.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:35.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:35.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:35.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:35.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:35.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:35.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:35.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:35.974 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:36.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:36.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:36.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:36.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:36.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:36.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:36.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:36.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:36.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:36.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:36.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:36.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:36.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:36.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:36.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:36.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:36.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:36.380 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:36.381 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.381 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.381 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.381 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.381 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=295 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.382 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:36.383 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:41.378 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:41.378 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:41.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:41.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:41.382 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:41.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:41.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:41.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:41.388 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:41.388 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:41.388 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:41.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:41.392 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:41.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:41.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:41.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:41.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:41.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:41.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:41.395 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:41.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:41.396 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:41.396 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:41.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:41.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:41.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:41.398 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:41.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:41.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:41.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:41.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:41.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:41.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:41.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:41.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:41.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:41.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:41.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.403 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:41.403 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:41.403 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:41.403 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:41.408 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:41.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:41.935 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:41.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:41.937 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:41.938 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:41.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:41.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:41.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:42.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:42.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:42.018 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:42.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:42.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:42.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:42.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:42.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:42.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:42.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:42.361 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:42.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:42.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:42.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:42.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:42.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:42.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:42.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:42.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:42.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:42.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:42.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:42.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:42.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:42.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:42.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:42.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:42.767 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:42.767 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:47.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:47.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:47.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:47.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:47.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:47.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:47.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:47.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:47.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:47.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:47.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:47.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:47.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:47.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:47.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:47.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:47.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:47.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:47.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:47.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:47.787 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:47.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:47.787 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:47.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:47.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:47.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:47.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:47.789 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:47.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:47.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:47.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:47.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:47.792 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:47.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:47.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:48.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:48.318 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:48.320 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:48.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:48.321 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:48.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:48.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:48.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:48.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:48.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:48.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:48.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:48.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:48.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:48.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:48.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:48.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:48.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:48.757 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:48.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:48.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:48.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:48.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:49.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:49.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:49.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:49.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:49.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:49.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:49.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:49.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:49.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:49.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:49.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:49.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:49.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:49.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:49.164 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.164 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:49.165 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:54.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:54.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:54.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:54.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:54.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:54.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:54.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:54.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:54.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:54.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:21:54.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:21:54.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:21:54.179 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:21:54.179 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:54.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:54.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:54.180 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:21:54.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:21:54.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:21:54.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:21:54.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:21:54.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:54.182 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:54.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:54.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:21:54.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:21:54.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:54.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:21:54.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:21:54.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:21:54.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:21:54.188 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:21:54.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:21:54.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:21:54.675 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:21:54.713 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:21:54.713 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:21:54.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:54.715 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:21:54.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:54.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:54.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:21:54.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:54.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:21:54.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:21:54.771 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:21:54.771 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:21:54.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:54.820 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:21:54.820 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:21:54.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:54.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:21:55.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:55.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:55.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:55.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:55.629 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:21:55.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:21:55.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:21:55.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:21:55.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:21:55.690 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:21:55.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:21:55.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:21:55.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:21:55.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:21:55.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:21:55.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:21:55.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:21:55.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:21:55.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:21:55.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:21:55.704 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:21:55.704 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.704 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:21:55.705 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:00.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:00.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:00.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:00.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:00.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:00.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:00.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:00.715 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:00.715 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:00.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:00.716 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:00.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:00.721 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:00.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:00.721 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:00.721 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:00.721 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:00.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:00.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:00.724 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:00.724 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:00.724 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:00.724 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:00.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:00.725 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:00.725 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:00.725 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:00.727 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:00.727 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:00.727 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:00.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:00.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:00.731 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:00.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:00.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:01.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:01.259 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:01.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:01.263 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:01.265 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:01.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:01.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:01.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:01.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:01.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:01.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:01.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:22:01.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:22:01.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:01.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:01.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:01.696 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:01.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:01.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:01.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:01.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:02.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:02.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:02.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:02.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:02.100 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:02.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:02.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:02.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:02.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:02.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:02.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:02.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:02.103 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:22:02.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:02.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:02.103 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:07.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:07.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:07.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:07.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:07.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:07.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:07.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:07.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:07.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:07.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:07.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:07.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:07.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:07.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:07.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:07.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:07.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:07.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:07.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:07.146 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:07.146 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:07.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:07.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:07.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:07.147 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:07.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:07.147 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:07.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:07.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:07.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:07.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:07.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:07.149 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:07.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:07.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:07.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:07.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:07.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:07.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:07.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:07.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:07.152 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:07.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:07.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:07.681 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:07.684 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:07.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:07.686 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:07.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:07.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:07.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:07.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:07.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:07.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:07.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:22:07.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:22:07.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:07.785 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:22:07.785 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:22:07.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:07.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:08.110 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:08.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:08.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:08.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:08.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:08.579 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:22:08.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:08.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:08.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:08.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:08.635 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:22:08.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:08.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:08.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:08.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:08.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:08.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:08.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:08.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:08.648 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:22:08.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:08.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.650 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:08.651 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:13.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:13.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:13.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:13.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:13.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:13.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:13.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:13.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:13.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:13.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:13.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:13.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:13.655 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:13.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:13.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:13.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:13.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:13.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:13.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:13.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:13.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:13.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:13.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:13.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:13.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:13.659 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:13.659 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:13.659 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:13.664 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:14.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:14.184 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:14.187 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:14.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:14.189 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:14.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:14.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:14.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:14.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:14.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:14.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:14.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:22:14.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:22:14.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:14.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:14.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:14.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:14.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:15.100 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:22:15.577 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:22:15.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:15.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:15.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:15.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:16.055 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:22:16.533 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:22:16.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:16.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:16.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:16.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:17.010 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:22:17.488 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:22:17.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:17.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:17.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:17.966 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:22:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:22:18.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:18.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:18.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:18.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:18.921 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:22:19.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:22:19.876 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:22:20.354 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:22:20.832 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:22:21.309 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:22:21.786 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:22:22.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:22.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:22.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:22.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:22.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:22.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:22.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:22.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:22.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:22.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:22.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:22.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:22.249 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:22:22.249 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.249 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.249 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.249 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.250 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.250 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.250 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:22.250 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:27.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:27.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:27.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:27.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:27.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:27.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:27.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:27.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:27.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:27.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:27.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:27.266 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:27.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:27.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:27.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:27.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:27.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:27.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:27.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:27.269 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:27.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:27.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:27.271 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:27.271 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:27.271 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:27.271 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:27.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:27.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:27.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:27.272 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:27.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:27.275 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:27.275 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:27.275 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:27.280 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:27.763 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:27.801 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:27.802 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:27.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:27.804 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:27.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:27.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:27.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:28.244 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:28.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:28.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:28.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:28.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:28.726 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:22:29.208 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:22:29.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:29.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:29.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:29.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:29.690 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:22:30.171 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:22:30.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:30.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:30.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:30.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:22:31.133 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:22:31.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:31.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:31.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:31.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:31.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:22:32.095 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:22:32.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:32.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:32.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:32.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:32.574 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:22:33.053 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:22:33.531 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:22:33.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:33.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:33.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:33.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:22:33.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:22:34.009 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:22:34.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 03:22:34.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:34.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:34.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:34.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:34.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:22:34.951 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:22:35.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:22:35.893 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:22:36.363 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:22:36.833 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:22:36.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:36.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:37.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:37.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:37.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:37.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:37.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:37.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:37.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:37.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:37.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:37.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:37.002 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (TRX3@172.18.28.20:5700/3) RX TRXD message (ver=1 fn=2078 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:37.002 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:42.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:42.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:42.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:42.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:42.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:42.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:42.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:42.013 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:42.013 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:42.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:42.014 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:42.016 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:42.017 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:42.017 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:42.017 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:42.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:42.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:42.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:42.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:42.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:42.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:42.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:42.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:42.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:42.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:42.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:42.020 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:42.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:42.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:42.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.025 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:42.025 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:42.025 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:42.025 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:42.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:42.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:42.556 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:42.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:42.560 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:42.562 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:42.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:42.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:42.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:42.990 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:43.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:43.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:43.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:43.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:43.471 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:22:43.952 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:22:44.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:44.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:44.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:44.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:44.434 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:22:44.915 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:22:45.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:45.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:45.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:45.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:45.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:22:45.859 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:22:46.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:46.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:46.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:46.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:46.342 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:22:46.822 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:22:47.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:47.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:47.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:47.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:47.301 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:22:47.783 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:22:48.261 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:22:48.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:48.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:48.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:48.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:22:48.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:22:48.738 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:22:48.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 03:22:48.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:22:48.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:22:48.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:48.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:22:49.217 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:22:49.686 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:22:50.155 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:22:50.626 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:22:51.096 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:22:51.567 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:22:51.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:51.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:51.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:51.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:51.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:51.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:51.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:51.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:51.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:51.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:51.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:51.732 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:22:51.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (TRX2@172.18.28.20:5700/2) RX TRXD message (ver=1 fn=2077 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:51.732 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2077 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:22:56.739 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:22:56.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:22:56.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:56.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:56.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:56.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:56.746 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:22:56.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:56.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:56.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:22:56.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:22:56.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:22:56.747 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:22:56.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:56.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:56.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:22:56.748 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:22:56.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:22:56.748 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:22:56.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:22:56.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:22:56.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:56.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:56.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:22:56.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:22:56.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:22:56.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:56.750 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:22:56.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:22:56.750 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:22:56.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:22:56.752 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:22:56.752 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:22:56.752 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:22:56.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:22:57.240 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:22:57.279 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:22:57.281 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:22:57.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:22:57.283 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:22:57.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:22:57.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:22:57.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:22:57.718 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:22:57.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:57.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:57.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:57.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:58.196 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:22:58.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:22:58.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:58.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:58.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:58.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:22:59.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:22:59.634 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:22:59.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:22:59.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:22:59.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:22:59.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:00.114 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:23:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:23:00.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:00.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:00.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:00.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:01.072 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:23:01.550 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:23:01.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:01.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:01.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:01.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:02.027 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:23:02.508 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:23:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:23:03.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:03.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:03.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:03.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:23:03.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:23:03.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:23:03.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 03:23:03.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:03.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:03.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:03.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:03.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:23:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:23:04.900 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:23:05.372 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:23:05.842 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:23:06.313 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:23:06.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:23:06.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:23:06.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:06.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:06.459 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:06.459 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:06.459 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=2073 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:06.460 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2073 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:11.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:11.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:11.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:11.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:11.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:11.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:11.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:11.473 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:11.473 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:11.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:11.474 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:23:11.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:23:11.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:23:11.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:11.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:11.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:11.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:23:11.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:11.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:23:11.479 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:23:11.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:23:11.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:11.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:11.480 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:11.480 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:23:11.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:11.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:11.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:23:11.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:11.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:23:11.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:23:11.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:23:11.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:23:11.485 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:23:11.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:11.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:11.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:23:11.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:23:12.014 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:23:12.016 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:23:12.018 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:23:12.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:23:12.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:23:12.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:23:12.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:23:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:23:12.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:12.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:12.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:12.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:12.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:23:13.389 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:23:13.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:13.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:13.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:13.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:13.868 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:23:14.346 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:23:14.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:14.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:14.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:14.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:14.824 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:23:15.302 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:23:15.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:15.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:15.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:15.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:15.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:23:16.257 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:23:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:16.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:16.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:16.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:23:17.211 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:23:17.680 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:23:18.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:18.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:18.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:18.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:23:18.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:23:18.150 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:23:18.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 03:23:18.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:18.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:18.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:18.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:18.628 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:23:19.097 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:23:19.566 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:23:20.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:23:20.510 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:23:20.988 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:23:21.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:23:21.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:23:21.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:21.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:21.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:21.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:21.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:21.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:21.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:21.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:21.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:21.144 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:23:21.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (TRX3@172.18.28.20:5700/3) RX TRXD message (ver=1 fn=2075 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:21.144 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2075 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:26.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:26.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:26.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:26.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:26.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:26.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:26.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:26.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:26.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:26.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:26.159 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:23:26.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:23:26.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:23:26.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:26.162 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:26.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:26.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:23:26.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:26.163 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:23:26.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:23:26.166 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:23:26.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:26.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:26.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:26.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:23:26.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:26.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:26.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:23:26.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:26.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:23:26.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:23:26.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:23:26.173 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:23:26.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:23:26.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:26.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:26.175 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:26.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:23:26.661 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:23:26.703 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:23:26.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:23:26.707 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:23:26.709 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:23:26.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:23:26.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:23:26.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:23:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:23:27.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:27.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:27.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:27.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:27.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:23:28.079 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:23:28.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:28.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:28.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:28.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:28.560 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:23:29.042 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:23:29.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:29.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:29.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:29.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:29.523 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:23:30.004 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:23:30.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:30.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:30.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:30.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:30.485 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:23:30.966 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:23:31.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:31.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:31.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:31.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:31.446 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:23:31.924 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:23:32.402 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:23:32.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:32.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:32.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:32.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:23:32.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:23:32.880 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:23:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD NOHANDOVER
2026-01-23 03:23:32.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:23:32.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:23:32.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:32.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:23:33.359 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:23:33.837 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:23:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:23:34.794 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:23:35.272 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:23:35.750 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:23:35.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:23:35.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:23:35.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:35.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:35.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:35.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:35.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:35.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:35.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:35.882 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:35.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:35.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:35.882 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:23:40.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:40.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:40.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:40.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:40.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:40.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:40.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:40.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:40.898 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:40.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:40.898 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:23:40.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:23:40.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:23:40.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:40.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:40.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:40.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:23:40.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:40.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:23:40.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:23:40.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:23:40.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:40.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:40.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:40.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:23:40.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:40.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:40.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:23:40.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:40.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:23:40.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:23:40.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:23:40.911 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:23:40.911 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:40.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:23:41.399 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:23:41.436 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:23:41.438 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:23:41.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:23:41.440 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:23:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:23:41.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:41.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:41.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:41.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:42.337 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:23:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:23:42.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:42.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:42.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:42.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:43.290 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:23:43.767 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:23:43.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:43.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:43.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:43.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:44.245 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:23:44.719 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:23:44.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:44.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:44.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:44.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:45.188 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:23:45.663 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:23:45.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:45.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:45.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:45.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:46.141 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:23:46.619 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:23:47.097 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:23:47.575 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:23:48.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:23:48.520 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:23:48.989 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:23:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:23:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:23:50.425 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:23:50.903 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:23:51.384 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:23:51.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:23:51.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:23:51.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:23:51.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:23:51.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:51.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:51.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:51.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:51.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:51.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:51.455 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:51.455 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:23:56.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:56.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:56.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:56.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:56.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:56.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:56.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:56.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:23:56.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:23:56.470 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:23:56.471 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:23:56.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:56.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:56.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:56.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:23:56.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:23:56.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:23:56.474 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:23:56.474 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:23:56.474 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:56.474 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:56.475 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:23:56.475 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:23:56.475 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:56.477 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:23:56.477 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:23:56.477 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:23:56.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:23:56.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:23:56.481 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:23:56.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:23:56.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:23:56.483 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:23:56.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:01.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:01.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:01.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:01.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:01.497 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:01.497 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:01.498 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:01.498 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:01.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:01.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:01.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:01.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:01.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:01.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:01.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:01.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:01.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:01.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:01.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:01.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:01.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:01.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:01.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:01.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:01.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:01.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:01.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:01.508 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:01.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:01.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:01.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:01.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:01.511 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:01.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:01.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:01.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.512 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:01.512 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:01.512 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:01.513 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:01.517 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:24:02.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:24:02.038 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:24:02.040 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:24:02.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:24:02.042 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:24:02.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:02.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:02.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:24:02.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:24:02.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:24:02.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:24:02.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:24:02.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:24:02.478 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:24:02.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:02.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:02.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:02.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:02.956 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:24:03.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:24:03.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:03.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:03.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:03.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:03.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:24:04.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:24:04.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:04.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:04.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:04.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:04.868 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:24:05.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:24:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:05.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:05.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:05.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:05.823 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:24:06.301 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:24:06.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:06.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:06.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:06.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:06.787 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:24:07.264 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:24:07.742 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:24:08.220 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:24:08.695 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:24:09.173 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:24:09.651 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:24:10.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:10.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:10.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:10.101 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:10.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:10.102 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:10.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:10.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:10.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:10.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:10.103 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:10.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:10.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:10.104 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:15.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:15.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:15.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:15.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:15.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:15.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:15.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:15.117 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:15.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:15.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:15.118 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:15.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:15.122 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:15.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:15.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:15.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:15.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:15.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:15.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:15.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:15.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:15.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:15.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:15.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:15.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:15.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:15.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:15.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:15.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:15.128 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:15.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:15.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:15.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:15.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:15.131 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:15.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:15.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:15.133 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:20.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:20.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:20.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:20.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:20.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:20.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:20.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:20.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:20.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:20.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:20.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:20.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:20.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:20.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:20.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:20.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:20.154 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:20.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:20.154 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:20.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:20.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:20.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:20.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:20.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:20.157 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:20.157 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:20.157 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:20.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:20.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:20.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:20.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:20.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:20.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:20.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:20.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:20.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:20.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:20.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:20.162 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:20.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:20.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:24:20.648 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:24:20.694 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:24:20.697 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:24:20.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:24:20.699 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:24:20.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:20.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:20.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:24:20.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:24:20.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:24:20.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:24:20.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:24:20.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:24:21.125 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:24:21.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:21.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:21.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:21.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:21.602 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:24:22.079 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:24:22.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:22.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:22.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:22.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:22.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:24:23.035 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:24:23.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:23.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:23.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:23.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:23.507 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:24:23.978 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:24:24.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:24.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:24.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:24.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:24.451 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:24:24.921 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:24:25.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:25.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:25.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:25.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:25.398 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:24:25.875 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:24:26.352 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:24:26.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:24:27.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:24:27.785 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:24:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:24:28.739 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:24:28.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:28.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:28.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:28.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:28.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:28.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:28.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:28.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:28.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:28.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:28.751 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:28.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:28.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:28.751 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:33.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:33.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:33.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:33.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:33.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:33.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:33.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:33.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:33.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:33.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:33.767 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:33.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:33.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:33.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:33.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:33.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:33.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:33.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:33.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:33.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:33.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:33.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:33.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:33.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:33.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:33.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:33.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:33.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:33.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:33.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:33.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:33.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:33.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:33.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:33.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:33.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:33.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:33.783 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:33.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:33.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:33.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:33.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:33.785 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:38.789 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:38.789 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:38.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:38.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:38.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:38.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:38.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:38.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:38.801 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:38.801 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:38.801 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:38.804 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:38.804 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:38.804 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:38.804 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:38.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:38.805 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:38.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:38.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:38.806 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:38.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:38.807 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:38.807 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:38.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:38.807 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:38.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:38.808 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:38.808 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:38.809 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:38.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:38.809 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:38.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:38.809 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:38.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:38.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:38.811 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:38.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:38.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:38.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:38.812 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:38.812 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:38.812 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:38.817 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:24:39.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:24:39.341 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:24:39.343 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:24:39.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:24:39.345 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:24:39.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:39.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:39.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:24:39.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:24:39.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:24:39.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:24:39.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:24:39.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:24:39.774 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:24:39.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:39.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:39.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:39.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:40.244 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:24:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:24:40.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:40.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:40.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:40.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:24:41.676 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:24:41.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:41.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:41.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:41.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:42.154 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:24:42.631 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:24:42.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:42.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:42.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:42.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:43.109 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:24:43.587 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:24:43.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:43.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:43.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:43.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:44.065 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:24:44.543 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:24:45.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:24:45.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:24:45.977 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:24:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:24:46.933 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:24:47.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:47.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:47.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:47.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:47.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:47.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:47.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:47.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:47.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:47.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:47.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:47.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:47.403 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:47.403 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:24:52.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:52.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:52.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:52.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:52.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:52.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:52.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:52.417 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:52.417 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:52.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:52.418 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:52.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:52.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:52.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:52.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:52.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:52.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:52.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:52.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:52.427 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:52.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:52.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:52.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:52.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:52.428 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:52.428 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:52.428 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:52.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:52.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:52.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:52.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:52.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:52.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:52.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:52.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:52.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:52.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:52.434 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:52.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:52.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:52.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:52.437 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:24:52.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:57.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:24:57.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:24:57.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:57.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:57.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:57.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:57.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:24:57.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:57.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:57.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:24:57.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:24:57.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:24:57.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:24:57.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:57.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:57.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:24:57.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:24:57.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:24:57.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:24:57.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:24:57.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:24:57.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:57.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:57.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:24:57.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:24:57.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:24:57.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:24:57.466 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:24:57.466 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:24:57.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:57.466 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:24:57.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:24:57.467 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:24:57.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:24:57.467 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:24:57.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:24:57.471 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:24:57.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:24:57.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:24:57.955 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:24:58.001 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:24:58.004 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:24:58.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:24:58.006 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:24:58.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:24:58.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:24:58.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:24:58.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:24:58.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:24:58.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:24:58.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:24:58.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:24:58.433 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:24:58.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:58.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:58.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:58.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:58.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:24:59.389 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:24:59.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:24:59.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:24:59.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:24:59.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:24:59.867 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:25:00.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:25:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:00.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:00.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:00.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:00.819 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:25:01.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:25:01.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:01.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:01.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:01.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:01.771 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:25:02.248 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:25:02.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:02.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:02.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:02.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:02.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:25:03.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:25:03.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:25:04.158 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:25:04.631 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:25:05.107 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:25:05.584 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:25:06.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:06.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:06.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:06.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:06.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:06.053 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:06.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:06.053 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:06.053 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:11.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:11.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:11.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:11.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:11.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:11.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:11.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:11.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:11.069 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:11.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:11.069 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:11.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:11.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:11.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:11.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:11.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:11.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:11.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:11.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:11.075 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:11.075 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:11.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:11.075 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:11.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:11.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:11.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:11.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:11.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:11.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:11.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:11.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:11.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:11.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:11.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:11.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:11.081 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:11.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:11.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:11.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:11.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:11.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:11.082 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:11.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:11.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:11.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:11.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:11.084 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:16.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:16.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:16.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:16.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:16.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:16.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:16.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:16.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:16.101 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:16.101 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:16.101 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:16.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:16.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:16.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:16.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:16.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:16.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:16.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:16.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:16.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:16.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:16.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:16.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:16.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:16.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:16.109 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:16.109 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:16.111 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:16.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:16.112 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:16.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:16.115 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:16.115 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:16.115 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.115 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:16.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:16.120 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:25:16.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:25:16.643 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:25:16.645 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:25:16.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:25:16.648 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:25:16.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:16.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:25:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:25:16.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:25:16.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:25:16.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:25:16.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:25:17.080 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:25:17.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:17.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:17.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:17.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:17.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:25:18.035 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:25:18.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:18.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:18.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:18.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:18.513 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:25:18.990 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:25:19.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:19.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:19.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:19.467 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:25:19.945 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:25:20.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:20.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:20.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:20.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:20.423 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:25:20.900 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:25:21.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:21.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:21.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:21.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:21.378 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:25:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:25:22.334 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:25:22.811 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:25:23.289 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:25:23.765 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:25:24.242 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:25:24.720 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:25:25.198 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:25:25.674 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:25:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:25:26.630 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:25:27.104 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:25:27.575 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:25:28.045 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:25:28.522 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:25:28.996 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:25:29.472 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:25:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:25:30.425 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:25:30.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:30.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:30.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:30.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:30.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:30.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:30.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:30.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:30.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:30.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:30.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:30.708 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:30.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.708 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.709 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:30.710 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:35.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:35.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:35.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:35.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:35.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:35.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:35.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:35.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:35.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:35.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:35.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:35.728 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:35.728 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:35.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:35.728 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:35.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:35.729 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:35.729 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:35.729 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:35.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:35.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:35.732 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:35.732 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:35.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:35.732 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:35.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:35.733 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:35.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:35.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:35.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:35.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:35.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:35.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:35.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:35.736 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:35.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:35.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:35.740 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:35.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:35.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:35.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:35.742 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:35.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:35.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:40.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:40.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:40.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:40.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:40.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:40.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:40.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:40.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:40.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:40.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:40.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:40.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:40.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:40.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:40.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:40.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:40.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:40.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:40.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:40.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:40.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:40.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:40.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:40.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:40.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:40.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:40.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:40.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:40.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:40.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:40.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:40.783 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:40.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:40.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:25:41.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:25:41.315 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:25:41.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:25:41.319 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:25:41.322 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:25:41.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:41.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:41.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:25:41.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:25:41.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:25:41.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:25:41.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:25:41.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:25:41.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:25:41.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:41.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:41.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:41.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:42.208 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:25:42.680 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:25:42.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:42.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:42.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:42.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:43.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:25:43.633 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:25:43.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:43.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:43.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:43.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:44.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:25:44.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:25:44.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:44.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:44.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:44.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:45.066 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:25:45.544 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:25:45.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:45.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:45.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:45.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:46.021 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:25:46.496 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:25:46.970 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:25:47.447 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:25:47.922 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:25:48.399 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:25:48.871 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:25:49.342 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:25:49.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:49.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:49.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:25:49.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:25:49.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:25:49.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:25:49.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:49.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:49.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:49.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:49.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:49.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:49.368 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:49.369 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.369 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.369 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.369 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1843 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.370 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.371 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.371 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.371 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.371 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:49.371 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:25:54.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:54.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:54.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:54.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:54.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:54.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:54.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:54.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:54.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:54.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:54.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:54.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:54.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:54.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:54.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:54.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:54.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:54.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:54.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:54.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:54.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:54.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:54.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:54.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:54.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:54.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:54.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:54.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:54.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:54.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:54.396 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:54.397 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:54.397 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:54.397 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:54.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:54.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:54.399 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:54.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:59.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:25:59.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:25:59.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:59.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:59.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:59.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:59.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:25:59.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:59.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:59.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:25:59.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:25:59.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:25:59.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:25:59.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:59.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:59.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:25:59.411 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:25:59.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:25:59.411 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:25:59.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:25:59.413 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:25:59.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:59.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:25:59.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:25:59.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:25:59.413 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:59.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:25:59.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:25:59.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:25:59.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:25:59.419 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:25:59.419 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:25:59.419 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:25:59.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:25:59.424 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:25:59.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:25:59.950 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:25:59.952 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:25:59.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:25:59.954 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:25:59.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:25:59.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:25:59.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:25:59.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:25:59.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:25:59.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:25:59.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:25:59.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:26:00.375 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:26:00.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:00.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:00.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:00.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:00.845 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:26:01.318 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:26:01.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:01.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:01.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:01.791 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:26:02.268 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:26:02.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:02.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:02.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:02.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:26:03.221 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:26:03.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:03.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:03.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:03.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:03.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:26:04.172 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:26:04.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:04.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:04.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:04.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:26:05.123 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:26:05.596 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:26:06.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:26:06.544 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:26:07.018 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:26:07.494 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:26:07.972 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:26:08.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:26:08.923 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:26:09.400 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:26:09.874 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:26:10.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:26:10.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:26:10.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:10.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:10.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:10.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:10.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:10.012 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:10.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:10.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:10.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:10.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:10.013 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:26:10.013 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2275 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:10.015 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:15.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:15.012 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:15.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:15.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:15.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:15.015 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:15.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:15.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:15.023 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:15.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:15.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:26:15.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:26:15.025 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:26:15.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:15.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:15.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:15.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:26:15.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:15.026 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:15.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:26:15.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:15.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:15.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:26:15.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:15.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:26:15.032 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:26:15.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:26:15.033 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:26:15.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:26:15.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:15.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:15.035 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:15.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:20.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:20.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:20.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:20.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:20.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:20.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:20.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:20.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:20.052 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:20.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:20.052 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:26:20.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:26:20.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:26:20.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:20.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:20.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:20.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:26:20.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:20.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:20.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:26:20.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:20.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:20.061 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:26:20.061 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:20.061 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:26:20.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:26:20.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:26:20.063 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:26:20.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:20.068 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:26:20.544 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:26:20.591 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:26:20.592 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:26:20.594 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:26:20.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:26:20.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:26:20.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:26:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:26:20.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:26:20.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:26:20.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:26:20.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:26:20.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:26:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:26:21.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:21.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:21.068 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:21.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:26:21.976 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:26:22.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:22.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:22.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:22.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:22.453 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:26:22.931 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:26:23.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:23.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:23.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:23.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:23.409 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:26:23.879 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:26:24.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:24.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:24.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:24.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:24.357 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:26:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:26:25.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:25.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:25.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:26:25.790 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:26:26.268 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:26:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:26:27.224 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:26:27.700 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:26:28.172 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:26:28.646 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:26:29.124 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:26:29.601 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:26:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:26:30.556 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:26:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:26:31.510 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:26:31.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:26:31.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:26:31.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:31.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:31.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:31.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:31.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:31.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:31.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:31.648 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:26:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:31.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:31.649 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2479 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:26:36.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:36.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:36.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:36.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:36.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:36.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:36.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:36.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:26:36.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:26:36.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:26:36.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:36.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:36.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:36.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:26:36.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:36.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:26:36.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:26:36.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:26:36.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:36.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:36.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:36.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:26:36.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:36.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:26:36.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:26:36.673 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:26:36.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:36.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:36.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:36.673 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:26:36.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:36.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:26:36.677 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:26:36.677 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:26:36.677 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:36.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:36.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:36.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:36.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:36.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:36.679 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:26:36.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:26:41.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:26:41.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:41.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:41.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:41.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:41.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:26:41.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:41.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:41.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:26:41.695 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:26:41.697 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:26:41.697 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:26:41.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:41.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:41.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:26:41.698 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:26:41.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:26:41.698 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:26:41.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:26:41.700 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:26:41.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:41.700 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:41.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:26:41.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:26:41.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:26:41.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:26:41.702 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:26:41.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:26:41.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:41.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:26:41.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:26:41.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:26:41.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:26:41.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:26:41.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:26:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:26:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:26:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:26:41.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:26:41.706 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:26:41.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:26:41.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:26:42.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:26:42.234 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:26:42.236 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:26:42.238 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:26:42.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:26:42.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:26:42.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:26:42.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:26:42.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:26:42.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:26:42.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:26:42.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:26:42.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:26:42.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:26:42.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:42.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:42.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:42.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:43.136 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:26:43.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:26:43.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:43.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:43.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:44.091 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:26:44.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:26:44.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:44.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:44.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:44.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:45.046 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:26:45.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:26:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:45.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:45.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:46.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:26:46.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:26:46.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:26:46.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:26:46.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:26:46.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:26:46.954 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:26:47.431 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:26:47.909 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:26:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:26:48.863 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:26:49.341 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:26:49.813 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:26:50.289 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:26:50.767 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:26:51.244 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:26:51.721 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:26:52.196 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:26:52.673 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:26:53.150 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:26:53.624 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:26:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:26:54.580 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:26:55.059 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:26:55.536 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:26:56.014 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:26:56.492 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:26:56.970 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:26:57.446 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:26:57.924 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:26:58.402 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:26:58.875 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:26:59.352 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:26:59.828 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:27:00.305 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:27:00.780 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:27:01.249 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:27:01.726 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:27:02.204 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:27:02.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:27:02.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:27:02.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:02.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:02.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:02.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:02.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:02.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:02.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:02.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:02.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:02.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:02.294 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:02.294 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:07.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:07.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:07.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:07.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:07.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:07.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:07.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:07.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:07.302 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:07.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:07.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:07.303 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:07.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:07.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:07.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:07.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:07.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:07.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:07.304 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:07.306 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:07.306 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:07.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:07.306 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:07.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:07.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:07.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:07.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:07.308 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:07.309 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:07.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:07.309 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:07.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:07.309 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:07.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:07.309 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:07.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:07.312 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:07.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:07.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:07.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:07.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:07.315 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:07.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:07.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:07.315 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:12.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:12.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:12.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:12.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:12.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:12.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:12.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:12.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:12.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:12.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:12.334 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:12.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:12.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:12.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:12.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:12.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:12.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:12.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:12.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:12.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:12.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:12.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:12.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:12.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:12.344 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:12.344 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:12.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:12.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:12.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:12.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:12.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:12.351 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:12.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:12.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:27:12.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:27:12.878 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:27:12.879 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:27:12.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:27:12.881 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:27:13.317 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:27:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:13.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:13.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:13.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:13.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:27:14.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:27:14.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:14.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:14.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:14.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:14.753 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:27:15.235 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:27:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:15.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:15.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:15.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:15.713 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:27:16.193 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:27:16.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:16.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:16.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:16.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:16.674 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:27:17.155 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:27:17.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:17.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:17.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:17.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:17.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:27:18.103 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:27:18.583 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:27:19.064 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:27:19.536 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:27:20.007 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:27:20.476 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:27:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:27:21.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:27:21.883 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:27:22.351 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:27:22.821 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:27:22.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:22.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:22.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:22.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:22.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:22.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:22.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:22.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:22.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:22.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:22.897 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:22.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.898 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:22.899 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2263 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:27.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:27.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:27.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:27.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:27.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:27.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:27.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:27.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:27.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:27.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:27.907 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:27.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:27.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:27.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:27.909 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:27.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:27.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:27.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:27.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:27.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:27.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:27.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:27.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:27.913 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:27.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:27.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:27.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:27.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:27.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:27.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:27.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:27.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:27.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:27.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:27.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:27.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:27.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:27.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:27.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:27.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:27.922 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:27.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:27.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:27.926 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:27.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:32.929 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:32.929 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:32.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:32.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:32.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:32.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:32.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:32.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:32.943 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:32.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:32.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:32.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:32.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:32.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:32.948 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:32.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:32.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:32.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:32.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:32.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:32.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:32.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:32.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:32.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:32.952 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:32.952 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:32.952 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:32.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:32.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:32.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:32.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:32.958 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:32.958 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:32.958 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:32.963 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:27:33.445 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:27:33.488 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:27:33.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:27:33.492 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:27:33.494 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:27:33.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:27:33.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:33.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:33.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:33.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:34.383 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:27:34.861 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:27:34.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:34.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:34.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:34.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:35.342 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:27:35.823 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:27:35.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:35.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:35.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:35.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:36.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:27:36.778 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:27:36.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:36.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:36.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:36.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:37.254 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:27:37.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:27:37.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:37.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:37.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:37.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:38.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:27:38.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:27:39.135 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:27:39.604 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:27:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:27:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:27:41.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:27:41.495 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:27:41.964 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:27:42.433 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:27:42.907 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:27:43.385 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:27:43.863 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:27:44.339 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:27:44.808 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:27:45.277 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:27:45.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:45.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:45.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:45.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:45.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:45.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:45.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:45.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:45.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:45.507 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:45.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:45.507 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2703 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:27:50.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:50.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:50.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:50.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:50.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:50.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:50.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:50.522 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:50.522 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:50.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:50.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:50.526 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:50.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:50.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:50.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:50.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:50.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:50.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:50.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:50.529 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:50.530 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:50.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:50.530 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:50.530 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:50.530 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:50.530 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:50.530 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:50.532 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:50.532 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:50.532 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:50.532 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:50.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:50.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:50.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:50.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:50.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:50.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:50.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:50.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:50.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:50.536 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:50.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:50.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:50.538 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:27:50.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:55.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:27:55.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:27:55.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:55.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:55.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:55.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:55.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:27:55.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:55.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:55.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:27:55.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:27:55.556 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:27:55.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:27:55.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:55.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:55.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:27:55.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:27:55.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:27:55.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:27:55.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:27:55.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:27:55.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:55.560 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:55.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:27:55.560 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:27:55.560 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:27:55.560 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:27:55.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:27:55.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:27:55.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:55.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:27:55.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:27:55.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:27:55.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:27:55.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:27:55.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.566 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:27:55.566 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:27:55.566 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:27:55.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:27:55.571 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:27:56.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:27:56.098 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:27:56.100 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:27:56.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:27:56.102 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:27:56.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:27:56.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:27:56.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:27:56.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:27:56.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:27:56.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:27:56.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:27:56.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:27:56.141 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:27:56.141 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:27:56.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:27:56.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:27:56.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:27:56.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:56.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:56.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:56.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:57.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:27:57.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:27:57.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:57.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:57.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:57.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:57.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:27:58.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:27:58.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:58.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:58.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:58.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:58.917 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:27:59.394 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:27:59.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:27:59.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:27:59.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:27:59.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:27:59.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:28:00.349 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:28:00.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:00.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:00.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:00.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:00.828 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:28:01.306 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:28:01.784 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:28:02.262 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:28:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:28:03.220 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:28:03.694 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:28:04.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:04.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:04.145 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:04.149 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:04.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:04.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:04.150 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:04.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:09.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:09.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:09.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:09.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:09.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:09.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:09.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:09.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:09.167 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:09.167 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:09.167 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:09.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:09.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:09.171 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:09.171 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:09.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:09.172 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:09.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:09.172 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:09.174 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:09.175 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:09.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:09.175 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:09.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:09.175 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:09.175 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:09.175 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:09.177 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:09.177 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:09.177 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:09.177 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:09.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:09.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:09.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:09.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:09.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:09.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:09.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:09.181 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:09.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:09.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:09.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:09.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:09.183 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:14.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:14.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:14.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:14.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:14.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:14.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:14.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:14.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:14.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:14.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:14.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:14.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:14.203 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:14.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:14.203 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:14.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:14.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:14.204 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:14.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:14.205 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:14.205 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:14.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:14.206 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:14.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:14.206 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:14.206 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:14.206 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:14.208 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:14.208 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:14.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:14.209 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:14.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:14.209 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:14.209 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:14.209 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:14.212 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:14.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:14.212 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.213 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:14.213 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:14.213 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:14.213 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:14.218 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:28:14.700 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:28:14.742 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:28:14.743 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:28:14.745 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:28:14.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:28:14.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:14.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:14.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:28:14.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:14.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:28:14.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:28:14.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:28:14.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:28:14.790 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:28:14.790 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:28:14.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:14.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:15.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:28:15.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:15.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:15.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:15.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:15.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:28:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:28:16.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:16.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:16.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:28:17.072 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:28:17.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:17.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:17.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:17.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:17.550 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:28:18.029 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:28:18.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:18.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:18.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:18.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:18.507 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:28:18.985 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:28:19.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:19.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:19.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:19.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:19.463 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:28:19.941 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:28:20.420 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:28:20.897 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:28:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:28:21.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:28:22.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:28:22.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:22.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:22.795 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:28:22.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:22.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:22.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:22.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:22.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:22.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:22.803 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:22.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:22.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:22.803 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:22.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.803 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.804 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:22.804 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:28:27.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:27.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:27.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:27.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:27.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:27.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:27.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:27.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:27.817 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:27.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:27.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:27.821 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:27.821 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:27.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:27.821 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:27.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:27.822 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:27.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:27.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:27.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:27.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:27.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:27.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:27.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:27.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:27.825 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:27.825 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:27.826 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:27.826 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:27.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:27.827 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:27.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:27.827 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:27.827 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:27.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:27.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:27.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:27.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:27.830 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:27.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:27.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:27.832 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:27.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:32.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:32.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:32.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:32.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:32.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:32.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:32.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:32.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:32.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:32.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:32.853 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:32.853 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:32.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:32.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:32.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:32.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:32.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:32.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:32.857 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:32.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:32.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:32.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:32.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:32.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:32.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:32.864 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:32.864 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:32.864 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:32.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:32.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:32.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:28:33.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:28:33.386 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:28:33.386 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:28:33.386 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:28:33.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:28:33.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:33.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:33.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:28:33.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:33.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:28:33.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:28:33.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:28:33.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:28:33.390 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:28:33.391 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:28:33.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:33.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:33.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:28:33.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:33.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:33.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:33.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:34.304 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:28:34.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:28:34.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:34.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:34.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:34.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:35.260 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:28:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:28:35.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:35.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:35.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:35.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:28:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:28:36.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:36.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:36.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:36.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:37.161 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:28:37.630 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:28:37.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:37.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:37.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:37.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:38.106 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:28:38.580 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:28:39.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:28:39.519 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:28:39.996 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:28:40.468 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:28:40.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:28:41.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:41.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:41.395 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:28:41.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:41.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:41.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:41.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:41.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:41.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:41.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:41.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:41.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:41.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:41.399 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:46.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:46.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:46.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:46.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:46.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:46.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:46.419 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:46.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:46.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:46.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:46.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:46.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:46.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:46.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:46.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:46.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:46.424 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:46.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:46.427 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:46.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:46.427 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:46.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:46.427 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:46.427 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:46.427 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:46.430 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:46.430 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:46.430 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:46.433 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:46.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.434 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:46.434 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:46.435 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:46.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:46.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:46.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:46.437 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:46.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:51.444 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:28:51.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:28:51.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:51.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:51.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:51.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:51.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:28:51.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:51.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:51.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:28:51.454 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:28:51.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:28:51.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:28:51.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:51.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:51.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:28:51.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:28:51.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:28:51.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:28:51.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:28:51.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:28:51.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:51.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:51.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:28:51.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:28:51.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:28:51.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:28:51.466 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:28:51.466 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:28:51.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:51.466 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:28:51.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:28:51.467 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:28:51.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:28:51.467 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:28:51.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:28:51.471 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:28:51.471 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:28:51.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:28:51.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:28:51.953 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:28:51.994 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:28:51.996 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:28:51.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:28:51.998 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:28:52.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:28:52.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:28:52.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:28:52.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:52.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:28:52.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:28:52.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:28:52.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:28:52.043 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:28:52.043 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:28:52.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:52.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:28:52.422 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:28:52.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:52.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:52.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:52.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:52.891 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:28:53.362 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:28:53.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:53.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:53.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:53.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:53.839 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:28:54.317 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:28:54.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:54.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:54.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:54.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:54.794 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:28:55.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:28:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:55.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:55.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:55.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:55.750 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:28:56.229 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:28:56.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:28:56.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:28:56.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:28:56.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:28:56.706 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:28:57.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:28:57.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:28:58.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:28:58.598 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:28:59.073 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:28:59.542 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:29:00.012 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:29:00.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:00.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:00.047 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:29:00.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:00.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:00.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:00.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:00.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:00.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:00.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:00.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:00.051 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:05.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:05.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:05.058 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:05.058 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:05.058 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:05.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:05.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:05.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:05.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:05.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:05.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:05.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:05.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:05.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:05.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:05.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:05.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:05.070 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:05.070 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:05.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:05.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:05.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:05.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:05.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:05.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:05.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:05.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:05.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:05.074 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:05.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:05.074 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:05.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:05.074 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:05.074 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:05.074 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:05.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:05.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:05.078 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:05.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:05.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:05.080 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:05.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:05.080 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:10.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:10.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:10.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:10.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:10.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:10.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:10.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:10.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:10.099 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:10.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:10.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:10.101 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:10.101 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:10.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:10.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:10.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:10.102 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:10.102 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:10.102 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:10.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:10.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:10.103 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:10.105 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:10.105 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:10.105 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:10.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:10.108 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:10.108 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:10.108 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:10.113 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:29:10.595 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:29:10.640 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:29:10.642 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:29:10.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:29:10.644 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:29:10.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:10.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:10.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:29:10.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:10.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:29:10.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:29:10.648 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:29:10.648 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:29:10.685 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:29:10.685 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:29:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:10.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:11.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:29:11.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:11.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:11.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:11.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:11.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:29:12.028 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:29:12.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:12.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:12.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:12.506 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:29:12.984 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:29:13.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:13.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:13.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:13.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:13.462 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:29:13.941 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:29:14.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:14.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:14.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:14.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:14.419 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:29:14.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:29:15.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:15.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:15.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:15.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:15.366 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:29:15.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:29:16.321 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:29:16.799 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:29:17.278 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:29:17.755 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:29:18.234 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:29:18.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:29:19.190 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:29:19.666 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:29:20.144 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:29:20.622 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:29:21.099 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:29:21.576 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:29:22.048 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:29:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:29:22.998 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:29:23.467 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:29:23.937 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:29:24.414 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:29:24.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:24.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:24.690 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:24.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:24.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:24.693 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:24.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:24.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:24.694 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:24.694 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:29.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:29.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:29.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:29.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:29.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:29.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:29.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:29.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:29.711 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:29.711 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:29.711 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:29.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:29.715 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:29.715 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:29.715 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:29.715 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:29.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:29.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:29.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:29.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:29.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:29.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:29.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:29.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:29.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:29.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:29.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:29.721 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:29.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:29.721 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:29.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:29.725 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:29.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:29.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:29.727 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:29.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:34.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:34.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:34.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:34.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:34.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:34.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:34.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:34.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:34.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:34.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:34.742 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:34.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:34.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:34.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:34.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:34.743 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:34.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:34.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:34.745 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:34.745 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:34.745 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:34.745 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:34.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:34.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:34.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:34.746 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:34.747 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:34.747 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:34.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:34.748 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:34.748 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:34.748 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:34.748 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:34.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:34.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:34.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:34.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:34.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:34.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:34.751 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:34.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:34.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:34.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:29:35.233 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:29:35.276 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:29:35.277 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:29:35.278 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:29:35.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:29:35.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:35.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:35.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:29:35.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:35.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:29:35.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:29:35.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:29:35.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:29:35.323 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:29:35.323 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:29:35.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:35.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:35.705 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:29:35.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:35.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:35.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:35.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:36.179 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:29:36.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:29:36.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:36.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:36.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:36.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:37.135 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:29:37.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:29:37.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:37.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:37.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:37.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:38.090 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:29:38.562 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:29:38.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:38.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:38.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:38.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:39.033 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:29:39.510 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:29:39.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:39.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:39.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:39.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:39.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:29:40.466 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:29:40.944 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:29:41.421 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:29:41.895 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:29:42.365 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:29:42.835 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:29:43.303 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:29:43.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:43.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:43.328 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:29:43.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:43.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:43.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:43.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:43.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:43.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:43.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:43.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:43.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:43.337 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:43.338 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=1845 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:43.338 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.338 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.339 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1845 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.340 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:43.341 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:29:48.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:48.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:48.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:48.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:48.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:48.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:48.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:48.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:48.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:48.346 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:48.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:48.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:48.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:48.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:48.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:48.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:48.347 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:48.349 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:48.349 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:48.349 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:48.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:48.351 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:48.351 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:48.351 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:48.351 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:48.351 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:48.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:48.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:48.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:48.356 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:48.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:48.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:48.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:48.358 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:29:53.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:29:53.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:29:53.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:53.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:53.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:53.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:53.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:29:53.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:53.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:53.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:29:53.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:53.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:29:53.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:29:53.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:29:53.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:29:53.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:29:53.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:53.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:53.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:29:53.369 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:53.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:29:53.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:29:53.370 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:29:53.370 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.371 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:29:53.371 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:29:53.371 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:29:53.371 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:29:53.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:29:53.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:29:53.897 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:29:53.899 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:29:53.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:29:53.902 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:29:53.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:29:53.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:29:53.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:29:53.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:29:53.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:29:53.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:29:53.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:29:53.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:29:54.330 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:29:54.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:54.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:54.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:54.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:54.805 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:29:55.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:29:55.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:55.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:55.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:55.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:55.745 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:29:56.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:29:56.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:56.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:56.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:56.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:56.700 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:29:57.177 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:29:57.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:57.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:57.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:57.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:57.654 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:29:58.131 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:29:58.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:29:58.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:29:58.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:29:58.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:29:58.609 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:29:59.085 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:29:59.562 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:30:00.040 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:30:00.515 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:30:00.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:30:01.455 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:30:01.924 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:30:02.395 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:30:02.866 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:30:03.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:30:03.810 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:30:03.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:30:03.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:30:03.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:03.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:03.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:03.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:03.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:03.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:03.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:03.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:03.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:03.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:03.960 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.961 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.962 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:03.963 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:08.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:08.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:08.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:08.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:08.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:08.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:09.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:09.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:09.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:09.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:09.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:09.007 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:09.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:09.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:09.008 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:09.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:09.008 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:09.008 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:09.008 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:09.010 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:09.010 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:09.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:09.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:09.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:09.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:09.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:09.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:09.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:09.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:09.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:09.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:09.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:09.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:09.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:09.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:09.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:09.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:09.016 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:09.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:09.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:09.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:09.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:09.018 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:09.018 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:09.018 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:14.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:14.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:14.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:14.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:14.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:14.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:14.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:14.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:14.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:14.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:14.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:14.036 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:14.036 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:14.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:14.036 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:14.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:14.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:14.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:14.037 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:14.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:14.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:14.039 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:14.041 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:14.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:14.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:14.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:14.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:14.044 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:14.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:14.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:14.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:30:14.526 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:30:14.575 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:30:14.577 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:30:14.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:30:14.579 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:30:14.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:30:14.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:30:14.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:30:14.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:30:14.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:30:14.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:30:14.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:30:14.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:30:14.616 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:30:14.616 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-01-23 03:30:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:30:14.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:30:15.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:30:15.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:15.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:15.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:15.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:15.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:30:15.946 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:30:16.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:16.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:16.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:16.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:16.418 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:30:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:30:17.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:17.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:17.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:17.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:17.360 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:30:17.830 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:30:18.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:18.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:18.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:18.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:18.304 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:30:18.773 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:30:19.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:19.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:19.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:19.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:19.243 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:30:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:30:20.184 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:30:20.656 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:30:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:30:21.596 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:30:22.067 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:30:22.536 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:30:23.005 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:30:23.477 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:30:23.950 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:30:24.419 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:30:24.888 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:30:25.358 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:30:25.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:30:25.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:30:25.621 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:30:25.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:25.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:25.636 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:25.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:25.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:25.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:25.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:25.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:25.638 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:25.638 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.638 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2509 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.639 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.640 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.640 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:25.640 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2510 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:30.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:30.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:30.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:30.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:30.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:30.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:30.644 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:30.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:30.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:30.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:30.646 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:30.651 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:30.651 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:30.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:30.651 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:30.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:30.652 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:30.652 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:30.652 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:30.654 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:30.654 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:30.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:30.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:30.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:30.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:30.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:30.657 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:30.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:30.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:30.657 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:30.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:30.657 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:30.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:30.658 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:30.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:30.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:30.661 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:30.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:30.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:30.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:30.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:30.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:30.664 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:35.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:35.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:35.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:35.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:35.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:35.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:35.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:35.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:35.683 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:35.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:35.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:35.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:35.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:35.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:35.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:35.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:35.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:35.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:35.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:35.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:35.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:35.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:35.694 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:35.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:35.694 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:35.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:35.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:35.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:35.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:35.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:35.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:35.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:35.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:35.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:35.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:35.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:35.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:35.700 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:35.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:35.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:30:36.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:30:36.213 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:30:36.214 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:30:36.214 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:30:36.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:30:36.657 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:30:36.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:36.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:36.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:36.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:37.126 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:30:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:30:37.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:37.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:37.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:37.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:38.073 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:30:38.542 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:30:38.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:38.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:38.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:38.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:39.011 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:30:39.479 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:30:39.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:39.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:39.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:39.949 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:30:40.418 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:30:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:40.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:40.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:40.890 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:30:41.369 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:30:41.849 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:30:42.328 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:30:42.807 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:30:43.286 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:30:43.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:30:44.244 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:30:44.723 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:30:45.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:30:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:30:46.149 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:30:46.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:46.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:46.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:46.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:46.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:46.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:46.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:46.225 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:46.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:46.225 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:30:51.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:51.228 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:51.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:51.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:51.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:51.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:51.241 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:51.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:51.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:51.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:51.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:51.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:51.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:51.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:51.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:51.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:51.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:51.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:51.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:51.250 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:51.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:51.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:51.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:51.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:51.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:51.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:51.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:51.253 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:51.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:51.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:51.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:51.253 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:51.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:51.253 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:51.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:51.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:51.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:51.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:51.256 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:51.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:51.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:51.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:51.259 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:30:56.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:30:56.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:30:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:56.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:56.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:30:56.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:56.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:56.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:30:56.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:30:56.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:30:56.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:30:56.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:56.279 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:56.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:30:56.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:30:56.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:30:56.280 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:30:56.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:30:56.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:30:56.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:56.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:56.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:30:56.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:30:56.283 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:30:56.283 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:30:56.284 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:30:56.284 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:30:56.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:56.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:30:56.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:30:56.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:30:56.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:30:56.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:30:56.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:30:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:30:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:30:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:30:56.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:30:56.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:30:56.288 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:30:56.289 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:30:56.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:30:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:30:56.802 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:30:56.802 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:30:56.803 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:30:56.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:30:57.251 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:30:57.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:57.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:57.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:57.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:57.727 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:30:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:30:58.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:58.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:58.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:58.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:58.671 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:30:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:30:59.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:30:59.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:30:59.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:30:59.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:30:59.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:31:00.094 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:31:00.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:00.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:00.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:00.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:00.563 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:31:01.036 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:31:01.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:01.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:01.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:01.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:01.510 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:31:01.987 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:31:02.466 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:31:02.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:31:03.424 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:31:03.898 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:31:04.369 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:31:04.838 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:31:05.309 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:31:05.779 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:31:06.252 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:31:06.727 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:31:07.204 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:31:07.679 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:31:08.153 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:31:08.622 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:31:08.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:08.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:08.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:08.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:08.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:08.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:08.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:08.827 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:08.827 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:08.828 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:31:08.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:08.828 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.829 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.829 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.829 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.829 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.829 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2697 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.830 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2698 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.831 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:08.832 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2699 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:13.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:13.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:13.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:13.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:13.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:13.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:13.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:13.835 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:13.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:13.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:31:13.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:31:13.841 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:31:13.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:13.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:13.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:13.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:31:13.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:13.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:31:13.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:31:13.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:31:13.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:13.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:13.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:13.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:31:13.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:13.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:31:13.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:31:13.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:31:13.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:13.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:13.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:13.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:31:13.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:13.848 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:31:13.850 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:31:13.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:31:13.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:31:13.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:31:13.850 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:31:13.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:31:13.851 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:31:13.851 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:31:14.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:31:14.369 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:31:14.371 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:31:14.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:14.373 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:31:14.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:14.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:14.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:14.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:14.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:14.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:14.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:14.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:31:14.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:14.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:14.855 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:14.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:15.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:31:15.746 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:31:15.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:15.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:15.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:15.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:16.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:31:16.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:31:16.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:16.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:16.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:16.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:17.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:31:17.629 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:31:17.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:17.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:17.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:17.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:18.100 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:31:18.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:31:18.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:18.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:18.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:18.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:19.041 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:31:19.512 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:31:19.992 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:31:20.466 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:31:20.944 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:31:21.417 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:31:21.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:31:22.366 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:31:22.840 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:31:23.310 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:31:23.782 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:31:24.256 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:31:24.728 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:31:25.205 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:31:25.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:25.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:25.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:25.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:25.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:25.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:25.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:25.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:25.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:25.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:25.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:25.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:25.447 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:31:25.447 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.448 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.448 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.448 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.448 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.448 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2501 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.449 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:25.450 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2502 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:30.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:30.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:30.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:30.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:30.444 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:30.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:30.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:30.454 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:30.454 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:30.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:30.455 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:31:30.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:31:30.459 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:31:30.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:30.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:30.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:30.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:31:30.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:30.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:31:30.462 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:31:30.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:31:30.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:30.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:30.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:30.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:31:30.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:30.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:31:30.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:31:30.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:31:30.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:30.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:30.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:30.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:31:30.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:30.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:31:30.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:31:30.469 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:31:30.469 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:31:30.469 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:30.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:30.474 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:31:30.949 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:31:30.987 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:31:30.988 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:31:30.990 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:31:30.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:30.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:30.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:30.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:30.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:30.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:30.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:30.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:30.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:31.418 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:31:31.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:31.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:31.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:31.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:31.888 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:31:32.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:31:32.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:32.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:32.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:32.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:32.830 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:31:33.301 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:31:33.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:33.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:33.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:33.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:33.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:31:34.242 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:31:34.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:34.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:34.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:34.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:34.713 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:31:35.185 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:31:35.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:35.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:35.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:35.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:35.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:31:36.143 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:31:36.611 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:31:37.082 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:31:37.554 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:31:38.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:31:38.495 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:31:38.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:31:39.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:31:39.918 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:31:40.389 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:31:40.860 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:31:41.332 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:31:41.812 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:31:42.285 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:31:42.757 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:31:43.231 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:31:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:31:44.177 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:31:44.649 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:31:45.121 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:31:45.590 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:31:46.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:46.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:46.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:46.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:46.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:46.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:46.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:46.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:46.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:46.049 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:31:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:46.049 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3366 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:51.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:51.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:51.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:51.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:51.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:51.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:51.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:51.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:51.073 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:51.073 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:51.074 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:31:51.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:31:51.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:31:51.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:51.080 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:51.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:51.081 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:31:51.081 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:51.081 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:31:51.082 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:31:51.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:31:51.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:51.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:51.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:51.084 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:31:51.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:51.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:31:51.085 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:31:51.085 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:31:51.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:51.086 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:51.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:51.086 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:31:51.086 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:51.086 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:31:51.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:31:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:31:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:31:51.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:31:51.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.089 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:31:51.089 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:31:51.089 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:31:51.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:51.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:51.094 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:31:51.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:31:51.602 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:31:51.602 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:31:51.603 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:31:51.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:51.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:51.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:51.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:51.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:51.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:51.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:51.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:51.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:51.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:51.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:51.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:51.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:51.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:51.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:51.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:51.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:51.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:51.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:51.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:51.683 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:31:51.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:51.684 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:51.684 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:56.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:56.680 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:56.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:56.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:56.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:56.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:56.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:56.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:56.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:56.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:31:56.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:31:56.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:31:56.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:31:56.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:56.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:56.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:56.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:31:56.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:31:56.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:31:56.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:31:56.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:31:56.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:56.699 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:56.699 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:56.699 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:31:56.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:31:56.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:56.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:31:56.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:31:56.701 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:31:56.703 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.704 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:31:56.705 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:31:56.705 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:31:56.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:31:56.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:31:56.709 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:31:57.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:31:57.223 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:31:57.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.225 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:31:57.226 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:31:57.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:57.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:57.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:57.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:57.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:57.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:57.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:57.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:57.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:57.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:57.419 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:31:57.419 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:31:57.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.588 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:31:57.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:57.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:57.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:57.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:57.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:57.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:57.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:57.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:57.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:57.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:57.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:57.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:31:57.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:57.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:57.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:58.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:58.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:58.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:58.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:58.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:58.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:58.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:58.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:58.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:58.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:31:58.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:58.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:58.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:31:58.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:31:58.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:31:58.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:31:58.128 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:31:58.128 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:31:58.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:58.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:58.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:31:58.601 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:31:58.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:58.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:58.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:58.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:58.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:31:58.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:31:58.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:31:58.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:31:58.924 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:31:58.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:31:58.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:31:58.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:31:58.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:31:58.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:31:58.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:31:58.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:31:58.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:31:58.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:31:58.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:31:58.945 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:31:58.945 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=483 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.946 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=483 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.946 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=483 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.946 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=483 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.946 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.946 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:31:58.947 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:03.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:32:03.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:32:03.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:03.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:03.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:03.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:03.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:03.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:03.960 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:03.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:03.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:32:03.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:32:03.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:32:03.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:03.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:03.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:03.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:32:03.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:03.966 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:32:03.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:32:03.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:32:03.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:03.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:03.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:03.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:32:03.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:03.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:03.970 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:32:03.970 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:03.970 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:32:03.972 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.973 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:32:03.974 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:32:03.974 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:32:03.974 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.974 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:03.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:03.978 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:32:04.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:32:04.495 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:32:04.497 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:32:04.499 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:32:04.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:04.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:04.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:04.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:04.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:04.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:04.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:04.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:04.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:04.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:04.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:04.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:04.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:04.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:04.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:04.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:04.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:04.922 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:32:04.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:04.977 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:04.977 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:04.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:05.396 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:32:05.869 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:32:05.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:05.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:05.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:05.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:06.340 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:32:06.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:32:06.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:07.290 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:32:07.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:32:07.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:07.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:07.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:07.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:08.231 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:32:08.701 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:32:08.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:08.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:09.172 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:32:09.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:09.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:09.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:09.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:09.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:09.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:09.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:09.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:09.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:09.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:09.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:09.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:09.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:09.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:09.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:09.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:09.640 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:32:09.640 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:32:09.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:09.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:09.643 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:32:10.120 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:32:10.597 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:32:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:32:11.553 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:32:12.032 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:32:12.511 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:32:12.988 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:32:13.463 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:32:13.937 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:32:14.407 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:32:14.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:14.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:14.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:14.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:14.650 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:32:14.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:14.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:14.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:14.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:14.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:14.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:14.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:14.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:14.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:14.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:14.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:14.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:14.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:14.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:14.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:14.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:14.882 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:32:15.354 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:32:15.835 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:32:16.314 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:32:16.790 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:32:17.260 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:32:17.729 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:32:18.200 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:32:18.671 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:32:19.142 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:32:19.612 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:32:19.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:19.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:19.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:19.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:19.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:19.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:19.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:19.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:19.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:19.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:19.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:19.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:19.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:19.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:19.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:19.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:19.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:32:19.749 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:32:19.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:19.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:20.083 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:32:20.554 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:32:21.024 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:32:21.495 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:32:21.966 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:32:22.437 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:32:22.908 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:32:23.379 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:32:23.855 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:32:24.330 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:32:24.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:24.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:24.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:24.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:24.759 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:32:24.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:24.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:24.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:24.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:24.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:24.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:24.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:24.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:32:24.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:32:24.784 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:32:24.785 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.785 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.786 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.786 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.786 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.786 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.786 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.787 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4486 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.788 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.789 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:24.789 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4487 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:29.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:32:29.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:32:29.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:29.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:29.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:29.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:29.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:29.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:29.782 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:29.782 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:29.782 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:32:29.784 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:32:29.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:32:29.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:29.785 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:29.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:29.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:32:29.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:29.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:32:29.786 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:32:29.786 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:32:29.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:29.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:29.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:29.787 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:32:29.787 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:29.787 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:32:29.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:32:29.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:32:29.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:29.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:29.788 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:29.788 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:32:29.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:29.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.791 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:32:29.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:32:29.792 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:32:29.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:29.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:29.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:29.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:29.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:32:30.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:32:30.305 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:32:30.306 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:32:30.306 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:32:30.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:30.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:30.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:30.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:30.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:30.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:30.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:30.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:30.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:30.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:30.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:30.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:30.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:30.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:30.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:30.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:30.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:30.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:32:30.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:30.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:30.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:30.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:31.223 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:32:31.690 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:32:31.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:31.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:31.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:31.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:32.162 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:32:32.637 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:32:32.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:32.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:32.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:32.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:32:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:32:33.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:33.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:33.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:33.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:34.063 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:32:34.543 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:32:34.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:34.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:34.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:34.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:35.022 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:32:35.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:35.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:35.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:35.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:35.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:35.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:35.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:35.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:35.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:35.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:35.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:35.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:35.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:35.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:35.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:35.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:35.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:32:35.442 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:32:35.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:35.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:35.501 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:32:35.981 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:32:36.461 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:32:36.941 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:32:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:32:37.901 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:32:38.375 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:32:38.846 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:32:39.316 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:32:39.788 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:32:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:32:40.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:40.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:40.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:40.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:40.451 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:32:40.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:40.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:40.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:40.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:40.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:40.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:40.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:40.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:40.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:40.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:40.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:40.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:40.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:40.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:40.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:40.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:40.739 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:32:41.215 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:32:41.693 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:32:42.172 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:32:42.648 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:32:43.127 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:32:43.605 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:32:44.080 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:32:44.558 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:32:45.031 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:32:45.502 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:32:45.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:45.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:45.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:45.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:45.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:45.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:45.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:45.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:45.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:45.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:45.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:45.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:45.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:45.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:45.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:45.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:45.544 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:32:45.544 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:32:45.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:45.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:45.979 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:32:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:32:46.928 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:32:47.404 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:32:47.881 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:32:48.359 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:32:48.839 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:32:49.319 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:32:49.799 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:32:50.273 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:32:50.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:50.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:50.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:50.552 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:32:50.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:50.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:50.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:50.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:50.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:50.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:50.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:50.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:50.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:32:50.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:32:50.568 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:32:50.568 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4451 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:50.568 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4451 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:32:55.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:32:55.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:32:55.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:55.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:55.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:55.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:55.582 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:32:55.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:55.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:55.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:32:55.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:32:55.588 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:32:55.589 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:32:55.589 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:55.589 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:55.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:32:55.590 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:32:55.590 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:32:55.591 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:32:55.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:32:55.593 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:32:55.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:55.593 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:55.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:32:55.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:32:55.594 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:32:55.594 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:32:55.595 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:32:55.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:32:55.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:55.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:32:55.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:32:55.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:32:55.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:32:55.596 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:32:55.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:32:55.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:32:55.599 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:32:55.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:32:55.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:32:56.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:32:56.118 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:32:56.120 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:32:56.121 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:32:56.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:56.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:56.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:56.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:56.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:32:56.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:32:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:32:56.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:32:56.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:56.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:56.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:56.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:32:56.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:32:56.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:32:56.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:32:56.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:56.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:32:56.552 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:32:56.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:56.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:56.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:56.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:57.023 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:32:57.498 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:32:57.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:57.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:57.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:57.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:57.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:32:58.442 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:32:58.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:58.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:58.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:58.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:58.910 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:32:59.381 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:32:59.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:32:59.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:32:59.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:32:59.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:32:59.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:33:00.322 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:33:00.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:00.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:00.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:00.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:00.798 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:33:01.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:01.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:01.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:01.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:01.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:01.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:01.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:01.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:01.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:01.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:01.251 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:01.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:01.251 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:01.251 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:01.267 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:33:01.269 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:01.269 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:33:01.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:01.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:01.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:33:02.207 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:33:02.678 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:33:03.149 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:33:03.621 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:33:04.093 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:33:04.562 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:33:05.033 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:33:05.503 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:33:05.974 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:33:06.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:06.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:06.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:06.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:06.276 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:06.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:06.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:06.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:06.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:06.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:06.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:06.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:06.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:06.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:06.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:06.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:06.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:06.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:06.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:06.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:06.445 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:33:06.916 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:33:07.387 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:33:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:33:08.329 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:33:08.799 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:33:09.270 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:33:09.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:33:10.211 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:33:10.682 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:33:11.153 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:33:11.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:11.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:11.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:11.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:11.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:11.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:11.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:11.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:11.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:11.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:11.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:11.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:11.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:11.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:11.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:11.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:11.383 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:11.383 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:33:11.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:11.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:11.623 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:33:12.093 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:33:12.564 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:33:13.035 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:33:13.506 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:33:13.976 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:33:14.447 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:33:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:33:15.389 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:33:15.863 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:33:16.332 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:33:16.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:16.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:16.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:16.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:16.390 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:16.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:16.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:16.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:16.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:16.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:16.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:16.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:16.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:16.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:16.413 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:33:16.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:16.414 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:16.414 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:16.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:16.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:16.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4507 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:16.415 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:21.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:21.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:21.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:21.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:21.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:21.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:21.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:21.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:21.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:21.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:21.419 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:33:21.422 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:33:21.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:33:21.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:21.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:21.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:21.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:33:21.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:21.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:33:21.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:33:21.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:33:21.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:21.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:21.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:21.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:33:21.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:21.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:33:21.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:33:21.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:33:21.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:21.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:21.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:21.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:33:21.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:21.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:33:21.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:33:21.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:33:21.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:33:21.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:33:21.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.431 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:33:21.431 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:33:21.431 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:33:21.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:21.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:21.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:21.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.436 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:33:21.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:21.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:33:21.944 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:33:21.945 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:33:21.945 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:33:21.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:21.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:21.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:21.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:21.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:21.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:21.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:21.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:21.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:21.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:21.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:21.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:22.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:22.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:22.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:22.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:22.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:33:22.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:22.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:22.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:22.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:22.875 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:33:23.361 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:33:23.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:23.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:23.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:23.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:23.846 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:33:24.331 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:33:24.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:24.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:24.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:24.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:24.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:33:25.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:33:25.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:25.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:25.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:25.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:25.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:33:26.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:33:26.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:26.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:26.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:26.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:26.747 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:33:27.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:27.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:27.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:27.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:27.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:27.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:27.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:27.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:27.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:27.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:27.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:27.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:27.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:27.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:27.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:27.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:27.075 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:27.075 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:33:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:27.232 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:33:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:33:28.196 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:33:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:33:29.158 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:33:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:33:30.118 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:33:30.601 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:33:31.085 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:33:31.565 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:33:32.048 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:33:32.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:32.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:32.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:32.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:32.083 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:32.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:32.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:32.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:32.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:32.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:32.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:32.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:32.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:32.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:32.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:32.109 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:32.109 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:32.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:32.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:32.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:32.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:32.527 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:33:33.010 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:33:33.492 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:33:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:33:34.453 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:33:34.936 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:33:35.418 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:33:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:33:36.379 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:33:36.862 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:33:37.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:37.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:37.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:37.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:37.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:37.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:37.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:37.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:37.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:37.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:37.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:37.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:37.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:37.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:37.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:37.189 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:37.189 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:33:37.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:37.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:37.343 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:33:37.826 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:33:38.308 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:33:38.789 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:33:39.272 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:33:39.755 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:33:40.234 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:33:40.714 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:33:41.198 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:33:41.680 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:33:42.164 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:33:42.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:42.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:42.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:42.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:42.199 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:42.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:42.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:42.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:42.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:42.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:42.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:42.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:42.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:42.221 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:33:42.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:42.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:42.222 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:33:47.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:47.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:47.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:47.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:47.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:47.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:47.227 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:47.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:47.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:33:47.232 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:33:47.232 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:33:47.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:47.233 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:47.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:47.234 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:33:47.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:47.234 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:33:47.236 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:33:47.237 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:33:47.237 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:47.237 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:47.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:47.238 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:33:47.238 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:47.238 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:33:47.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:33:47.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:33:47.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:47.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:47.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:47.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:33:47.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:47.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:33:47.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:33:47.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:33:47.244 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:33:47.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:47.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:47.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:47.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:33:47.718 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:33:47.769 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:33:47.771 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:33:47.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:47.773 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:33:47.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:47.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:47.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:47.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:47.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:47.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:47.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:47.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:47.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:47.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:47.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:47.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:47.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:47.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:47.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:47.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:48.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:48.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:48.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:48.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:48.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:48.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:48.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:48.136 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:48.136 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:33:48.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:33:48.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:48.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:48.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:48.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:48.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:48.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.520 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:48.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:48.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:48.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:48.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:48.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:48.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:48.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:48.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:48.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:48.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:48.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:48.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:48.664 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:33:49.147 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:33:49.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:49.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:49.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:49.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:49.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:49.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:49.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:49.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:49.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:49.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:49.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:49.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:49.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:49.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:49.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:49.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:49.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:49.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:49.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:49.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:49.382 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:33:49.383 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:33:49.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:49.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:49.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:33:49.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:49.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:49.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:49.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:49.940 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:33:49.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:49.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:49.954 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:49.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:49.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:49.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:49.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:49.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:49.955 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:33:54.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:33:54.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:33:54.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:54.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:54.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:54.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:54.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:33:54.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:54.972 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:54.972 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:33:54.972 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:33:54.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:33:54.976 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:33:54.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:54.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:54.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:33:54.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:33:54.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:33:54.977 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:33:54.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:33:54.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:33:54.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:54.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:54.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:33:54.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:33:54.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:33:54.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:33:54.983 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:33:54.983 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:33:54.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:54.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:33:54.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:33:54.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:33:54.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:33:54.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:33:54.987 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:33:54.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:33:54.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:33:54.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:33:54.987 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:33:54.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:33:54.989 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:33:54.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:33:54.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:33:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:33:54.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:33:55.471 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:33:55.506 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:33:55.507 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:33:55.507 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:33:55.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:55.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:55.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:55.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:55.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:33:55.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:33:55.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:33:55.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:33:55.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:55.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:55.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:55.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:33:55.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:33:55.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:33:55.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:33:55.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:55.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:33:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:33:55.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:55.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:55.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:55.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:56.435 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:33:56.917 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:33:56.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:56.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:56.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:56.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:57.400 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:33:57.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:33:57.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:57.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:57.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:57.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:58.366 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:33:58.850 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:33:59.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:33:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:33:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:33:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:33:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:33:59.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:34:00.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:34:00.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:34:00.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:34:00.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:34:00.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:34:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:34:01.263 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:34:01.746 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:34:02.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:34:02.710 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:34:03.193 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:34:03.676 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:34:04.159 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:34:04.643 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:34:05.127 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:34:05.610 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:34:06.094 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:34:06.576 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:34:07.060 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:34:07.540 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:34:08.023 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:34:08.504 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:34:08.988 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:34:09.492 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:34:09.973 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:34:10.456 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:34:10.939 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:34:11.419 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:34:11.902 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:34:12.385 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:34:12.868 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:34:13.347 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:34:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:34:14.311 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:34:14.794 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:34:15.277 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:34:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:15.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:15.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:15.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:15.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:15.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:15.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:15.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:15.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:15.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:15.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:15.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:15.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:34:15.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:34:15.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:34:15.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:34:15.603 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:34:15.603 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:34:15.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:15.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:15.758 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:34:16.241 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:34:16.723 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:34:17.203 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:34:17.685 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:34:18.167 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:34:18.650 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:34:19.132 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:34:19.614 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:34:20.095 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:34:20.576 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:34:21.059 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:34:21.541 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:34:22.023 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:34:22.506 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:34:22.987 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:34:23.469 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:34:23.949 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:34:24.430 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:34:24.913 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:34:25.393 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:34:25.875 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:34:26.358 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:34:26.838 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:34:27.322 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:34:27.805 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:34:28.287 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:34:28.770 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:34:29.250 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:34:29.732 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:34:30.213 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:34:30.696 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:34:31.178 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:34:31.661 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:34:32.143 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:34:32.626 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:34:33.109 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:34:33.592 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:34:34.075 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:34:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:34:35.040 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:34:35.520 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:34:35.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:35.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:35.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:35.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:35.614 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:34:35.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:35.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:35.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:35.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:35.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:35.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:35.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:35.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:35.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:34:35.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:34:35.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:34:35.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:34:35.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:34:35.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:34:35.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:35.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:35.999 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 03:34:36.480 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 03:34:36.961 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 03:34:37.438 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 03:34:37.921 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 03:34:38.402 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 03:34:38.885 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 03:34:39.368 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 03:34:39.850 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 03:34:40.333 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 03:34:40.816 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 03:34:41.300 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 03:34:41.773 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 03:34:42.249 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 03:34:42.730 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 03:34:43.212 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 03:34:43.696 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 03:34:44.179 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 03:34:44.662 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 03:34:45.144 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 03:34:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 03:34:46.110 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 03:34:46.591 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 03:34:47.070 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 03:34:47.553 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 03:34:48.035 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 03:34:48.515 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 03:34:48.999 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 03:34:49.482 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 03:34:49.961 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 03:34:50.443 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 03:34:50.926 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 03:34:51.409 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 03:34:51.892 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 03:34:52.373 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 03:34:52.856 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 03:34:53.339 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 03:34:53.820 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 03:34:54.295 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 03:34:54.769 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 03:34:55.243 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 03:34:55.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:55.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:55.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:55.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:55.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:55.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:55.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:55.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:34:55.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:34:55.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:34:55.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:34:55.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:55.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:34:55.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:34:55.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:34:55.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:34:55.709 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:34:55.709 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:34:55.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:55.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:34:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 03:34:56.213 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 03:34:56.698 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 03:34:57.182 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 03:34:57.656 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 03:34:58.131 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 03:34:58.614 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 03:34:59.098 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 03:34:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 03:35:00.068 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 03:35:00.553 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 03:35:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 03:35:01.522 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 03:35:02.006 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 03:35:02.491 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 03:35:02.975 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 03:35:03.459 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 03:35:03.942 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 03:35:04.422 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 03:35:04.904 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 03:35:05.387 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 03:35:05.869 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 03:35:06.352 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 03:35:06.835 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 03:35:07.317 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 03:35:07.799 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 03:35:08.281 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 03:35:08.763 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 03:35:09.246 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 03:35:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 03:35:10.210 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 03:35:10.693 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 03:35:11.176 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 03:35:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 03:35:12.138 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 03:35:12.621 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 03:35:13.102 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 03:35:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 03:35:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 03:35:14.548 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 03:35:15.032 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 03:35:15.511 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 03:35:15.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:15.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:15.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:15.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:15.717 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:15.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:15.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:15.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:15.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:15.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:15.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:15.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:15.745 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:35:15.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:15.746 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=17083 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:15.747 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=17083 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:20.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:20.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:20.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:20.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:20.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:20.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:20.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:20.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:20.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:20.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:20.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:35:20.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:35:20.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:35:20.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:20.756 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:20.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:20.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:35:20.757 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:20.757 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:35:20.759 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:35:20.759 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:35:20.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:20.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:20.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:20.760 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:35:20.760 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:20.760 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:35:20.761 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:35:20.761 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:35:20.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:20.761 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:20.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:20.762 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:35:20.762 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:20.762 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:35:20.764 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:35:20.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:35:20.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:35:20.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:35:20.764 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:35:20.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:35:20.765 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:35:20.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:20.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:20.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:20.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:20.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:20.769 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:35:25.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:25.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:25.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:25.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:25.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:25.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:25.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:25.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:25.786 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:25.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:25.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:35:25.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:35:25.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:35:25.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:25.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:25.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:25.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:35:25.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:25.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:35:25.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:35:25.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:35:25.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:25.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:25.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:25.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:35:25.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:25.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:35:25.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:35:25.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:35:25.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:25.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:25.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:25.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:35:25.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:25.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:35:25.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:35:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:35:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:35:25.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:35:25.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.801 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:35:25.801 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:35:25.801 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:35:25.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:25.806 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:35:26.286 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:35:26.317 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:35:26.317 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:35:26.318 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:35:26.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:26.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:26.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:26.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:26.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:26.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:26.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:26.611 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.611 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:35:26.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:26.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:26.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:26.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:26.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:26.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:26.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:26.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:26.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:26.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:26.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:26.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:26.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:26.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:27.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:27.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:27.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:27.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:27.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:27.090 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:27.091 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:35:27.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.244 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:35:27.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.381 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:27.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:27.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:27.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:27.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:27.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:27.429 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:27.429 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:35:27.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.703 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:27.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:27.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:27.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:27.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:27.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:27.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:27.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:27.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:27.722 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:35:27.768 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:27.768 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:35:27.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:27.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:27.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:27.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:27.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:28.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:28.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:28.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:28.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:28.072 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:28.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:28.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:28.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:28.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:28.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:28.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:28.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:28.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:28.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:28.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:28.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:28.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:28.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:28.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:28.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:28.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:28.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:35:28.680 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:35:28.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:28.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:28.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:28.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:35:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:35:29.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:29.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:29.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:29.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:30.117 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:35:30.596 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:35:30.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:30.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:30.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:30.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:30.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:30.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:30.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:30.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:30.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:30.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:30.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:30.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:30.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:30.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:30.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:30.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:30.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:30.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:30.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:30.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:30.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:31.075 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:35:31.554 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:35:32.032 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:35:32.512 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:35:32.990 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:35:33.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:33.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:33.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:33.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:33.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:33.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:33.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:33.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:33.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:33.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:33.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:33.403 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:33.403 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:33.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:33.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:33.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:33.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:33.469 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:35:33.948 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:35:34.428 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:35:34.907 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:35:35.386 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:35:35.865 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:35:36.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:36.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:36.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:36.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:36.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:36.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:36.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:36.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:36.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:36.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:36.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:36.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:36.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:36.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:36.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:36.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:36.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:36.100 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:35:36.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:36.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:36.344 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:35:36.823 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:35:37.302 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:35:37.777 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:35:38.248 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:35:38.722 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:35:38.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:38.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:38.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:38.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:38.810 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:38.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:38.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:38.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:38.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:38.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:38.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:38.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:38.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:38.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:38.861 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:35:38.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:38.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:39.202 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:35:39.681 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:35:40.158 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:35:40.638 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:35:41.116 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:35:41.595 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:35:41.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:41.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:41.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:41.683 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:41.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:41.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:41.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:41.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:41.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:41.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:41.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:41.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:41.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:41.734 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:41.735 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:35:41.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:41.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:42.072 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:35:42.551 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:35:43.030 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:35:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:35:43.987 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:35:44.466 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:35:44.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:44.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:44.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:44.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:44.553 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:44.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:44.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:44.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:44.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:44.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:44.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:44.577 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:44.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:44.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:44.578 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:35:44.578 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4000 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:44.579 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4000 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:44.579 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4001 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:44.579 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=4001 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:35:49.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:35:49.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:35:49.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:49.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:49.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:49.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:49.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:35:49.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:49.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:49.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:35:49.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:35:49.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:35:49.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:35:49.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:49.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:49.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:35:49.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:35:49.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:35:49.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:35:49.606 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:35:49.606 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:35:49.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:49.607 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:49.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:35:49.607 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:35:49.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:35:49.608 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:35:49.609 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:35:49.609 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:35:49.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:49.609 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:35:49.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:35:49.610 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:35:49.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:35:49.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:35:49.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:35:49.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:35:49.613 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:35:49.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:35:49.618 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:35:50.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:35:50.129 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:35:50.130 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:35:50.130 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:35:50.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:50.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:50.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:50.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:50.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:50.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:50.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:50.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:50.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:50.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:50.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:50.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:50.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:50.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:50.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:50.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:50.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:50.555 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:35:50.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:50.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:50.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:50.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:51.026 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:35:51.497 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:35:51.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:51.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:51.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:51.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:51.968 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:35:52.438 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:35:52.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:52.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:52.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:52.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:52.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:35:53.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:53.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:53.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:53.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:53.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:53.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:53.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:53.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:53.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:53.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:53.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:53.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:53.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:53.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:53.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:53.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:53.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:53.374 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:35:53.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:53.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:53.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:35:53.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:53.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:53.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:53.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:53.850 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:35:54.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:35:54.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:35:54.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:35:54.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:35:54.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:35:54.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:35:55.262 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:35:55.733 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:35:56.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:35:56.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:56.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:56.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:56.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:56.579 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:35:56.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:56.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:56.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:56.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:56.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:56.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:56.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:56.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:56.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:56.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:56.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:56.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:56.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:56.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:56.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:56.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:56.675 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:35:57.146 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:35:57.617 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:35:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:35:58.558 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:35:59.029 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:35:59.500 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:35:59.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:59.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:59.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:59.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:59.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:59.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:59.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:59.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:35:59.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:35:59.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:35:59.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:35:59.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:59.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:35:59.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:35:59.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:35:59.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:35:59.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:35:59.968 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:35:59.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:59.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:35:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:36:00.441 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:36:00.912 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:36:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:36:01.853 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:36:02.324 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:36:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:36:03.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:03.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:03.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:03.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:03.126 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:03.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:03.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:03.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:03.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:03.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:03.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:03.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:03.148 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:03.148 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:03.148 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:36:03.149 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.149 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.149 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.150 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:03.151 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=2935 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:08.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:08.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:08.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:08.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:08.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:08.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:08.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:08.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:08.153 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:08.153 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:08.153 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:36:08.157 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:36:08.158 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:36:08.158 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:08.159 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:08.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:08.159 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:36:08.160 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:08.160 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:36:08.162 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:36:08.163 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:36:08.163 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:08.163 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:08.163 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:08.164 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:36:08.164 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:08.164 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:36:08.166 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:36:08.166 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:36:08.166 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:08.166 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:08.167 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:36:08.167 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:08.167 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:36:08.169 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:36:08.169 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:36:08.169 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:36:08.169 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:36:08.169 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.170 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:36:08.170 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:36:08.170 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:36:08.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:08.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:08.175 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:36:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:36:08.698 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:36:08.700 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:36:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:08.703 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:36:08.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:08.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:08.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:08.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:08.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:08.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:08.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:08.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:08.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:08.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:08.757 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:08.757 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:08.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:08.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:08.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:08.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:09.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.112 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:36:09.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:09.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:09.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:09.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:09.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:09.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:09.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:09.155 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:09.156 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:36:09.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:09.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:09.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:09.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:09.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:36:09.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:09.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.640 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:09.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:09.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:09.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:09.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:09.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:09.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:09.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:09.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:09.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:09.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:09.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:09.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:09.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:10.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:36:10.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:10.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:10.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:10.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:10.524 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:36:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:36:11.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:11.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:11.177 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:11.177 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:11.466 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:36:11.937 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:36:12.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:12.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:12.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:12.408 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:36:12.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:12.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:12.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:12.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:12.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:12.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:12.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:12.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:12.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:12.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:12.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:12.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:12.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:12.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:12.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:12.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:12.640 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:12.641 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:36:12.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:12.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:12.878 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:36:13.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:13.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:13.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:13.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:13.348 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:36:13.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:36:14.290 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:36:14.761 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:36:15.231 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:36:15.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:15.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:15.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:15.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:15.551 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:15.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:15.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:15.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:15.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:15.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:15.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:15.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:15.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:15.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:15.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:15.572 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:36:15.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.573 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.574 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.575 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.575 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.575 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.575 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.575 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.576 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:15.576 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:20.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:20.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:20.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:20.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:20.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:20.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:20.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:20.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:20.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:20.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:20.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:36:20.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:36:20.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:36:20.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:20.584 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:20.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:20.585 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:36:20.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:20.585 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:36:20.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:36:20.588 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:36:20.588 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:20.588 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:20.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:20.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:36:20.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:20.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:20.591 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:36:20.591 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:20.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:36:20.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:36:20.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:36:20.595 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:36:20.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:20.600 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:36:21.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:36:21.115 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:36:21.116 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:36:21.118 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:36:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:21.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:21.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:21.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:21.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:21.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:21.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:21.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:21.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:21.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:21.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:21.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:21.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:21.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:21.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:21.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:21.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:21.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:36:21.598 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:21.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:21.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:21.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:22.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:36:22.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:36:22.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:22.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:22.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:22.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:22.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:22.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:22.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:22.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:22.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:22.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:22.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:22.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:22.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:22.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:22.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:22.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:22.573 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:22.574 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:36:22.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:22.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:22.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:22.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:22.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:22.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:22.955 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:36:23.425 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:36:23.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:23.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:23.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:23.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:23.898 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:36:24.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:36:24.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:24.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:24.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:24.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:24.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:24.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:24.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:24.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:24.699 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:24.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:24.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:24.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:24.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:24.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:24.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:24.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:24.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:24.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:24.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:24.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:24.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:24.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:24.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:24.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:24.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:24.839 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:36:25.310 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:36:25.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:25.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:25.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:25.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:25.781 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:36:26.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:36:26.722 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:36:27.193 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:36:27.664 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:36:28.135 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:36:28.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:36:29.076 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:36:29.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:29.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:29.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:29.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:29.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:29.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:29.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:29.547 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:36:29.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:29.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:29.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:29.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:29.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:29.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:29.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:29.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:29.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:29.591 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:29.591 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:36:29.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:29.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:30.024 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:36:30.498 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:36:30.968 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:36:31.440 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:36:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:36:32.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:36:32.857 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:36:33.327 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:36:33.796 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:36:34.268 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:36:34.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:36:35.219 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:36:35.694 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:36:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:36:36.652 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:36:37.126 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:36:37.595 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:36:38.063 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:36:38.533 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:36:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:36:39.477 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:36:39.945 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:36:40.416 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:36:40.887 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:36:41.360 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:36:41.837 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:36:42.317 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:36:42.799 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:36:43.279 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:36:43.758 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:36:44.231 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:36:44.702 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:36:45.172 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:36:45.643 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:36:46.114 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:36:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:36:47.055 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:36:47.526 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:36:47.997 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:36:48.467 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:36:48.938 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:36:49.409 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:36:49.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:49.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:49.549 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:49.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:49.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:49.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:49.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:49.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:49.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:49.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:49.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:49.555 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:36:49.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:49.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:49.555 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.555 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:49.556 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:36:54.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:36:54.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:36:54.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:54.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:54.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:54.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:54.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:36:54.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:54.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:54.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:36:54.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:36:54.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:36:54.574 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:36:54.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:54.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:54.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:36:54.575 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:36:54.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:36:54.575 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:36:54.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:36:54.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:36:54.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:54.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:54.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:36:54.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:36:54.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:36:54.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:36:54.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:36:54.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:36:54.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:54.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:36:54.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:36:54.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:36:54.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:36:54.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:36:54.582 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:36:54.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:36:54.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:36:54.584 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:36:54.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:36:54.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:36:54.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:36:54.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:36:55.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:36:55.103 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:36:55.104 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:36:55.106 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:36:55.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:55.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:55.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:55.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:55.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:55.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:55.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:55.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:55.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:55.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:55.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:55.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:55.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:55.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:55.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:36:55.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:55.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:55.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:55.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:55.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:55.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:55.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:55.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:55.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:55.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:55.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:55.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:55.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:55.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:55.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.787 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:55.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:55.787 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:55.787 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:55.811 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:55.811 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:36:55.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:55.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:56.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:36:56.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:36:56.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:56.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:56.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:56.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:56.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:56.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:56.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:56.745 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:36:56.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:56.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:56.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:56.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:56.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:56.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:56.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:56.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:56.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:56.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:56.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:56.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:56.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:56.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:56.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:56.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:56.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:36:57.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:36:57.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:57.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:57.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:57.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:57.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:36:58.363 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:36:58.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:58.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:58.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:58.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:58.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:58.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:58.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:58.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:58.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:58.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:58.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:58.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:36:58.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:36:58.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:36:58.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:36:58.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:58.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:36:58.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:36:58.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:36:58.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:36:58.777 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:36:58.778 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:36:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:58.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:36:58.834 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:36:59.303 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:36:59.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:36:59.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:36:59.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:36:59.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:36:59.774 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:37:00.245 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:37:00.716 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:37:01.187 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:37:01.658 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:37:02.128 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:37:02.599 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:37:03.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:37:03.540 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:37:04.011 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:37:04.482 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:37:04.953 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:37:05.424 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:37:05.894 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:37:06.365 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:37:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:37:07.307 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:37:07.777 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:37:08.248 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:37:08.719 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:37:09.190 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:37:09.660 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:37:10.132 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:37:10.602 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:37:11.073 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:37:11.543 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:37:12.014 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:37:12.485 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:37:12.961 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:37:13.442 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:37:13.921 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:37:14.401 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:37:14.881 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:37:15.362 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:37:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:37:16.316 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:37:16.795 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:37:17.277 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:37:17.755 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:37:18.233 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:37:18.702 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:37:18.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:18.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:18.769 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:37:18.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:18.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:18.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:18.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:18.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:18.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:18.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:18.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:37:18.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:37:18.776 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:37:18.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:18.776 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5220 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5220 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5220 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:18.777 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=5220 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:23.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:37:23.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:37:23.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:23.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:23.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:23.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:23.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:23.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:37:23.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:23.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:37:23.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:37:23.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:37:23.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:37:23.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:37:23.796 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:23.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:23.797 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:37:23.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:37:23.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:37:23.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:37:23.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:37:23.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:37:23.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:23.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:23.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:37:23.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:37:23.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:37:23.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:37:23.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:37:23.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:37:23.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:23.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:23.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:37:23.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:37:23.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:37:23.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:37:23.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:37:23.805 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:37:23.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:37:23.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:23.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:37:24.278 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:37:24.324 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:37:24.325 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:37:24.327 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:37:24.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:24.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:24.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:24.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:24.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:24.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:24.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:24.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:24.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:24.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:24.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:24.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:24.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:24.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:24.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:24.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:24.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:24.747 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:37:24.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:24.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:24.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:24.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:25.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:37:25.688 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:37:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:25.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:25.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:25.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:26.159 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:37:26.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:37:26.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:26.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:26.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:26.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:26.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:26.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:26.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:26.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:26.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:26.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:26.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:26.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:26.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:26.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:26.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:26.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:26.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:26.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:26.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:26.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:26.910 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:37:26.910 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:37:26.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:26.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:27.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:37:27.570 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:37:27.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:27.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:27.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:27.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:28.041 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:37:28.512 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:37:28.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:28.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:28.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:28.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:28.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:37:29.454 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:37:29.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:29.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:29.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:29.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:29.595 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:37:29.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:29.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:29.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:29.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:29.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:29.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:29.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:29.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:29.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:29.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:29.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:29.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:29.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:29.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:29.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:29.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:29.925 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:37:30.396 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:37:30.867 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:37:31.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:37:31.808 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:37:32.279 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:37:32.750 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:37:32.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:32.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:32.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:32.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:32.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:32.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:32.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:32.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:32.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:32.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:32.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:32.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:32.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:32.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:32.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:32.982 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:37:32.983 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:37:32.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:32.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:33.220 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:37:33.691 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:37:34.161 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:37:34.632 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:37:35.103 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:37:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:37:36.044 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:37:36.518 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:37:36.990 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:37:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:37:37.929 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:37:38.400 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:37:38.870 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:37:39.341 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:37:39.812 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:37:40.282 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:37:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:37:41.224 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:37:41.695 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:37:42.165 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:37:42.636 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:37:43.107 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:37:43.578 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:37:44.049 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:37:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:37:44.990 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:37:45.461 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:37:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:37:46.402 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:37:46.873 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:37:47.344 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:37:47.822 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:37:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:37:48.782 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:37:49.261 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:37:49.746 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:37:50.222 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:37:50.698 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:37:51.172 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:37:51.652 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:37:52.127 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:37:52.599 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:37:52.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:52.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:52.930 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:37:52.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:52.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:52.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:52.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:52.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:52.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:52.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:52.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:52.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:37:52.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:37:52.949 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:37:52.950 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:52.950 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:37:57.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:37:57.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:37:57.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:57.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:57.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:57.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:57.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:37:57.953 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:37:57.953 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:57.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:37:57.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:37:57.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:37:57.957 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:37:57.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:37:57.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:57.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:37:57.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:37:57.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:37:57.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:37:57.960 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:37:57.960 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:37:57.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:37:57.960 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:57.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:37:57.961 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:37:57.961 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:37:57.961 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:37:57.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:37:57.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:37:57.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:37:57.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:37:57.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:37:57.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:37:57.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:37:57.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:37:57.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:37:57.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:37:57.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:37:57.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:37:57.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:37:57.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:37:57.966 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:37:57.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:37:57.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:37:57.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:37:58.439 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:37:58.493 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:37:58.495 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:37:58.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:58.498 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:37:58.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:58.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:58.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:58.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:58.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:58.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:58.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:58.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:58.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:58.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:58.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:58.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:58.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:58.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:58.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:58.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:58.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:58.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:58.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:58.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:58.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:58.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:58.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:58.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:58.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:58.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:58.859 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:37:58.859 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:37:58.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:58.908 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:37:58.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:58.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:37:58.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:59.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:59.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.195 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:37:59.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:59.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:59.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:59.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:59.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:59.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:59.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:59.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:59.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:37:59.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:59.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:59.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:37:59.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:37:59.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:37:59.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:37:59.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:37:59.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:37:59.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:37:59.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:37:59.846 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:37:59.847 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:37:59.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:37:59.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:37:59.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:37:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:37:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:37:59.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:00.319 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:38:00.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:00.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:38:00.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:00.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:00.406 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:38:00.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:00.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:00.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:00.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:00.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:38:00.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:38:00.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:38:00.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:38:00.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:38:00.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:38:00.431 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:38:00.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=535 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=535 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.432 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:00.433 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:38:05.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:38:05.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:38:05.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:38:05.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:38:05.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:38:05.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:38:05.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:38:05.438 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:38:05.438 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:38:05.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:38:05.439 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:38:05.442 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:38:05.443 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:38:05.443 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:38:05.443 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:38:05.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:38:05.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:38:05.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:38:05.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:38:05.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:38:05.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:38:05.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:38:05.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:38:05.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:38:05.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:38:05.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:38:05.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:38:05.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:38:05.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:38:05.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:38:05.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:38:05.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:38:05.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:38:05.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:38:05.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:38:05.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:38:05.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:38:05.453 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:38:05.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:38:05.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:38:05.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:38:05.933 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:38:05.973 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:38:05.975 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:38:05.976 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:38:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:38:05.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:05.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:05.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:38:06.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:06.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:38:06.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:38:06.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:06.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:38:06.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:38:06.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:38:06.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:38:06.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:38:06.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:38:06.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:06.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:06.402 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:38:06.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:06.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:06.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:06.872 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:38:07.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:38:07.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:07.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:07.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:07.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:07.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:38:08.287 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:38:08.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:08.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:08.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:08.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:08.758 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:38:09.228 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:38:09.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:09.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:09.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:09.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:09.699 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:38:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:38:10.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:38:10.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:38:10.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:38:10.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:38:10.641 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:38:11.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:38:11.582 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:38:12.053 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:38:12.524 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:38:12.999 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:38:13.472 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:38:13.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:38:14.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:38:14.885 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:38:15.355 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:38:15.826 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:38:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:38:16.768 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:38:17.239 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:38:17.709 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:38:18.180 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:38:18.651 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:38:19.123 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:38:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:38:20.064 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:38:20.540 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:38:21.018 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:38:21.493 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:38:21.962 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:38:22.433 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:38:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:38:23.375 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:38:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:38:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:38:24.787 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:38:25.258 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:38:25.728 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:38:26.199 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:38:26.671 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:38:27.141 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:38:27.612 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:38:28.087 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:38:28.555 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:38:29.026 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:38:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:38:29.967 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:38:30.438 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:38:30.909 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:38:31.380 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:38:31.850 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:38:32.323 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:38:32.792 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:38:33.263 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:38:33.733 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:38:34.204 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:38:34.675 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:38:35.146 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:38:35.617 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:38:36.087 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:38:36.558 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:38:37.029 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:38:37.500 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:38:37.971 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:38:38.441 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:38:38.912 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:38:39.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:39.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:38:39.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:39.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:39.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:39.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:39.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:38:39.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:38:39.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:38:39.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:38:39.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:38:39.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:39.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:38:39.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:38:39.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:38:39.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:38:39.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:38:39.094 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:38:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:39.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:38:39.385 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:38:39.860 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:38:40.329 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:38:40.799 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:38:41.272 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:38:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:38:42.212 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:38:42.688 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:38:43.167 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:38:43.642 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:38:44.117 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:38:44.596 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:38:45.072 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:38:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 03:38:46.015 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 03:38:46.486 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 03:38:46.957 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 03:38:47.428 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 03:38:47.898 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 03:38:48.369 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 03:38:48.840 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 03:38:49.311 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 03:38:49.782 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 03:38:50.253 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 03:38:50.723 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 03:38:51.194 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 03:38:51.665 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 03:38:52.136 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 03:38:52.606 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 03:38:53.077 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 03:38:53.548 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-01-23 03:38:54.019 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-01-23 03:38:54.491 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-01-23 03:38:54.970 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-01-23 03:38:55.450 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-01-23 03:38:55.928 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-01-23 03:38:56.401 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-01-23 03:38:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-01-23 03:38:57.361 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-01-23 03:38:57.839 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-01-23 03:38:58.317 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-01-23 03:38:58.790 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-01-23 03:38:59.268 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-01-23 03:38:59.741 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-01-23 03:39:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-01-23 03:39:00.683 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-01-23 03:39:01.153 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-01-23 03:39:01.624 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-01-23 03:39:02.095 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-01-23 03:39:02.566 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-01-23 03:39:03.036 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-01-23 03:39:03.507 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-01-23 03:39:03.978 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-01-23 03:39:04.449 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-01-23 03:39:04.919 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-01-23 03:39:05.390 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-01-23 03:39:05.861 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-01-23 03:39:06.332 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-01-23 03:39:06.803 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-01-23 03:39:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-01-23 03:39:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-01-23 03:39:08.215 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-01-23 03:39:08.686 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-01-23 03:39:09.164 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-01-23 03:39:09.641 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-01-23 03:39:10.119 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-01-23 03:39:10.599 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-01-23 03:39:11.079 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-01-23 03:39:11.558 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-01-23 03:39:12.035 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-01-23 03:39:12.511 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-01-23 03:39:12.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:12.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:39:12.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:12.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:12.634 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:39:12.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:12.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:12.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:39:12.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:12.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:39:12.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:39:12.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:12.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:39:12.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:39:12.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:39:12.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:39:12.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:39:12.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:39:12.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:12.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:12.990 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-01-23 03:39:13.469 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-01-23 03:39:13.944 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-01-23 03:39:14.419 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-01-23 03:39:14.888 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-01-23 03:39:15.359 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-01-23 03:39:15.829 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-01-23 03:39:16.300 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-01-23 03:39:16.771 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-01-23 03:39:17.244 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-01-23 03:39:17.714 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-01-23 03:39:18.184 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-01-23 03:39:18.654 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-01-23 03:39:19.125 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-01-23 03:39:19.596 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-01-23 03:39:20.067 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-01-23 03:39:20.538 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-01-23 03:39:21.008 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-01-23 03:39:21.479 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-01-23 03:39:21.951 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-01-23 03:39:22.421 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-01-23 03:39:22.891 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-01-23 03:39:23.362 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-01-23 03:39:23.833 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-01-23 03:39:24.308 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-01-23 03:39:24.786 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-01-23 03:39:25.262 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-01-23 03:39:25.740 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-01-23 03:39:26.220 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-01-23 03:39:26.699 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-01-23 03:39:27.177 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-01-23 03:39:27.658 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-01-23 03:39:28.138 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-01-23 03:39:28.618 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-01-23 03:39:29.097 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-01-23 03:39:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-01-23 03:39:30.058 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-01-23 03:39:30.535 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-01-23 03:39:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-01-23 03:39:31.495 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-01-23 03:39:31.975 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-01-23 03:39:32.454 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-01-23 03:39:32.933 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-01-23 03:39:33.412 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-01-23 03:39:33.885 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-01-23 03:39:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-01-23 03:39:34.834 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-01-23 03:39:35.309 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-01-23 03:39:35.786 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-01-23 03:39:36.261 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-01-23 03:39:36.732 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-01-23 03:39:37.206 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-01-23 03:39:37.683 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-01-23 03:39:38.161 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-01-23 03:39:38.633 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-01-23 03:39:39.104 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-01-23 03:39:39.582 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-01-23 03:39:40.057 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-01-23 03:39:40.530 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-01-23 03:39:41.010 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-01-23 03:39:41.489 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-01-23 03:39:41.967 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-01-23 03:39:42.439 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-01-23 03:39:42.920 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-01-23 03:39:43.401 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-01-23 03:39:43.879 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-01-23 03:39:44.353 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-01-23 03:39:44.829 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-01-23 03:39:45.304 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-01-23 03:39:45.775 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-01-23 03:39:46.249 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-01-23 03:39:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-01-23 03:39:47.207 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-01-23 03:39:47.686 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-01-23 03:39:47.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:47.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:39:47.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:47.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:47.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:47.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:47.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:39:47.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:39:47.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:39:47.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:39:47.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:39:47.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:47.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:39:47.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:39:47.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:39:47.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:39:47.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:39:47.968 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:39:47.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:47.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:39:48.161 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-01-23 03:39:48.630 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-01-23 03:39:49.104 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-01-23 03:39:49.573 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-01-23 03:39:50.043 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-01-23 03:39:50.515 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-01-23 03:39:50.990 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-01-23 03:39:51.467 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-01-23 03:39:51.947 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-01-23 03:39:52.427 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-01-23 03:39:52.901 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-01-23 03:39:53.381 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-01-23 03:39:53.859 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-01-23 03:39:54.333 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-01-23 03:39:54.812 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-01-23 03:39:55.292 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-01-23 03:39:55.769 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-01-23 03:39:56.247 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-01-23 03:39:56.715 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-01-23 03:39:57.185 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-01-23 03:39:57.662 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-01-23 03:39:58.135 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-01-23 03:39:58.609 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-01-23 03:39:59.090 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-01-23 03:39:59.570 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-01-23 03:40:00.050 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-01-23 03:40:00.530 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-01-23 03:40:01.010 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-01-23 03:40:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-01-23 03:40:01.968 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-01-23 03:40:02.448 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-01-23 03:40:02.928 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-01-23 03:40:03.408 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-01-23 03:40:03.887 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-01-23 03:40:04.367 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-01-23 03:40:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-01-23 03:40:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-01-23 03:40:05.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:05.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:05.576 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:40:05.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:05.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:05.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:05.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:05.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:05.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:05.581 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:40:05.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:05.581 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=25862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:40:05.581 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=25862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:40:05.581 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=25862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:40:05.582 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=25862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:40:10.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:10.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:10.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:10.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:10.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:10.589 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:10.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:10.598 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:10.598 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:10.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:10.599 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:40:10.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:40:10.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:40:10.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:10.603 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:10.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:10.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:40:10.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:10.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:40:10.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:40:10.606 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:40:10.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:10.606 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:10.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:10.606 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:40:10.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:10.607 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:40:10.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:40:10.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:40:10.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:10.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:10.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:10.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:40:10.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:10.609 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:40:10.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:40:10.612 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:40:10.612 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:40:10.612 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:40:10.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:10.615 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:10.615 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:10.615 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:40:15.620 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:15.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:15.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:15.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:15.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:15.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:15.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:15.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:15.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:15.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:15.635 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:40:15.638 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:40:15.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:40:15.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:15.639 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:15.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:15.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:40:15.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:15.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:40:15.641 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:40:15.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:40:15.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:15.642 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:15.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:15.642 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:40:15.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:15.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:15.644 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:40:15.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:15.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:40:15.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:40:15.648 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:40:15.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:15.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:40:15.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:15.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:16.135 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:40:16.161 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:40:16.162 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:40:16.163 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:40:16.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:16.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:16.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:16.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:16.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:16.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:16.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:16.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:16.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:16.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:16.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:16.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:16.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:16.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:16.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:16.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:16.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:16.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:40:16.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:16.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:16.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:17.091 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:40:17.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:40:17.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:17.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:17.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:17.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:17.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:17.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:17.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:17.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:17.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:17.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:17.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:17.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:17.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:17.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:17.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:17.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:17.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:17.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:17.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:17.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:17.705 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:40:17.705 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:40:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:40:18.514 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:40:18.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:18.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:18.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:18.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:18.987 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:40:19.461 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:40:19.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:19.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:19.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:19.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:19.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:40:19.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:19.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:19.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:19.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:19.979 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:40:19.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:19.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:19.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:19.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:19.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:19.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:19.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:19.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:19.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:19.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:19.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:19.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:20.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:20.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:20.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:20.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:20.418 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:40:20.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:20.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:20.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:20.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:20.897 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:40:21.378 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:40:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:40:22.335 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:40:22.813 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:40:23.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:40:23.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:23.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:23.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:23.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:23.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:23.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:23.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:23.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:23.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:23.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:23.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:23.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:23.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:23.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:23.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:23.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:23.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:40:23.519 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:40:23.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:23.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:23.763 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:40:24.243 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:40:24.716 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:40:24.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:24.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:24.799 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:40:24.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:24.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:24.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:24.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:24.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:24.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:24.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:24.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:24.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:24.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:24.806 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:40:29.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:40:29.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:40:29.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:29.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:29.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:29.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:29.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:40:29.824 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:29.824 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:29.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:40:29.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:40:29.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:40:29.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:40:29.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:29.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:29.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:40:29.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:40:29.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:40:29.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:40:29.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:40:29.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:40:29.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:29.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:29.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:40:29.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:40:29.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:40:29.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:40:29.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:40:29.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:40:29.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:29.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:40:29.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:40:29.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:40:29.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:40:29.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:40:29.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:40:29.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:40:29.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:40:29.845 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:40:29.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:40:29.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:40:30.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:40:30.361 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:40:30.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:30.362 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:40:30.363 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:40:30.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:30.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:30.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:30.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:30.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:30.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:30.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:30.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:30.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:30.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:30.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:30.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:30.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:30.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:30.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:30.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:30.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:40:30.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:30.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:30.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:30.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:31.275 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:40:31.746 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:40:31.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:31.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:31.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:31.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:32.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:40:32.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:40:32.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:32.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:32.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:32.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:40:33.639 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:40:33.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:33.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:33.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:33.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:34.118 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:40:34.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:40:34.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:40:34.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:40:34.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:40:34.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:40:35.067 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:40:35.547 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:40:36.021 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:40:36.501 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:40:36.974 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:40:37.445 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:40:37.916 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:40:38.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:40:38.857 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:40:39.328 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:40:39.799 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:40:40.270 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:40:40.742 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:40:41.216 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:40:41.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:40:42.160 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:40:42.631 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:40:43.102 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:40:43.572 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:40:44.043 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:40:44.514 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:40:44.985 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:40:45.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:45.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:45.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:45.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:45.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:45.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:45.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:40:45.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:40:45.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:40:45.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:40:45.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:45.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:40:45.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:40:45.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:40:45.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:40:45.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:40:45.308 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:40:45.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:45.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:40:45.456 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:40:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:40:46.412 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:40:46.891 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:40:47.366 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:40:47.835 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:40:48.305 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:40:48.782 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:40:49.255 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:40:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:40:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:40:50.672 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:40:51.153 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:40:51.632 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:40:52.112 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:40:52.592 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:40:53.072 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:40:53.551 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:40:54.027 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:40:54.504 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:40:54.984 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:40:55.464 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:40:55.942 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:40:56.415 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:40:56.884 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:40:57.359 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:40:57.836 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:40:58.315 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:40:58.792 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:40:59.265 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:40:59.739 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:41:00.218 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:41:00.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:00.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:00.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:00.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:00.562 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:41:00.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:00.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:00.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:00.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:00.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:00.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:00.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:00.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:00.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:00.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:00.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:00.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:00.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:00.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:00.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:00.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:00.691 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:41:01.162 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:41:01.633 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:41:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:41:02.574 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:41:03.050 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:41:03.529 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:41:04.009 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:41:04.486 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:41:04.966 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:41:05.446 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:41:05.924 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:41:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:41:06.884 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:41:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:41:07.832 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:41:08.309 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:41:08.783 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:41:09.261 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:41:09.734 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:41:10.210 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-01-23 03:41:10.689 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-01-23 03:41:11.161 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-01-23 03:41:11.632 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-01-23 03:41:12.103 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-01-23 03:41:12.574 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-01-23 03:41:13.045 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-01-23 03:41:13.515 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-01-23 03:41:13.986 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-01-23 03:41:14.456 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-01-23 03:41:14.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:14.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:14.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:14.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:14.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:14.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:14.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:14.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:14.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:14.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:14.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:14.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:14.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:14.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:14.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:14.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:14.927 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-01-23 03:41:14.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:41:14.971 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:41:14.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:14.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:15.400 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-01-23 03:41:15.878 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-01-23 03:41:16.357 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-01-23 03:41:16.836 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-01-23 03:41:17.315 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-01-23 03:41:17.787 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-01-23 03:41:18.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:18.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:18.180 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:41:18.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:18.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:18.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:41:18.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:41:18.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:41:18.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:41:18.183 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:41:18.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:41:18.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:41:18.183 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=10390 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:41:23.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:41:23.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:41:23.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:41:23.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:41:23.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:41:23.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:41:23.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:41:23.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:41:23.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:41:23.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:41:23.205 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:41:23.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:41:23.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:41:23.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:41:23.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:41:23.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:41:23.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:41:23.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:41:23.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:41:23.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:41:23.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:41:23.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:41:23.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:41:23.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:41:23.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:41:23.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:41:23.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:41:23.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:41:23.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:41:23.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:41:23.217 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:41:23.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:41:23.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:41:23.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:41:23.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:41:23.219 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:41:23.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:41:23.221 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:41:23.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:41:23.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:41:23.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:41:23.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:41:23.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:41:23.748 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:41:23.749 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:41:23.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:23.750 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:41:23.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:23.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:23.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:23.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:23.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:23.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:23.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:23.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:23.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:23.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:23.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:23.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:23.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:23.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:23.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:23.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:24.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:41:24.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:24.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:24.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:24.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:24.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:41:25.112 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:41:25.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:25.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:25.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:25.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:25.583 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:41:26.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:41:26.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:26.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:26.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:26.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:26.525 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:41:26.995 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:41:27.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:27.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:27.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:27.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:27.466 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:41:27.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:41:28.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:41:28.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:41:28.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:41:28.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:41:28.408 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:41:28.878 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:41:29.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:41:29.820 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:41:30.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:41:30.761 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:41:31.232 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:41:31.703 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:41:32.174 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:41:32.645 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:41:33.115 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:41:33.586 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:41:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:41:34.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:34.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:34.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:34.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:34.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:34.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:34.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:34.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:34.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:34.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:34.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:34.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:34.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:34.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:34.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:34.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:34.336 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:41:34.336 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:41:34.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:34.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:41:34.998 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:41:35.469 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:41:35.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:41:36.410 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:41:36.880 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:41:37.351 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:41:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:41:38.293 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:41:38.764 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:41:39.234 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:41:39.705 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:41:40.176 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:41:40.647 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:41:41.117 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:41:41.588 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:41:42.059 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:41:42.530 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:41:42.999 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:41:43.468 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:41:43.938 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:41:44.408 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:41:44.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:44.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:44.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:44.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:44.575 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:41:44.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:44.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:44.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:44.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:44.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:44.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:44.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:44.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:44.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:44.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:44.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:44.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:44.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:44.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:44.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:44.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:44.879 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:41:45.350 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:41:45.821 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:41:46.292 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:41:46.763 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:41:47.234 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:41:47.704 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:41:48.175 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:41:48.646 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:41:49.117 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:41:49.587 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:41:50.058 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:41:50.529 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:41:51.000 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:41:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:41:51.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:51.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:51.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:51.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:51.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:51.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:51.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:51.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:41:51.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:41:51.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:41:51.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:41:51.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:51.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:41:51.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:41:51.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:41:51.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:41:51.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:41:51.560 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:41:51.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:41:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:41:52.411 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-01-23 03:41:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-01-23 03:41:53.352 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-01-23 03:41:53.823 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-01-23 03:41:54.294 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-01-23 03:41:54.764 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-01-23 03:41:55.235 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-01-23 03:41:55.707 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-01-23 03:41:56.177 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-01-23 03:41:56.648 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-01-23 03:41:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-01-23 03:41:57.590 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-01-23 03:41:58.060 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-01-23 03:41:58.531 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-01-23 03:41:59.002 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-01-23 03:41:59.472 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-01-23 03:41:59.943 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-01-23 03:42:00.414 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-01-23 03:42:00.885 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-01-23 03:42:01.356 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-01-23 03:42:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-01-23 03:42:02.297 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-01-23 03:42:02.768 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-01-23 03:42:02.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:02.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:02.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:02.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:02.869 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:02.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:02.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:02.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:02.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:02.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:02.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:02.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:02.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:02.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:02.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:02.887 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:42:02.888 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.888 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8595 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.889 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:02.891 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=8596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:07.885 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:07.885 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:07.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:07.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:07.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:07.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:07.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:07.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:07.898 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:07.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:07.898 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:42:07.899 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:42:07.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:42:07.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:07.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:07.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:07.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:42:07.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:07.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:42:07.902 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:42:07.902 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:42:07.902 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:07.902 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:07.902 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:07.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:42:07.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:07.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:42:07.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:42:07.904 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:42:07.904 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:07.904 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:07.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:07.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:42:07.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:07.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:42:07.908 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:42:07.908 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:42:07.908 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:42:07.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:07.913 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:42:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:42:08.424 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:42:08.424 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:42:08.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:08.425 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:42:08.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:08.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:08.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:08.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:08.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:08.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:08.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:08.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:08.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:08.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:08.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:08.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:08.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:08.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:08.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:08.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:08.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:08.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:08.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:08.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:08.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:08.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:08.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:08.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:08.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:08.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:08.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:08.860 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:08.860 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:42:08.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:08.862 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:42:08.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:08.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:08.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:08.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:09.335 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:42:09.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:09.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:09.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:09.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:09.347 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:09.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:09.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:09.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:09.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:09.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:09.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:09.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:09.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:09.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:09.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:09.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:09.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:09.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:09.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:09.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:09.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:42:09.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:09.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:09.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:09.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:10.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:10.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:10.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:10.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:10.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:10.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:10.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:10.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:10.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:10.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:10.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:10.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:10.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:10.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:10.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:10.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:10.226 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:10.226 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:42:10.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:10.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:10.284 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:42:10.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:42:10.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:10.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:10.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:10.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:11.243 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:42:11.723 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:42:11.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:11.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:11.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:11.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:12.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:42:12.674 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:42:12.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:12.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:12.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:13.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:42:13.630 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:42:14.108 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:42:14.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:14.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:14.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:14.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:14.330 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:14.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:14.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:14.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:14.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:14.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:14.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:14.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:14.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:14.345 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:14.346 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=1379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:19.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:19.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:19.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:19.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:19.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:19.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:19.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:19.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:19.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:19.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:19.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:42:19.354 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:42:19.354 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:42:19.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:19.354 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:19.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:19.355 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:42:19.355 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:19.355 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:42:19.355 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:42:19.356 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:42:19.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:19.356 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:19.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:19.356 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:42:19.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:19.356 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:42:19.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:42:19.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:42:19.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:19.358 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:19.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:19.358 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:42:19.358 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:19.358 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:42:19.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:42:19.361 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:42:19.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:19.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:19.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:42:19.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:42:19.896 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:42:19.898 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:42:19.900 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:42:19.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:19.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:19.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:19.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:19.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:19.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:19.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:19.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:19.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:19.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:19.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:19.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:19.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:19.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:19.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:19.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:19.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:20.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:42:20.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:20.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:20.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:20.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:42:21.283 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:42:21.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:21.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:21.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:21.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:21.766 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:42:22.248 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:42:22.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:22.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:22.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:22.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:22.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:42:23.199 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:42:23.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:23.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:23.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:23.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:23.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:23.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:23.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:23.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:23.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:23.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:23.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:23.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:23.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:23.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:23.249 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:23.249 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:23.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:23.291 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:42:23.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:23.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:23.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:23.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:23.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:23.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:23.673 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:42:24.151 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:42:24.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:24.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:24.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:24.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:42:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:42:25.603 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:42:26.088 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:42:26.567 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:42:26.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:26.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:26.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:26.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:26.659 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:26.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:26.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:26.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:26.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:26.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:26.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:26.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:26.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:26.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:26.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:26.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:26.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:26.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:26.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:26.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:26.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:27.044 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:42:27.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:42:28.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:42:28.491 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:42:28.964 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:42:29.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:42:29.922 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:42:30.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:30.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:30.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:30.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:30.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:30.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:30.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:30.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:30.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:30.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:30.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:30.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:30.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:30.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:30.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:30.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:30.393 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:30.393 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:42:30.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:30.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:30.399 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:42:30.878 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:42:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:42:31.844 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:42:32.326 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:42:32.809 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:42:33.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:42:33.768 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:42:34.245 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:42:34.721 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:42:34.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:34.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:34.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:34.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:34.804 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:34.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:34.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:34.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:34.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:34.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:34.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:34.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:34.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:34.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:34.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:34.821 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3287 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:34.821 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:42:39.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:42:39.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:42:39.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:39.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:39.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:39.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:39.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:42:39.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:39.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:39.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:42:39.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:42:39.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:42:39.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:42:39.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:39.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:39.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:42:39.844 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:42:39.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:42:39.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:42:39.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:42:39.845 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:42:39.845 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:39.845 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:39.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:42:39.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:42:39.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:42:39.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:39.847 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:42:39.847 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:42:39.847 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:42:39.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:42:39.850 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:42:39.850 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:42:39.850 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:42:39.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:42:39.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:42:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:42:39.855 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:42:40.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:42:40.373 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:42:40.375 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:42:40.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:40.377 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:42:40.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:40.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:40.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:40.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:40.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:40.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:40.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:40.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:40.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:40.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:40.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:40.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:40.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:40.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:40.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:40.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:40.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:40.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:40.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:40.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:42:40.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:40.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:40.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:40.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:40.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:40.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:40.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:40.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:40.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:40.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:40.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:40.855 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:40.855 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:42:40.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:40.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:41.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:42:41.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:41.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:41.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:41.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:41.428 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:42:41.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:41.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:41.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:41.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:41.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:41.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:41.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:41.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:41.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:41.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:41.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:41.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:41.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:41.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:41.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:41.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:42:41.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:41.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:41.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:41.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:42.236 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:42:42.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:42.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:42.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:42.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:42.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:42.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:42.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:42.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:42:42.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:42:42.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:42:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:42:42.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:42.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:42:42.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:42:42.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:42:42.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:42:42.467 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:42:42.468 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:42:42.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:42.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:42:42.717 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:42:42.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:42.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:42.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:42.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:43.201 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:42:43.682 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:42:43.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:43.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:43.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:43.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:44.166 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:42:44.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:42:44.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:42:44.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:42:44.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:42:44.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:42:45.123 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:42:45.601 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:42:46.081 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:42:46.564 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:42:47.045 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:42:47.527 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:42:48.007 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:42:48.487 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:42:48.966 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:42:49.447 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:42:49.925 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:42:50.404 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:42:50.888 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:42:51.368 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:42:51.846 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:42:52.325 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:42:52.804 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:42:53.285 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:42:53.764 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:42:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:42:54.726 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:42:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:42:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:42:56.167 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:42:56.648 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:42:57.129 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:42:57.610 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:42:58.093 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:42:58.576 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:42:59.060 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:42:59.542 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:43:00.025 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:43:00.509 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:43:00.982 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:43:01.454 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:43:01.933 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:43:02.412 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:43:02.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:02.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:02.413 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:43:02.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:02.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:02.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:02.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:02.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:02.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:02.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:43:02.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:43:02.417 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:43:02.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:02.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:07.418 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:43:07.418 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:43:07.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:07.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:07.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:07.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:07.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:07.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:43:07.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:07.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:43:07.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:43:07.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:43:07.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:43:07.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:43:07.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:07.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:07.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:43:07.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:43:07.447 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:43:07.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:43:07.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:43:07.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:43:07.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:07.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:07.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:43:07.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:43:07.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:43:07.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:43:07.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:43:07.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:43:07.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:07.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:07.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:43:07.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:43:07.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:43:07.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:43:07.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:43:07.453 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:43:07.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:07.458 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:43:07.928 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:43:07.989 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:43:07.990 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:43:07.992 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:43:07.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:08.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:08.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:08.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:08.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:08.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:08.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:08.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:08.018 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:08.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:08.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:08.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:08.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:08.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:08.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:08.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:08.398 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:43:08.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:08.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:08.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:08.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:08.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:43:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:43:09.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:09.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:09.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:09.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:09.825 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:43:10.309 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:43:10.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:10.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:10.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:10.791 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:43:10.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:10.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:10.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:10.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:10.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:10.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:10.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:10.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:10.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:10.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:10.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:10.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:10.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:10.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:10.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:10.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:10.972 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:43:10.972 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:43:10.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:10.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:11.273 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:43:11.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:11.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:11.755 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:43:12.237 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:43:12.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:12.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:12.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:12.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:12.715 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:43:13.198 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:43:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:43:14.162 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:43:14.644 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:43:15.125 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:43:15.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:15.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:15.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:15.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:15.587 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:43:15.607 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:43:15.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:15.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:15.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:15.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:15.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:15.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:15.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:15.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:15.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:15.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:15.617 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:15.617 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:15.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:15.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:15.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:15.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:16.085 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:43:16.564 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:43:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:43:17.526 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:43:18.008 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:43:18.492 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:43:18.975 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:43:19.456 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:43:19.934 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:43:20.414 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:43:20.898 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:43:21.378 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:43:21.856 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:43:22.335 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:43:22.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:22.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:22.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:22.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:22.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:22.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:22.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:22.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:22.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:22.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:22.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:22.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:22.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:22.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:22.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:22.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:22.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:43:22.518 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:43:22.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:22.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:22.818 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:43:23.303 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:43:23.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:23.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:23.383 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:43:23.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:23.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:23.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:23.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:23.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:23.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:23.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:43:23.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:43:23.389 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:23.389 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=3386 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:28.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:43:28.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:43:28.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:28.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:28.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:28.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:28.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:28.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:43:28.402 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:28.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:43:28.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:43:28.404 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:43:28.404 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:43:28.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:43:28.405 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:28.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:28.405 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:43:28.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:43:28.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:43:28.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:43:28.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:43:28.407 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:43:28.407 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:28.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:28.407 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:43:28.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:43:28.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:43:28.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:43:28.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:43:28.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:43:28.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:43:28.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:28.410 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:43:28.410 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:43:28.410 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:43:28.414 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:43:28.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.414 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:43:28.414 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:43:28.414 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:43:28.414 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:43:28.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:43:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:43:28.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:43:28.419 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:43:28.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:43:28.944 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:43:28.945 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:43:28.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:28.946 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:43:28.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:28.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:28.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:28.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:28.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:28.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:28.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:28.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:28.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:28.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:28.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:28.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:28.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:28.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:28.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:29.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:43:29.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:29.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:29.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:29.861 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:43:30.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:43:30.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:30.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:30.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:30.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:30.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:30.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:30.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:30.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:30.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:30.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:30.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:30.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:30.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:30.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:30.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:30.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:30.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:30.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:30.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:30.815 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:43:30.815 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-01-23 03:43:30.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:30.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:30.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:43:31.312 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:43:31.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:31.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:31.421 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:31.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:43:32.279 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:43:32.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:32.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:32.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:32.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:32.763 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:43:33.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-01-23 03:43:33.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:33.421 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:33.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:33.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:33.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:33.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:33.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:33.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:33.611 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:43:33.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:33.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:33.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:33.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:33.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:33.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:33.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:33.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:33.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:33.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:33.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:33.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:33.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:33.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:33.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:33.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:33.729 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-01-23 03:43:34.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-01-23 03:43:34.695 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-01-23 03:43:35.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-01-23 03:43:35.661 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-01-23 03:43:36.145 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-01-23 03:43:36.625 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-01-23 03:43:37.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-01-23 03:43:37.592 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-01-23 03:43:37.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:37.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:37.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:37.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:38.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:38.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:38.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:38.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:38.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:38.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:43:38.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:43:38.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:38.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:43:38.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:43:38.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:43:38.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:43:38.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.28.22:6700) Recv SETFH cmd
2026-01-23 03:43:38.062 [INFO] transceiver.py:201 (MS@172.18.28.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-01-23 03:43:38.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:38.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:43:38.074 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-01-23 03:43:38.554 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-01-23 03:43:39.038 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-01-23 03:43:39.522 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-01-23 03:43:40.006 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-01-23 03:43:40.490 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-01-23 03:43:40.974 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-01-23 03:43:41.457 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-01-23 03:43:41.941 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-01-23 03:43:42.424 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-01-23 03:43:42.908 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-01-23 03:43:43.392 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-01-23 03:43:43.875 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-01-23 03:43:44.358 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-01-23 03:43:44.840 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-01-23 03:43:45.322 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-01-23 03:43:45.807 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-01-23 03:43:46.290 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-01-23 03:43:46.773 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-01-23 03:43:47.256 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-01-23 03:43:47.735 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-01-23 03:43:48.215 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-01-23 03:43:48.704 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-01-23 03:43:49.187 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-01-23 03:43:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-01-23 03:43:50.155 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-01-23 03:43:50.639 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-01-23 03:43:51.123 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-01-23 03:43:51.606 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-01-23 03:43:52.090 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-01-23 03:43:52.573 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-01-23 03:43:53.057 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-01-23 03:43:53.539 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-01-23 03:43:54.023 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-01-23 03:43:54.506 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-01-23 03:43:54.987 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-01-23 03:43:55.469 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-01-23 03:43:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-01-23 03:43:56.435 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-01-23 03:43:56.918 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-01-23 03:43:57.401 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-01-23 03:43:57.884 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-01-23 03:43:58.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:43:58.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:43:58.009 [INFO] transceiver.py:205 (MS@172.18.28.22:6700) Frequency hopping disabled
2026-01-23 03:43:58.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:43:58.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:43:58.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:43:58.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:43:58.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:43:58.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:43:58.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:43:58.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:43:58.013 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:43:58.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:43:58.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:43:58.013 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.013 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.013 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.013 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6251 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:43:58.014 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=6252 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:03.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:03.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:03.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:03.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:03.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:03.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:03.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:03.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:03.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:03.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:03.026 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:03.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:03.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:03.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:03.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:03.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:03.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:03.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:03.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:03.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:03.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:03.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:03.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:03.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:03.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:03.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:03.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:03.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:03.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:03.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:03.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:03.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.034 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:03.034 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:03.034 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:03.035 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:03.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:03.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:03.040 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:03.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:03.566 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:03.568 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:03.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.571 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:03.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:04.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:04.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:04.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:04.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:04.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:04.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:04.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:04.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:04.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:04.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:04.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:04.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:04.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:04.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:04.889 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:04.889 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:04.889 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.890 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.891 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:04.891 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:09.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:09.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:09.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:09.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:09.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:09.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:09.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:09.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:09.898 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:09.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:09.899 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:09.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:09.901 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:09.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:09.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:09.902 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:09.902 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:09.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:09.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:09.904 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:09.904 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:09.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:09.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:09.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:09.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:09.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:09.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:09.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:09.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:09.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:09.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:09.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:09.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:09.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:09.908 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:09.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:09.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:09.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.911 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:09.911 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:09.911 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:09.912 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:09.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:09.916 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:10.397 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:10.429 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:10.430 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:10.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.431 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:10.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:10.874 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:10.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:10.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:10.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:10.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:11.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.352 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:11.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:11.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:11.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:11.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:11.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:11.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:11.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:11.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:11.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:11.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:11.781 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:11.781 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:16.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:16.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:16.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:16.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:16.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:16.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:16.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:16.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:16.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:16.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:16.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:16.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:16.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:16.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:16.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:16.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:16.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:16.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:16.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:16.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:16.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:16.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:16.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:16.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:16.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:16.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:16.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:16.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:16.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:16.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:16.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:16.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:16.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:16.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:16.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:16.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:16.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:16.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:16.806 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:16.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:16.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:16.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:16.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:17.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:17.338 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:17.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.340 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:17.342 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:17.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:17.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:17.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:17.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:17.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:17.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:18.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:18.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:18.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:18.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:18.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:18.688 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:18.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:18.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:18.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:18.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:44:18.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:18.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:18.690 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:18.691 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.691 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.691 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.691 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.692 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.692 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=409 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.692 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.692 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.692 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:18.693 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:23.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:23.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:23.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:23.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:23.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:23.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:23.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:23.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:23.702 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:23.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:23.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:23.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:23.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:23.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:23.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:23.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:23.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:23.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:23.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:23.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:23.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:23.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:23.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:23.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:23.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:23.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:23.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:23.714 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:23.714 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:23.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:23.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:23.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:23.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:23.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:23.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:23.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:23.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:23.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:23.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:23.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:23.720 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:23.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:23.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:23.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:23.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:23.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:24.193 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:24.257 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:24.259 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:24.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.259 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:24.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:24.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:24.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:24.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:24.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:24.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:25.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:25.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:25.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:25.562 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:25.562 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:30.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:30.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:30.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:30.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:30.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:30.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:30.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:30.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:30.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:30.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:30.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:30.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:30.577 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:30.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:30.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:30.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:30.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:30.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:30.579 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:30.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:30.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:30.580 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:30.580 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:30.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:30.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:30.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:30.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:30.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:30.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:30.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:30.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:30.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:30.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:30.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:30.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.585 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:30.585 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:30.585 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:30.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:30.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:30.590 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:31.061 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:31.112 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:31.115 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:31.116 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:31.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:31.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.534 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:31.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:31.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:31.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:31.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:31.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:31.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:32.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:32.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:32.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:32.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:32.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:32.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:32.434 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:32.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:32.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:32.434 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:32.434 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:32.435 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:32.435 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.436 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.437 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.437 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.437 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.437 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.437 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:32.438 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:37.433 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:37.433 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:37.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:37.436 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:37.437 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:37.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:37.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:37.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:37.449 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:37.449 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:37.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:37.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:37.452 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:37.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:37.453 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:37.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:37.454 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:37.454 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:37.455 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:37.455 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:37.455 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:37.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:37.456 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:37.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:37.456 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:37.456 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:37.456 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:37.457 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:37.458 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:37.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:37.458 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:37.458 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:37.458 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:37.458 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:37.458 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:37.462 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:37.462 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:37.462 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:37.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:37.467 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:37.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:37.991 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:37.992 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:37.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:37.993 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:38.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:38.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:38.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:38.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:38.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:38.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:38.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:38.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:39.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:44:39.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:39.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:39.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:39.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:39.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:39.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:39.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:39.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:39.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:39.362 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:39.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:39.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.363 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:39.364 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:44.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:44.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:44.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:44.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:44.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:44.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:44.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:44.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:44.369 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:44.369 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:44.369 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:44.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:44.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:44.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:44.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:44.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:44.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:44.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:44.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:44.372 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:44.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:44.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:44.373 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:44.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:44.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:44.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:44.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:44.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:44.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:44.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:44.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:44.374 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:44.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:44.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:44.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:44.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:44.377 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:44.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:44.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:44.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:44.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:44.909 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:44.911 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:44.912 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:44.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:44.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:44.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:44.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:44:45.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:45.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:45.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:45.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:45.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.796 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:44:45.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:45.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:46.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:46.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:46.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:46.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:46.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:46.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:46.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:46.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:46.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:46.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:46.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:46.239 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:46.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:46.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:46.240 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:44:51.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:51.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:51.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:51.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:51.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:51.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:51.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:51.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:51.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:51.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:51.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:51.254 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:51.255 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:51.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:51.255 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:51.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:51.256 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:51.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:51.256 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:51.257 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:51.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:51.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:51.258 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:51.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:51.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:51.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:51.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:51.259 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:51.259 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:51.259 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:51.259 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:51.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:51.259 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:51.260 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:51.260 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:51.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:51.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.262 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:51.262 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:51.262 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:51.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:51.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.264 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:51.267 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:51.737 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:51.788 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:51.789 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:51.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.791 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:51.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:51.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:51.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:51.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:51.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:51.850 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:44:56.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:56.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:56.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:56.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:56.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:56.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:56.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:56.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:56.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:56.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:44:56.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:44:56.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:44:56.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:44:56.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:56.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:44:56.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:56.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:56.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:44:56.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:56.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:44:56.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:44:56.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:44:56.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:44:56.859 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:44:56.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:44:56.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:44:57.333 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:44:57.371 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:44:57.372 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:44:57.372 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:44:57.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:44:57.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:44:57.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:44:57.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:44:57.475 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:02.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:02.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:02.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:02.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:02.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:02.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:02.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:02.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:02.484 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:02.484 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:02.484 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:02.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:02.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:02.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:02.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:02.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:02.486 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:02.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:02.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:02.488 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:02.488 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:02.488 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:02.490 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:02.490 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:02.490 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:02.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:02.494 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:02.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:02.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:02.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:02.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:03.012 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:03.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.012 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:03.013 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:03.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:03.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:03.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:03.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:03.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:03.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:03.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:03.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:03.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:03.097 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:08.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:08.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:08.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:08.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:08.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:08.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:08.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:08.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:08.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:08.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:08.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:08.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:08.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:08.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:08.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:08.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:08.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:08.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:08.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:08.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:08.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:08.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:08.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:08.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:08.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:08.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:08.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:08.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:08.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:08.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:08.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:08.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:08.123 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:08.123 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:08.123 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:08.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:08.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:08.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.126 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:08.126 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:08.126 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:08.127 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:08.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:08.131 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:08.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:08.664 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:08.665 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:08.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.667 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:08.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:08.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:08.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:08.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:08.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:08.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:08.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:08.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:08.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:08.754 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:13.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:13.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:13.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:13.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:13.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:13.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:13.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:13.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:13.762 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:13.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:13.762 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:13.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:13.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:13.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:13.764 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:13.764 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:13.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:13.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:13.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:13.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:13.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:13.765 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:13.766 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:13.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:13.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:13.767 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:13.768 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:13.768 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:13.768 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.768 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:13.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:13.773 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:14.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:14.281 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:14.281 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:14.281 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:14.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:14.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:14.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:14.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:14.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:14.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:14.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:14.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:14.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:14.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:14.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:14.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:14.337 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:19.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:19.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:19.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:19.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:19.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:19.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:19.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:19.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:19.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:19.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:19.365 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:19.367 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:19.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:19.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:19.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:19.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:19.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:19.370 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:19.370 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:19.371 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:19.371 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:19.372 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:19.372 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:19.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:19.373 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:19.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:19.373 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:19.374 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:19.374 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:19.374 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:19.374 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:19.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:19.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:19.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:19.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:19.378 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:19.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:19.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:19.378 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:19.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:19.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:19.380 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:19.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:19.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:19.909 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:19.911 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:19.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.912 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:19.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:19.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:19.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:20.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:20.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:20.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:20.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:20.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:20.031 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:20.031 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:20.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:20.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:20.031 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:20.031 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:20.031 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:20.031 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:20.031 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:25.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:25.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:25.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:25.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:25.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:25.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:25.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:25.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:25.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:25.059 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:25.059 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:25.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:25.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:25.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:25.062 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:25.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:25.063 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:25.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:25.063 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:25.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:25.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:25.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:25.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:25.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:25.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:25.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:25.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:25.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:25.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:25.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:25.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:25.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:25.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:25.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:25.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:25.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:25.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:25.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:25.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:25.070 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:25.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:25.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:25.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:25.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:25.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:25.605 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:25.607 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:25.609 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:25.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:25.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:25.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:25.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:25.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:25.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:25.699 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:30.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:30.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:30.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:30.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:30.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:30.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:30.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:30.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:30.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:30.714 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:30.714 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:30.715 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:30.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:30.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:30.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:30.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:30.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:30.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:30.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:30.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:30.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:30.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:30.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:30.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:30.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:30.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:30.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:30.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:30.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:30.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:30.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:30.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:30.721 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:30.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:30.721 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.723 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:30.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:30.724 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:30.724 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:30.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:30.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:31.209 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:31.250 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:31.251 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:31.252 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:31.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:31.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:31.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:31.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:45:31.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:31.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:31.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:31.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:45:31.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:45:31.689 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:45:31.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:31.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:31.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:31.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:32.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:45:32.651 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:45:32.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:32.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:32.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:32.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:33.134 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:45:33.616 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:45:33.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:33.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:33.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:33.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:34.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:45:34.585 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:45:34.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:34.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:34.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:34.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:34.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:34.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:34.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:34.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:34.735 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:34.736 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:39.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:39.739 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:39.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:39.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:39.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:39.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:39.747 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:39.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:39.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:39.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:39.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:39.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:39.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:39.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:39.752 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:39.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:39.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:39.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:39.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:39.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:39.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:39.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:39.756 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:39.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:39.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:39.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:39.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:39.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:39.758 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:39.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:39.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:39.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:39.759 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:39.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:39.762 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:39.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:39.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:40.285 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:40.286 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:40.287 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:40.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:40.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:40.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:40.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:45:40.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:40.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:40.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:40.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:45:40.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:45:40.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 03:45:40.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:40.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:40.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:40.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:40.722 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:45:40.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:40.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:40.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:40.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:40.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:45:40.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:45:40.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:40.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:40.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:40.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:40.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:40.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:40.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:40.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:40.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:40.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:40.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:40.860 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:45.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:45.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:45.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:45.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:45.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:45.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:45.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:45.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:45.873 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:45.873 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:45.873 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:45.874 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:45.874 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:45.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:45.874 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:45.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:45.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:45.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:45.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:45.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:45.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:45.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:45.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:45.878 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:45.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:45.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:45.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:46.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:46.402 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:46.403 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:46.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:46.404 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:46.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:46.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:46.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:45:46.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:46.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:46.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:46.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:45:46.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:45:46.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 03:45:46.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:46.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:46.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:46.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:46.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:45:46.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:46.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:46.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:46.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:47.336 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:45:47.821 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:45:47.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:47.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:47.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:47.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:48.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:45:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:45:48.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:48.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:48.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:48.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:49.273 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:45:49.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:49.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:49.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:49.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:49.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:49.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:49.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:49.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:49.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:49.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:49.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:49.537 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (TRX1@172.18.28.20:5700/1) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:49.537 [WARNING] transceiver.py:250 (BTS@172.18.28.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-01-23 03:45:54.542 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:54.542 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:54.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:54.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:54.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:54.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:54.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:54.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:54.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:54.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:45:54.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:45:54.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:45:54.559 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:45:54.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:54.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:54.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:54.561 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:45:54.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:45:54.562 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:45:54.563 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:45:54.564 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:45:54.564 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:54.565 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:54.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:54.565 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:45:54.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:45:54.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:45:54.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:45:54.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:45:54.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:54.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:45:54.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:45:54.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:45:54.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:45:54.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:45:54.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:45:54.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:45:54.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.573 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:45:54.573 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:45:54.573 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:45:54.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:45:54.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:45:54.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:45:54.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:45:54.578 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:45:55.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:45:55.114 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:45:55.116 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:45:55.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:45:55.118 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:45:55.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:55.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:55.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:45:55.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:55.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:55.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:55.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:45:55.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:45:55.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 03:45:55.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:45:55.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:45:55.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:55.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:45:55.536 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:45:55.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:55.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:55.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:55.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:56.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:45:56.499 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:45:56.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:56.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:56.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:56.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:56.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:45:57.463 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:45:57.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:57.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:57.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:57.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:57.946 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:45:58.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:45:58.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:45:58.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:45:58.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:45:58.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:45:58.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:45:58.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:45:58.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:45:58.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:45:58.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:45:58.224 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:45:58.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:45:58.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:03.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:03.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:03.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:03.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:03.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:03.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:03.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:03.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:03.238 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:03.239 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:03.239 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:46:03.241 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:46:03.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:46:03.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:03.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:03.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:03.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:46:03.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:03.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:46:03.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:46:03.246 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:46:03.246 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:03.246 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:03.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:03.247 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:46:03.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:03.247 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:46:03.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:46:03.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:46:03.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:03.250 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:03.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:03.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:46:03.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:03.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:46:03.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:46:03.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:46:03.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:46:03.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:46:03.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:46:03.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:46:03.255 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:46:03.255 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:46:03.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETRXGAIN
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:03.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:03.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:03.260 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-01-23 03:46:03.747 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-01-23 03:46:03.775 [DEBUG] fake_trx.py:273 (BTS@172.18.28.20:5700) Recv FAKE_TOA cmd
2026-01-23 03:46:03.776 [DEBUG] fake_trx.py:292 (BTS@172.18.28.20:5700) Recv FAKE_RSSI cmd
2026-01-23 03:46:03.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:46:03.777 [DEBUG] fake_trx.py:317 (BTS@172.18.28.20:5700) Recv FAKE_CI cmd
2026-01-23 03:46:03.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:46:03.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:46:03.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:46:03.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:46:03.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:46:03.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:46:03.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:46:03.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:46:03.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD HANDOVER
2026-01-23 03:46:03.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:46:03.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:46:03.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:46:03.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:46:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-01-23 03:46:04.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:46:04.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:46:04.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:46:04.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:46:04.710 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-01-23 03:46:05.192 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-01-23 03:46:05.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:46:05.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:46:05.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:46:05.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:46:05.675 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-01-23 03:46:06.158 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-01-23 03:46:06.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:46:06.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:46:06.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:46:06.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:46:06.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-01-23 03:46:07.123 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-01-23 03:46:07.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:46:07.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:46:07.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:46:07.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:46:07.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-01-23 03:46:07.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:46:07.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:46:07.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:46:07.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD ECHO
2026-01-23 03:46:07.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.28.22:6700) Ignore CMD SETSLOT
2026-01-23 03:46:07.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.28.22:6700) Recv RXTUNE cmd
2026-01-23 03:46:07.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.28.22:6700) Recv TXTUNE cmd
2026-01-23 03:46:07.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.28.22:6700) Recv POWERON CMD
2026-01-23 03:46:07.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.28.22:6700) Starting transceiver...
2026-01-23 03:46:07.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD NOHANDOVER
2026-01-23 03:46:07.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.28.22:6700) Recv POWEROFF cmd
2026-01-23 03:46:07.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.28.22:6700) Stopping transceiver...
2026-01-23 03:46:07.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.28.20:5700) Recv SETPOWER cmd
2026-01-23 03:46:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.28.20:5700/1) Recv SETPOWER cmd
2026-01-23 03:46:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.28.20:5700/2) Recv SETPOWER cmd
2026-01-23 03:46:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.28.20:5700/3) Recv SETPOWER cmd
2026-01-23 03:46:07.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:07.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:07.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:07.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:07.897 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:46:07.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:07.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:12.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:12.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:12.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:12.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:12.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:12.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:12.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:12.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:12.909 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:12.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:12.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:46:12.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:46:12.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:46:12.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:12.914 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:12.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:12.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:46:12.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:12.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:46:12.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:46:12.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:46:12.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:12.918 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:12.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:12.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:46:12.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:12.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:46:12.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:46:12.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:46:12.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:12.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:12.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:46:12.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:12.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:46:12.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:46:12.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:12.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:12.924 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:46:12.924 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:46:12.924 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:46:12.924 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:46:12.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:12.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:12.925 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:12.925 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:17.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:17.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:17.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:17.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:17.929 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:17.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:17.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:17.932 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.28.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:17.932 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.28.20:5700) Recv SETFORMAT cmd
2026-01-23 03:46:17.932 [INFO] ctrl_if_trx.py:201 (BTS@172.18.28.20:5700) TRXD header version 1 -> 1
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.28.20:5700/1) Recv RXTUNE cmd
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.28.20:5700/1) Recv TXTUNE cmd
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:17.933 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.28.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.28.20:5700/1) Recv RFMUTE cmd
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.28.20:5700/1) Recv NOMTXPOWER cmd
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.28.20:5700/2) Recv RXTUNE cmd
2026-01-23 03:46:17.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.28.20:5700/1) Recv SETFORMAT cmd
2026-01-23 03:46:17.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.28.20:5700/1) TRXD header version 1 -> 1
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.28.20:5700/2) Recv TXTUNE cmd
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:17.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.28.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.28.20:5700/2) Recv RFMUTE cmd
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.28.20:5700/2) Recv NOMTXPOWER cmd
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.28.20:5700/2) Recv SETFORMAT cmd
2026-01-23 03:46:17.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.28.20:5700/2) TRXD header version 1 -> 1
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.28.20:5700/3) Recv RXTUNE cmd
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.28.20:5700/3) Recv TXTUNE cmd
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:17.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.28.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-01-23 03:46:17.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.28.20:5700/3) Recv RFMUTE cmd
2026-01-23 03:46:17.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.28.20:5700/3) Recv NOMTXPOWER cmd
2026-01-23 03:46:17.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.28.20:5700/3) Recv SETFORMAT cmd
2026-01-23 03:46:17.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.28.20:5700/3) TRXD header version 1 -> 1
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.28.20:5700) Recv RXTUNE cmd
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETTSC
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETTSC
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETTSC
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.28.20:5700) Recv TXTUNE cmd
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETRXGAIN
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETRXGAIN
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETRXGAIN
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.28.20:5700) Ignore CMD SETTSC
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.28.20:5700) Recv NOMTXPOWER cmd
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.28.20:5700) Recv POWERON CMD
2026-01-23 03:46:17.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.28.20:5700) Starting transceiver...
2026-01-23 03:46:17.936 [INFO] transceiver.py:236 Starting clock generator
2026-01-23 03:46:17.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:17.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.28.20:5700) Recv RFMUTE cmd
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.28.20:5700) Recv POWEROFF cmd
2026-01-23 03:46:17.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.28.20:5700) Stopping transceiver...
2026-01-23 03:46:17.937 [INFO] transceiver.py:239 Stopping clock generator
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.28.20:5700/1) Ignore CMD SETSLOT
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.28.20:5700/2) Ignore CMD SETSLOT
2026-01-23 03:46:17.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.28.20:5700/3) Ignore CMD SETSLOT